公开(公告)号：US10790295B2

公开(公告)日：2020-09-29

申请号：US16046750

申请日：2018-07-26

申请人： Yangtze Memory Technologies Co., Ltd.

发明人： Xiang Hui Zhao ,  Zui Xin Zeng ,  Jun Hu ,  Shi Zhang ,  Baoyou Chen

IPC分类号： H01L27/11582 ,  H01L27/11556 ,  H01L27/11573 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L27/11521 ,  H01L27/11529 ,  H01L27/11568 ,  H01L23/532

摘要： A method for forming a staircase structure of 3D memory, including: forming an alternating layer stack on a substrate, forming a plurality of staircase regions where each staircase region has a staircase structure having a first number (M) of steps in a first direction; forming a first mask stack to expose a plurality of the staircase regions; removing (M) of the layer stacks in the exposed staircase regions; forming a second mask stack over the alternating layer stack to expose at least an edge of each of the staircase regions in a second direction; and repetitively, sequentially, removing a portion of (2M) of layer stacks and trimming the second mask stack.

公开(公告)号：US11817348B2

公开(公告)日：2023-11-14

申请号：US16354822

申请日：2019-03-15

申请人： YANGTZE MEMORY TECHNOLOGIES CO., LTD.

发明人： Gang Yang ,  Xiang Hui Zhao ,  Biao Zheng ,  Zui Xin Zeng ,  Lianjuan Ren ,  Jian Dai

IPC分类号： H01L21/768 ,  H01L21/311

CPC分类号： H01L21/7681 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76877

摘要： Embodiments of the present disclosure provide a method for forming a hole structure in a semiconductor device. The method includes forming a first etch mask over a stack structure, and removing a portion of the stack structure exposed by the first etch mask. The first etch mask may have a first mask opening with a first lateral dimension. The method may also include forming a second etch mask from the first etch mask. The second etch mask may have a second mask opening with a second lateral dimension that is greater than the first lateral dimension. The method may further include removing another portion of the stack structure exposed by the second etch mask to form the hole structure having a first hole portion and a second hole portion connected to and over the first hole portion.

公开(公告)号：US20210104429A1

公开(公告)日：2021-04-08

申请号：US17100858

申请日：2020-11-21

申请人： YANGTZE MEMORY TECHNOLOGIES CO., LTD.

发明人： Gang Yang ,  Xiang Hui Zhao ,  Biao Zheng ,  Zui Xin Zeng ,  Lianjuan Ren ,  Jian Dai

IPC分类号： H01L21/768 ,  H01L21/311

摘要： Embodiments of the present disclosure provide a method for forming a hole structure in a semiconductor device. The method for forming a hole structure having a first hole portion and a second hole portion connected to and over the first portion in a stack structure of a semiconductor device includes determining a hard mask layer. An etching resistivity of the hard mask layer may be inversely proportional to a difference between a first lateral dimension of the first hole portion and a second lateral dimension of the second hole portion, and the first lateral dimension may be less than the second lateral dimension. The method may also include forming the hard mask layer over the stack structure, and patterning the hard mask layer to form a first patterned hard mask layer that has a first mask opening. The first mask opening may have the first lateral dimension. The method may further include removing a portion of the stack structure exposed by the first patterned hard mask layer to form an initial hole structure in the stack structure, and patterning the first patterned hard mask layer to form a second patterned mask layer that has a second mask opening. The second mask opening may have the second lateral dimension. The method may further include removing another portion of the stack structure exposed by the second patterned hard mask layer to form the hole structure.

公开(公告)号：US11997851B2

公开(公告)日：2024-05-28

申请号：US17004846

申请日：2020-08-27

申请人： Yangtze Memory Technologies Co., Ltd.

发明人： Xiang Hui Zhao ,  Zui Xin Zeng ,  Jun Hu ,  Shi Zhang ,  Baoyou Chen

IPC分类号： H10B41/50 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H10B41/27 ,  H10B41/30 ,  H10B41/41 ,  H10B43/27 ,  H10B43/30 ,  H10B43/40 ,  H10B43/50 ,  H01L23/532

CPC分类号： H10B43/40 ,  H01L21/76816 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/5283 ,  H10B41/27 ,  H10B41/30 ,  H10B41/41 ,  H10B41/50 ,  H10B43/27 ,  H10B43/30 ,  H10B43/50 ,  H01L23/53209 ,  H01L23/53214 ,  H01L23/53242 ,  H01L23/53257 ,  H01L23/53271 ,  H01L23/5329

摘要： A method for forming a staircase structure of 3D memory, including: forming an alternating layer stack on a substrate, forming a plurality of staircase regions where each staircase region has a staircase structure having a first number (M) of steps in a first direction; forming a first mask stack to expose a plurality of the staircase regions; removing (M) of the layer stacks in the exposed staircase regions; forming a second mask stack over the alternating layer stack to expose at least an edge of each of the staircase regions in a second direction; and repetitively, sequentially, removing a portion of (2M) of layer stacks and trimming the second mask stack.

公开(公告)号：US11876016B2

公开(公告)日：2024-01-16

申请号：US17100858

申请日：2020-11-21

申请人： YANGTZE MEMORY TECHNOLOGIES CO., LTD.

发明人： Gang Yang ,  Xiang Hui Zhao ,  Biao Zheng ,  Zui Xin Zeng ,  Lianjuan Ren ,  Jian Dai

IPC分类号： H01L21/768 ,  H01L21/311

CPC分类号： H01L21/7681 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76877

摘要： Embodiments of the present disclosure provide a method for forming a hole structure in a semiconductor device. The method for forming a hole structure having a first hole portion and a second hole portion connected to and over the first portion in a stack structure of a semiconductor device includes determining a hard mask layer. An etching resistivity of the hard mask layer may be inversely proportional to a difference between a first lateral dimension of the first hole portion and a second lateral dimension of the second hole portion, and the first lateral dimension may be less than the second lateral dimension. The method may also include forming the hard mask layer over the stack structure, and patterning the hard mask layer to form a first patterned hard mask layer that has a first mask opening. The first mask opening may have the first lateral dimension. The method may further include removing a portion of the stack structure exposed by the first patterned hard mask layer to form an initial hole structure in the stack structure, and patterning the first patterned hard mask layer to form a second patterned mask layer that has a second mask opening. The second mask opening may have the second lateral dimension. The method may further include removing another portion of the stack structure exposed by the second patterned hard mask layer to form the hole structure.

公开(公告)号：US20200243373A1

公开(公告)日：2020-07-30

申请号：US16354822

申请日：2019-03-15

申请人： YANGTZE MEMORY TECHNOLOGIES CO., LTD.

发明人： Gang Yang ,  Xiang Hui Zhao ,  Biao Zheng ,  Zui Xin Zeng ,  Lianjuan Ren ,  Jian Dai

IPC分类号： H01L21/768 ,  H01L21/311

摘要： Embodiments of the present disclosure provide a method for forming a hole structure in a semiconductor device. The method includes forming a first etch mask over a stack structure, and removing a portion of the stack structure exposed by the first etch mask. The first etch mask may have a first mask opening with a first lateral dimension. The method may also include forming a second etch mask from the first etch mask. The second etch mask may have a second mask opening with a second lateral dimension that is greater than the first lateral dimension. The method may further include removing another portion of the stack structure exposed by the second etch mask to form the hole structure having a first hole portion and a second hole portion connected to and over the first hole portion.