Systems and methods for utilizing circulant parity in a data processing system
    4.
    发明授权
    Systems and methods for utilizing circulant parity in a data processing system 有权
    在数据处理系统中利用循环奇偶校验的系统和方法

    公开(公告)号:US08458553B2

    公开(公告)日:2013-06-04

    申请号:US12510885

    申请日:2009-07-28

    IPC分类号: H03M13/00

    摘要: Various embodiments of the present invention provide systems and methods for data processing. For example, a method for data processing is disclosed that includes receiving a codeword that has at least a first circulant with a plurality of data bits and a first circulant parity bit, a second circulant with a plurality of data bits and a second circulant parity bit, and one or more codeword parity bits. The methods further include decoding the codeword using the one or more codeword parity bits to access the first circulant and the second circulant, performing a first circulant parity check on the first circulant, and performing a second circulant parity check on the second circulant.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 例如,公开了一种用于数据处理的方法,其包括:接收具有至少第一循环的码字,其具有多个数据位和第一循环奇偶校验位,第二循环具有多个数据位和第二循环奇偶校验位 ,以及一个或多个码字奇偶校验位。 所述方法还包括使用所述一个或多个码字奇偶校验比特来解码所述码字,以访问所述第一循环和所述第二循环,对所述第一循环执行第一循环奇偶校验,以及对所述第二循环执行第二循环奇偶校验。

    Systems and methods for non-binary decoding biasing control
    5.
    发明授权
    Systems and methods for non-binary decoding biasing control 有权
    用于非二进制解码偏移控制的系统和方法

    公开(公告)号:US08661324B2

    公开(公告)日:2014-02-25

    申请号:US13227538

    申请日:2011-09-08

    IPC分类号: H03M13/00

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a data detector circuit, a biasing circuit, and a data decoder circuit. The data detector circuit is operable to apply a data detection algorithm to a series of symbols to yield a detected output, and the detected output includes a series of soft decision data corresponding to non-binary symbols. The biasing circuit is operable apply a bias to each of the series of soft decision data to yield a series of biased soft decision data. The data decoder circuit is operable to apply a data decoding algorithm to the series of biased soft decision data corresponding to the non-binary symbols.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了包括数据检测器电路,偏置电路和数据解码器电路的数据处理电路。 数据检测器电路可操作以将数据检测算法应用于一系列符号以产生检测到的输出,并且所检测的输出包括与非二进制符号对应的一系列软判决数据。 偏置电路可操作地将偏置应用于该系列软判决数据中的每一个,以产生一系列偏置的软判决数据。 数据解码器电路可操作以将数据解码算法应用于对应于非二进制符号的一系列偏置软判决数据。

    Systems and Methods for Non-Binary Decoding Biasing Control
    6.
    发明申请
    Systems and Methods for Non-Binary Decoding Biasing Control 有权
    非二进制解码偏倚控制系统与方法

    公开(公告)号:US20130067297A1

    公开(公告)日:2013-03-14

    申请号:US13227538

    申请日:2011-09-08

    IPC分类号: H03M13/45 G06F11/10

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a data detector circuit, a biasing circuit, and a data decoder circuit. The data detector circuit is operable to apply a data detection algorithm to a series of symbols to yield a detected output, and the detected output includes a series of soft decision data corresponding to non-binary symbols. The biasing circuit is operable apply a bias to each of the series of soft decision data to yield a series of biased soft decision data. The data decoder circuit is operable to apply a data decoding algorithm to the series of biased soft decision data corresponding to the non-binary symbols.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了包括数据检测器电路,偏置电路和数据解码器电路的数据处理电路。 数据检测器电路可操作以将数据检测算法应用于一系列符号以产生检测到的输出,并且所检测的输出包括与非二进制符号对应的一系列软判决数据。 偏置电路可操作地将偏置应用于该系列软判决数据中的每一个,以产生一系列偏置的软判决数据。 数据解码器电路可操作以将数据解码算法应用于对应于非二进制符号的一系列偏置软判决数据。

    Systems and Methods for Generating Predictable Degradation Bias
    7.
    发明申请
    Systems and Methods for Generating Predictable Degradation Bias 有权
    用于产生可预测的降解偏差的系统和方法

    公开(公告)号:US20130063835A1

    公开(公告)日:2013-03-14

    申请号:US13227544

    申请日:2011-09-08

    IPC分类号: G11B5/03 G11C5/14 G11B5/035

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a data detector circuit and a bias calculation circuit. The data detector circuit is operable to apply a data detection algorithm to a first data set to yield a first series of soft decision data, and to apply the data detection algorithm to a second data set to yield a second series of soft decision data. The bias calculation circuit operable to calculate a series of bias values based at least in part on the first series of soft decision data and the second series of soft decision data. The series of bias values correspond to a conversion between the first series of soft decision data and the second series of soft decision data.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了包括数据检测器电路和偏置计算电路的数据处理电路。 数据检测器电路可操作以将数据检测算法应用于第一数据集以产生第一系列软判决数据,并将数据检测算法应用于第二数据集以产生第二系列软判决数据。 偏置计算电路可操作以至少部分地基于第一系列软判决数据和第二系列软判决数据来计算一系列偏置值。 一系列偏差值对应于第一系列软判决数据与第二系列软判决数据之间的转换。

    Turbo-equalization methods for iterative decoders
    9.
    发明授权
    Turbo-equalization methods for iterative decoders 有权
    用于迭代解码器的Turbo均衡方法

    公开(公告)号:US08291299B2

    公开(公告)日:2012-10-16

    申请号:US12524418

    申请日:2009-04-02

    IPC分类号: H03M13/00

    摘要: Certain embodiments of the present invention are improved turbo-equalization methods for decoding encoded codewords. In one embodiment, in global decoding iteration i, the magnitude values of all decoder-input LLR values (Lch) are adjusted based on the number b of unsatisfied check nodes in the decoded codeword produced by global iteration i−1. The improved turbo-equalization methods can be used as the sole turbo-equalization method for a given global decoding session, or interleaved with other turbo-equalization methods.

    摘要翻译: 本发明的某些实施例是用于解码编码码字的改进的turbo均衡方法。 在一个实施例中,在全局解码迭代i中,基于由全局迭代i-1产生的解码码字中的不满足的校验节点的数量b来调整所有解码器输入的LLR值(Lch)的幅度值。 改进的turbo均衡方法可以用作给定全局解码会话的唯一turbo均衡方法,或者与其他turbo均衡方法交织。

    Turbo-Equalization Methods For Iterative Decoders
    10.
    发明申请
    Turbo-Equalization Methods For Iterative Decoders 有权
    用于迭代解码器的涡轮均衡方法

    公开(公告)号:US20110311002A1

    公开(公告)日:2011-12-22

    申请号:US12524418

    申请日:2009-04-02

    IPC分类号: H04L27/06

    摘要: Certain embodiments of the present invention are improved turbo-equalization methods for decoding encoded codewords. In one embodiment, in global decoding iteration i, the magnitude values of all decoder-input LLR values (Lch) are adjusted based on the number b of unsatisfied check nodes in the decoded codeword produced by global iteration i−1. The improved turbo-equalization methods can be used as the sole turbo-equalization method for a given global decoding session, or interleaved with other turbo-equalization methods.

    摘要翻译: 本发明的某些实施例是用于解码编码码字的改进的turbo均衡方法。 在一个实施例中,在全局解码迭代i中,基于由全局迭代i-1产生的解码码字中的不满足的校验节点的数量b来调整所有解码器输入的LLR值(Lch)的幅度值。 改进的turbo均衡方法可以用作给定全局解码会话的唯一turbo均衡方法,或者与其他turbo均衡方法交织。