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公开(公告)号：US20240164117A1
公开(公告)日：2024-05-16
申请号：US18148805
申请日：2022-12-30
发明人： Quan Zhang , Yanwei Shi , Lan Yao , Cheng Chen , Boru Xie , Jing Li
IPC分类号： H10B80/00
CPC分类号： H10B80/00
摘要： The present disclosure provides an example semiconductor devices and fabrication methods thereof, and memory systems. In one example, the semiconductor device includes: a first chip including a first type of transistor that is planar transistor and a second chip bound on the first chip in the first direction. The second chip includes a second type of transistor that is fin transistor. The semiconductor device and the fabrication method thereof, and the memory system provided in the present disclosure can mitigate the bulk effect between transistors in adjacent two chips. Other examples are disclosed.
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公开(公告)号：US20240196621A1
公开(公告)日：2024-06-13
申请号：US18092109
申请日：2022-12-30
发明人： Zongliang Huo , Lei Xue , Wenbin Zhou , Wei Xu , Yanwei Shi , Zhengliang Xia , Han Yang , Xinwei Zou , Zhaohui Tang , Jiaji Wu , Cheng Chen
IPC分类号： H10B43/40 , H01L23/528 , H10B41/10 , H10B41/27 , H10B41/35 , H10B41/40 , H10B43/10 , H10B43/27 , H10B43/35
CPC分类号： H10B43/40 , H01L23/5283 , H10B41/10 , H10B41/27 , H10B41/35 , H10B41/40 , H10B43/10 , H10B43/27 , H10B43/35
摘要： A semiconductor device includes a base and a stack structure. The base includes a first surface defining at least one memory plane region. The stack structure is disposed on the first surface, and includes a first portion located at the edge of the memory plane region and a second portion different from the first portion. The first portion includes first contact structures penetrating through the stack structure in a first direction and extending to the base. The second portion includes second contact structures electrically connected with corresponding gate conductor layers in the stack structure. A top surface of the first contact structure away from the base is flush with a top surface of the second contact structure away from the base.
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