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公开(公告)号：US12021030B2
公开(公告)日：2024-06-25
申请号：US17219949
申请日：2021-04-01
发明人： Wei Xu , Qingqing Wang , Jinxing Chen , Guanglong Fan , Huichao Liu
IPC分类号： H01L23/535 , H01L21/3105 , H01L21/768 , H01L27/00 , H10B43/27
CPC分类号： H01L23/535 , H01L21/31053 , H01L21/76805 , H01L21/76819 , H01L21/76895 , H10B43/27
摘要： Aspects of the disclosure provide a semiconductor device. The semiconductor device can include a trench formed in a first dielectric layer, a trench filler layer that fills a portion of the trench, a conductive layer over the trench filler layer, and a second dielectric layer over the conductive layer. The second dielectric layer is disposed in the trench. The semiconductor device can also include a contact structure configured to connect to the conductive layer through a hole in the second dielectric layer.
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公开(公告)号：US11805650B2
公开(公告)日：2023-10-31
申请号：US17550580
申请日：2021-12-14
发明人： Wenxiang Xu , Wei Xu , Pan Huang , Ji Xia
IPC分类号： H01L27/11582 , H10B43/27 , H10B43/10 , H10B43/35
摘要： Embodiments of structure and methods for forming a three-dimensional (3D) memory device are provided. In an example, a method for forming a 3D memory device includes the following operations. First, a slit structure and a support structure are formed in a stack structure having interleaved a plurality of sacrificial material layers and a plurality of insulating material layers, the initial support structure between adjacent slit openings of the slit structure. A source structure is formed to include a source portion in each of the slit openings. A pair of first portions of a connection layer is formed in contact with and conductively connected to the source portion. A second portion of the connection layer is formed in contact with and conductively to the pair of first portions of the connection layer.
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公开(公告)号：US11792980B2
公开(公告)日：2023-10-17
申请号：US17532131
申请日：2021-11-22
发明人： Ji Xia , Wei Xu , Pan Huang , Wenxiang Xu , Beihan Wang
IPC分类号： H01L21/768 , H10B41/27 , G11C5/04 , G11C5/06 , G11C16/04 , H01L23/528 , H01L23/532 , H10B43/27
CPC分类号： H10B41/27 , G11C5/04 , G11C5/06 , G11C16/04 , H01L21/76838 , H01L23/528 , H01L23/53214 , H01L23/53228 , H01L23/53257 , H10B43/27
摘要： Embodiments of structure and methods for forming a three-dimensional (3D) memory device are provided. In an example, a method for forming a 3D memory device includes forming a first source contact portion in a substrate, forming a dielectric stack over the first source contact portion, and forming a slit opening extending in the dielectric stack and exposing the first source contact portion. The method also includes forming a plurality of conductor layers through the slit opening and form a second source contact portion in the slit opening and in contact with the first source contact portion.
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公开(公告)号：US11437398B2
公开(公告)日：2022-09-06
申请号：US16863203
申请日：2020-04-30
发明人： Wenxiang Xu , Wei Xu , Pan Huang , Ji Xia
IPC分类号： H01L27/11582 , H01L27/11565 , H01L27/1157
摘要： Embodiments of structure and methods for forming a three-dimensional (3D) memory device are provided. In an example, a 3D memory device includes a memory stack over a substrate, a plurality of channel structures, a source structure, and a support structure. The memory stack includes interleaved a plurality of conductor layers and a plurality of insulating layers. The plurality of channel structures extend vertically in the memory stack. The source structure includes a plurality of source portions and extending in the memory stack. The support structure is between adjacent ones of the source portions and has a plurality of interleaved conductor portions and insulating portions. A top one of the conductor portions is in contact with a top one of the conductor layers. Adjacent ones of the source portions are conductively connected to one another.
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公开(公告)号：US20220085042A1
公开(公告)日：2022-03-17
申请号：US17532675
申请日：2021-11-22
发明人： Wenxiang XU , Haohao Yang , Pan Huang , Ping Yan , Zongliang Huo , Wenbin Zhou , Wei Xu
IPC分类号： H01L27/11539 , H01L23/522 , H01L27/11519 , H01L27/11556 , H01L27/11565 , H01L27/11582
摘要： Embodiments of three-dimensional (3D) memory devices and fabricating methods thereof are disclosed. The method includes: forming an alternating dielectric stack on a substrate; forming a structure strengthen plug in an upper portion of the alternating dielectric stack, wherein the structure strengthen plug has a narrow support body and two enlarged connecting portions; forming a gate line silt in the alternating dielectric stack to expose a sidewall of one enlarged connecting portion of the structure strengthen plug; and forming a gate line slit structure in the gate line slit including an enlarged end portion connected to the one enlarged connecting portion of the structure strengthen plug.
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公开(公告)号：US11183512B2
公开(公告)日：2021-11-23
申请号：US16670571
申请日：2019-10-31
发明人： Zongliang Huo , Haohao Yang , Wei Xu , Ping Yan , Pan Huang , Wenbin Zhou
IPC分类号： H01L27/11582 , H01L21/311 , H01L27/11556
摘要： Embodiments of structure and methods for forming a three-dimensional (3D) memory device are provided. In an example, a 3D memory device includes a memory stack, a plurality of channel structures, a slit structure, and a source structure. The memory stack may be over a substrate and may include interleaved a plurality of conductor layers and a plurality of insulating layers extending laterally in the memory stack. The plurality of channel structures may extend vertically through the memory stack into the substrate. The slit structure may extend vertically and laterally in the memory stack and divide the plurality of memory cells into at least one memory block. The slit structure may include a plurality of protruding portions and a plurality of recessed portions arranged vertically along a sidewall of the slit structure.
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公开(公告)号：US11094712B2
公开(公告)日：2021-08-17
申请号：US16670579
申请日：2019-10-31
发明人： Zongliang Huo , Haohao Yang , Wei Xu , Ping Yan , Pan Huang , Wenbin Zhou
IPC分类号： H01L27/11582 , H01L23/522 , H01L27/11565 , H01L27/1157 , H01L23/528
摘要： Embodiments of structure and methods for forming a three-dimensional (3D) memory device are provided. In an example, a 3D memory device includes a stack structure and at least one source structure extending vertically and laterally and dividing the stack structure into a plurality of block regions. The stack structure may include a plurality of conductor layers and a plurality of insulating layers interleaved over a substrate. The at least one source structure includes at least one support structure extending along the vertical direction to the substrate, the at least one support structure being in contact with at least a sidewall of the respective source structure.
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公开(公告)号：US20210066336A1
公开(公告)日：2021-03-04
申请号：US16689513
申请日：2019-11-20
发明人： Qingqing Wang , Wei Xu , Pan Huang , Ping Yan , Zongliang Huo , Wenbin Zhou
IPC分类号： H01L27/11582 , H01L23/528 , H01L27/1157 , H01L27/11565
摘要： A three-dimensional (3D) memory device includes a memory stack over a substrate. The memory stack includes interleaved conductor layers and insulating layers. The 3D memory device also includes channel structures extending vertically in the memory stack. The 3D memory device further includes a source structure extending in the memory stack. The source structure includes first and second source contacts separated by a support structure. The source structure also includes an adhesion layer. At least a portion of the adhesion layer is between the first and second source contacts and conductively connects the first and second source contacts.
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公开(公告)号：US12052871B2
公开(公告)日：2024-07-30
申请号：US17496031
申请日：2021-10-07
发明人： Ji Xia , Zongliang Huo , Wenbin Zhou , Wei Xu , Pan Huang , Wenxiang Xu
摘要： Embodiments of a three-dimensional (3D) memory device and fabrication methods are disclosed. In some embodiments, the method for forming the 3D memory device includes forming an alternating dielectric stack on a substrate, and forming channel holes that penetrate the alternating dielectric stack and expose at least a portion of the substrate. The method further includes forming top select gate openings that penetrate vertically an upper portion of the alternating dielectric stack and extend laterally. The method also includes forming slit openings parallel to the top select gate openings, wherein the slit openings penetrate vertically the alternating dielectric stack. The method also includes replacing the alternating dielectric stack with a film stack of alternating conductive and dielectric layers, forming top select gate cuts in the top select gate openings, and forming slit structures in the slit openings.
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公开(公告)号：US12035523B2
公开(公告)日：2024-07-09
申请号：US17532675
申请日：2021-11-22
发明人： Wenxiang Xu , Haohao Yang , Pan Huang , Ping Yan , Zongliang Huo , Wenbin Zhou , Wei Xu
摘要： Embodiments of three-dimensional (3D) memory devices and fabricating methods thereof are disclosed. The method includes: forming an alternating dielectric stack on a substrate; forming a structure strengthen plug in an upper portion of the alternating dielectric stack, wherein the structure strengthen plug has a narrow support body and two enlarged connecting portions; forming a gate line silt in the alternating dielectric stack to expose a sidewall of one enlarged connecting portion of the structure strengthen plug; and forming a gate line slit structure in the gate line slit including an enlarged end portion connected to the one enlarged connecting portion of the structure strengthen plug.
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