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公开(公告)号：US20240202909A1
公开(公告)日：2024-06-20
申请号：US18090146
申请日：2022-12-28
发明人： Wenqi WANG , Wenlong LI , Ban WANG , Jinxing CHEN , Yanli WANG , Zongliang HUO
CPC分类号： G06T7/001 , G06T7/13 , G06T7/136 , G06T7/70 , G06T2207/10024 , G06T2207/20021 , G06T2207/30148
摘要： A method for detecting word line shorts in a memory device includes: determining a region of interest (ROI) region in a bright voltage contrast (BVC) image for contact through-holes (CTs) of word lines in the memory device, the CTs comprising first CTs in at least one first word line that is electronically charged and second CTs in at least one second word line that is not electronically charged, and the ROI region comprising the at least one first word line; determining coordinates of each CT in the ROI region; reviewing a grayscale value at a position of the coordinates of each CT in the ROI region to determine whether the CT is a defective CT; and displaying the defective CT in response to the defective CT being determined.
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公开(公告)号：US20240203493A1
公开(公告)日：2024-06-20
申请号：US18090113
申请日：2022-12-28
发明人： Hanxiao LI , Jinxing CHEN , Guanglong FAN , Yanli WANG
IPC分类号： G11C16/04 , H01L23/522 , H10B41/10 , H10B41/27 , H10B41/35 , H10B43/10 , H10B43/27 , H10B43/35
CPC分类号： G11C16/0483 , H01L23/5226 , H10B41/10 , H10B41/27 , H10B41/35 , H10B43/10 , H10B43/27 , H10B43/35
摘要： A semiconductor device includes a memory cell wafer. The memory cell wafer includes a dielectric layer, a conductor layer over the dielectric layer, one or more through contacts penetrating through the dielectric layer and the conductor layer, and an isolator surrounding a region of the conductor layer and at least one of the one or more through contacts in a horizontal direction and extending vertically through the conductor layer to be connected to the dielectric layer. The region of the conductor layer surrounded by the isolator is isolated from other portions of the conductor layer. Each of the one or more through contacts includes a column part in the dielectric layer and a pad part in the conductor layer.
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3.发明公开公开(公告)号：US20240177292A1
公开(公告)日：2024-05-30
申请号：US18090174
申请日：2022-12-28
发明人： Wenqi WANG , Guangdian CHEN , Jinxing CHEN , Yanli WANG , Zongliang HUO
CPC分类号： G06T7/0008 , G06T5/30 , G06T5/50 , G06V10/28 , G06V10/46 , H04N1/40012 , G06T2207/20221 , G06T2207/20224 , G06V2201/07
摘要： A method of determining coordinates of contact through-holes (CTs) in a memory device includes: obtaining a bright voltage contrast (BVC) image including a plurality of CTs in the memory device; converting color components in the BVC image into grayscale values to obtain a grayscale BVC image; performing a dilation process on the grayscale BVC image to obtain a dilated grayscale BVC image; calculating a first threshold for the dilated grayscale BVC image and determining whether the first threshold is greater than or equal to a pre-determined value; in response to the first threshold being greater than or equal to the pre-determined value, performing a first image process on the dilated grayscale BVC image to obtain coordinates of each CT; and in response to the first threshold being smaller than the pre-determined value, performing a second image process on the dilated grayscale BVC image to obtain the coordinates of each CT.
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