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1.发明授权Computer system to perform a filter operation using a logarithm and inverse-logarithm converter and methods thereof 失效使用对数和反对数转换器执行滤波操作的计算机系统及其方法
公开(公告)号：US6032168A
公开(公告)日：2000-02-29
申请号：US911711
申请日：1997-08-15
申请人： Yaron Ben-Arie , Effi Orian , Itzhak Barak , Jacob Kirschenbaum , Doron Kolton , Shay-Ping Thomas Wang , Shao-Wei Pan , Stephen-Chih-Hung Ma
发明人： Yaron Ben-Arie , Effi Orian , Itzhak Barak , Jacob Kirschenbaum , Doron Kolton , Shay-Ping Thomas Wang , Shao-Wei Pan , Stephen-Chih-Hung Ma
CPC分类号： H03H17/0226 , G06F7/5443 , H03H17/0261 , G06F2207/3884 , G06F7/483
摘要： In a parallel computer system having N parallel computing units a data pipeline connects all the computing units. In addition the computing units are coupled to a random access memory so that each computing unit is assigned to one column of the memory array. To perform a digital signal processing filter operation the required coefficients are stored in the memory so that one or more different filter operations can be carried out in an interleaved way.
摘要翻译： 在具有N个并行计算单元的并行计算机系统中，数据流水线连接所有计算单元。 此外，计算单元耦合到随机存取存储器，使得每个计算单元被分配给存储器阵列的一列。 为了执行数字信号处理滤波器操作，所需的系数被存储在存储器中，使得可以以交错的方式执行一个或多个不同的滤波器操作。
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公开(公告)号：US6061023A
公开(公告)日：2000-05-09
申请号：US963485
申请日：1997-11-03
申请人： Sam Mordochai Daniel , Stephen Chih-Hung Ma , Keith Vaclav Warble , Shao-Wei Pan , Shay-Ping Thomas Wang
发明人： Sam Mordochai Daniel , Stephen Chih-Hung Ma , Keith Vaclav Warble , Shao-Wei Pan , Shay-Ping Thomas Wang
IPC分类号： G01S7/28 , H01Q3/26 , H04B7/10 , H04B7/185 , H04B7/204 , H04W28/04 , H04W84/06 , H04R7/185 , H01Q3/22
CPC分类号： G01S7/2813 , H01Q3/2611 , H04B7/2041 , H04W84/06
摘要： An enhanced digital beamformer (EDBF) (210, FIG. 2) is provided for use in a transceiver subsystem (200, FIG. 2) for mitigating interference and increasing the frequency reuse factor in communication systems. The EDBF is used to produce wide nulls (520, FIG. 5) in at least one steerable antenna beam pattern. By directing wide nulls at undesired signals, the EDBF provides a more efficient processing of antenna beam patterns in communication systems. The EDBF is used in geostationary satellites, non-geostationary satellites, and terrestrial communication devices. The EDBF combines a unique algorithm, a special processor, and an array antenna to significantly improve the capacity of current and future communication systems, while remaining compatible with existing modulation techniques.
摘要翻译： 增强数字波束形成器（EDBF）（210，图2）被提供用于收发器子系统（图2中的200），用于减轻干扰并增加通信系统中的频率重用因子。 EDBF用于在至少一个可导向天线波束图案中产生宽空值（520，图5）。 通过在不期望的信号处引导宽的零点，EDBF在通信系统中提供更有效的天线波束图案的处理。 EDBF用于对地静止卫星，非对地静止卫星和地面通信设备。 EDBF结合了独特的算法，特殊处理器和阵列天线，以显着提高当前和未来通信系统的容量，同时保持与现有调制技术的兼容性。
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3.发明授权
公开(公告)号：US5701391A
公开(公告)日：1997-12-23
申请号：US558582
申请日：1995-10-31
CPC分类号： G10L19/0204 , G10L25/93
摘要： A speech signal is sampled to form a sequence of speech data and segmented into segments. The envelope of each segment is detected to form an envelope segment. Each datum of the segment is divided by each datum of the envelope segment to form a de-envelope segment which is transformed into spectral components. Dominant frequencies are determined for the spectral components with greatest magnitudes. Envelope coefficients are generated by fitting a polynomial function to the segment. Phase parameters are generated representing a phase of each of the dominant spectral components. The dominant frequencies, the envelope coefficients and the phase parameters are generated as compressed speech data for each voiced segment. For each unvoiced segment, a carrier frequency, an amplitude and at least one sideband frequency of an amplitude modulation component are generated as the compressed speech data.
摘要翻译： 语音信号被采样以形成语音数据序列并被分段成段。 检测每个段的包络线以形成包络线段。 该段的每个数据被包络线段的每个数据划分，以形成被转换为频谱分量的去包络线段。 对于具有最大幅度的光谱分量确定主要频率。 通过将多项式函数拟合到段来生成包络系数。 产生表示每个主要谱分量的相位的相位参数。 主频，包络系数和相位参数作为每个浊音段的压缩语音数据产生。 对于每个无声段，生成幅度调制分量的载波频率，幅度和至少一个边带频率作为压缩语音数据。
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公开(公告)号：US5941939A
公开(公告)日：1999-08-24
申请号：US881903
申请日：1997-06-25
CPC分类号： H03M7/50 , G06F1/0356 , G06F2101/10
摘要： A converter, which may be used for implementing either logarithmic or inverse-logarithmic functions, includes a memory, a multiplier, and an adder. The memory stores a plurality of parameters which are derived using a least squares method to estimate a logarithmic or inverse-logarithmic function over a domain of input values.
摘要翻译： A转换器，其可以被用于实现任一对数或反对数函数，包括存储器，乘法器和加法器。 所述存储器存储多个被使用最小二乘法来估计在输入值的域的对数或反对数函数导出的参数。
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5.发明授权
公开(公告)号：US5696875A
公开(公告)日：1997-12-09
申请号：US550724
申请日：1995-10-31
CPC分类号： G10L19/0204
摘要： A speech signal is sampled to form a sequence of speech data. The sequence of speech data is segmented into overlapping segments. Speech coefficients are generated by fitting each segment to a nonlinear predictive coding equation. The nonlinear predictive coding equation includes a linear predictive coding equation with linear terms, and additionally includes at least one cross term that is proportional to a product of two or more of the linear terms. If the segment is voiced, a sinusoidal term is included in the nonlinear predictive coding equation and sinusoidal parameters are generated. Otherwise, a noise term is included in the nonlinear predictive coding equation. The speech coefficients, a voiced bit, and, if the segment is voiced, the sinusoidal parameters are included as compressed speech data.
摘要翻译： 语音信号被采样以形成语音数据序列。 语音数据的序列被分割成重叠的段。 通过将每个段拟合到非线性预测编码方程来产生语音系数。 非线性预测编码方程包括具有线性项的线性预测编码方程，并且还包括与两个或多个线性项的乘积成比例的至少一个交叉项。 如果该段是有声的，则在非线性预测编码方程中包括正弦项，并且产生正弦参数。 否则，噪声项被包括在非线性预测编码方程中。 语音系数，有声位，以及如果该段是有声的，则将正弦参数包括为压缩语音数据。
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6.发明授权
公开(公告)号：US5771391A
公开(公告)日：1998-06-23
申请号：US520666
申请日：1995-08-28
CPC分类号： G06F7/4833 , G06F17/10 , G06F1/0307 , G06F2207/3884 , G06F7/5235
摘要： A computer processor that performs operations in a logarithmic number system (LNS) domain includes a log converter (20) which generates log signals, a data pipeline (22), a plurality of processing elements (231a-f) coupled to respective stages (24a-d) of the data pipeline, an inverse-log converter (28), and a programmable accumulator (232) that performs various summing operations to produce an output signal. An instruction, selected from a set of instructions, is decoded by a control unit (234) to configure the computer processor to perform operations on one or more data streams. Mathematical operations that can be performed by the processor include matrix multiplication, matrix-inversion, fast Fourier transforms (FFT), auto-correlation, cross-correlation, discrete cosine transforms (DCT), polynomial equations, and difference equations in general, such as those used to approximate infinite impulse response (IIR) and finite impulse response (FIR) filters. The computer processor can be used as a co-processor (340) in a general purpose computer system.
摘要翻译： 在对数数字系统（LNS）域中执行操作的计算机处理器包括生成日志信号的对数转换器（20），数据流水线（22），耦合到各个级（24a）的多个处理元件（231a-f） -d），反向对数转换器（28）和可编程累加器（232），其执行各种求和操作以产生输出信号。 从一组指令中选择的指令由控制单元（234）解码，以配置计算机处理器对一个或多个数据流执行操作。 可以由处理器执行的数学运算包括矩阵乘法，矩阵反转，快速傅里叶变换（FFT），自相关，互相关，离散余弦变换（DCT），多项式方程和一般的差分方程，如 用于近似无限脉冲响应（IIR）和有限脉冲响应（FIR）滤波器的那些。 计算机处理器可以用作通用计算机系统中的协处理器（340）。
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7.发明授权Computer Processor utilizing logarithmic conversion and method of use thereof 失效利用对数转换的计算机处理器及其使用方法
公开(公告)号：US5685008A
公开(公告)日：1997-11-04
申请号：US403158
申请日：1995-03-13
申请人： Shao Wei Pan , Shay-Ping Thomas Wang , Scott Edward Lloyd , Nicholas Mikulas Labun , David Alan Hayner
发明人： Shao Wei Pan , Shay-Ping Thomas Wang , Scott Edward Lloyd , Nicholas Mikulas Labun , David Alan Hayner
CPC分类号： G06F7/48 , G06F1/0307 , G06F7/5235
摘要： A computer processor for performing mathematical operations includes a logarithm converter which generates log values on a data bus, a plurality of processing elements connected to the data bus, an inverse-logarithm converter which receives values from the processing elements, an accumulator which sums converted values from the inverse-logarithm converter, and a control unit for configuring the accumulator to perform various summing operations. The computer processor also includes a switch for providing processor outputs as feedback. An instruction, selected from a set of instructions, is decoded by the control unit to configure the computer processor to perform operations on a data stream.
摘要翻译： 用于执行数学运算的计算机处理器包括对数转换器，其在数据总线上生成对数值，连接到数据总线的多个处理元件，从对该处理元件接收值的反对数转换器，将转换值相加的累加器 以及用于配置所述累加器以执行各种求和操作的控制单元。 计算机处理器还包括用于提供处理器输出作为反馈的开关。 由一组指令选择的指令由控制单元解码以配置计算机处理器对数据流执行操作。
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8.发明授权Computer processor having a pipelined architecture which utilizes feedback and method of using same 失效具有流水线结构的计算机处理器，其利用反馈和使用其的方法
公开(公告)号：US5657263A
公开(公告)日：1997-08-12
申请号：US520145
申请日：1995-08-28
CPC分类号： G06F7/4833 , G06F7/49 , G06F2207/3884
摘要： A computer processor that performs operations in a logarithmic number system (LNS) domain includes an input log converter (20), a feedback log converter (303), a first data pipeline (304), a second data pipeline (306), a plurality of processing elements (26a-f) coupled to respective stages of the data pipelines, an inverse-log converter (28), and a programmable accumulator (232) which produces output signals. An instruction, selected from a set of instructions, is decoded by a control unit (235) to configure the computer processor to perform operations on one or more data streams. Mathematical operations that can be performed by the processor include matrix multiplication, matrix-inversion, fast Fourier transforms (FFT), auto-correlation, cross-correlation, discrete cosine transforms (DCT), polynomial equations, and difference equations in general, such as those used to approximate infinite impulse response (IIR) and finite impulse response (FIR) filters. The computer processor can be used as a co-processor (340) in a general purpose computer system.
摘要翻译： 执行对数编号系统（LNS）域中的操作的计算机处理器包括输入日志转换器（20），反馈日志转换器（303），第一数据流水线（304），第二数据流水线（306），多个 耦合到数据管线的各个级的处理元件（26a-f），反向对数转换器（28）和产生输出信号的可编程累加器（232）。 从一组指令中选择的指令由控制单元（235）解码，以配置计算机处理器对一个或多个数据流执行操作。 可以由处理器执行的数学运算包括矩阵乘法，矩阵反转，快速傅里叶变换（FFT），自相关，互相关，离散余弦变换（DCT），多项式方程和一般的差分方程，如 用于近似无限脉冲响应（IIR）和有限脉冲响应（FIR）滤波器的那些。 计算机处理器可以用作通用计算机系统中的协处理器（340）。
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9.发明授权Communications device responsive to spoken commands and methods of using same 失效响应于口头命令的通信设备和使用它的方法
公开(公告)号：US5749072A
公开(公告)日：1998-05-05
申请号：US579714
申请日：1995-12-28
CPC分类号： G06N3/0454 , G06K9/6287 , G10L15/16 , G10L15/26 , G10L15/02 , G10L15/063 , G10L15/10
摘要： A communications device (20) that is responsive to voice commands is provided. The communications device (20) can be a two-way radio, cellular telephone, PDA, or pager. The communications device (20) includes an interface (22) for allowing a user to access a communications channel according a control signal and a speech-recognition system (24) for producing the control signal in response to a voice command. Included in the speech recognition system (24) are a feature extractor (26) and one or more classifiers (28) utilizing polynomial discriminant functions.
摘要翻译： 提供响应于语音命令的通信设备（20）。 通信设备（20）可以是双向无线电，蜂窝电话，PDA或寻呼机。 通信设备（20）包括用于允许用户根据控制信号访问通信信道的接口（22）和用于响应于语音命令产生控制信号的语音识别系统（24）。 包括在语音识别系统（24）中的是特征提取器（26）和利用多项式判别函数的一个或多个分类器（28）。
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10.发明授权Computer processor utilizing logarithmic conversion and method of use thereof 失效利用对数转换的计算机处理器及其使用方法
公开(公告)号：US5696986A
公开(公告)日：1997-12-09
申请号：US512849
申请日：1995-08-09
CPC分类号： G06F7/48 , G06F1/0307 , G06F7/5235
摘要： A computer processor for performing mathematical operations includes a logarithm converter which generates log values on a data bus, a plurality of processing elements connected to the data bus, an inverse-logarithm converter which receives values from the processing elements, an accumulator which sums converted values from the inverse-logarithm converter, and a control unit for configuring the accumulator to perform various summing operations. The computer processor also includes a switch for providing processor outputs as feedback. An instruction, selected from a set of instructions, is decoded by the control unit to configure the computer processor to perform operations on a data stream.
摘要翻译： 用于执行数学运算的计算机处理器包括对数转换器，其在数据总线上生成对数值，连接到数据总线的多个处理元件，从对该处理元件接收值的反对数转换器，将转换值相加的累加器 以及用于配置所述累加器以执行各种求和操作的控制单元。 计算机处理器还包括用于提供处理器输出作为反馈的开关。 由一组指令选择的指令由控制单元解码以配置计算机处理器对数据流执行操作。
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