Information recording medium and process for producing the same
    1.
    发明授权
    Information recording medium and process for producing the same 有权
    信息记录介质及其制造方法

    公开(公告)号:US07524612B2

    公开(公告)日:2009-04-28

    申请号:US10516244

    申请日:2003-05-23

    IPC分类号: G11B7/24

    摘要: An information recording medium has an excellent jitter characteristic with a considerable difference in reflectance between prior to and subsequent to recording. The information recording medium includes a recording layer which contains a material having a reflectance which varies by irradiation of a light beam, on which information is recorded as reflectance variations, and a substrate for supporting the recording layer, the recording layer including a metal nitride as a major component. In a method of manufacturing the information recording medium having a recording layer which includes a material having a reflectance which varies by irradiation of a light beam, on which information is recorded as reflectance variations, and the substrate for supporting the recording layer, the recording layer including a metal nitride as a major component, the method includes a recording layer forming step for forming the recording layer by a reactive sputtering method which uses a target comprised of a metal constituting a metal nitride, wherein a flow ratio Ar:N2 in an atmosphere including Ar and N2 in the recording layer forming step is set within the range of 80:10 to 10:80.

    摘要翻译: 信息记录介质具有优异的抖动特性,在记录之前和之后具有相当大的反射率差异。 该信息记录介质包括一记录层,该记录层含有具有反射率的材料,其反射率随着光束的照射而变化,信息被记录为反射率变化,以及用于支撑该记录层的基板,该记录层包括一金属氮化物 一个主要组成部分。 在制造具有记录层的信息记录介质的方法中,记录层包括具有通过照射光束而变化的反射率的材料,其上记录信息作为反射率变化,以及用于支撑记录层的基板,记录层 包括金属氮化物作为主要成分的方法,所述方法包括用反应溅射法形成记录层的记录层形成步骤,所述反应溅射法使用由构成金属氮化物的金属组成的靶,其中气氛中的流量比Ar:N 2 包括记录层形成步骤中的Ar和N 2设定在80:10至10:80的范围内。

    Information recording medium and process for producing the same
    2.
    发明申请
    Information recording medium and process for producing the same 有权
    信息记录介质及其制造方法

    公开(公告)号:US20050233247A1

    公开(公告)日:2005-10-20

    申请号:US10516244

    申请日:2003-05-23

    摘要: An information recording medium has an excellent jitter characteristic with a considerable difference in reflectance between prior to and subsequent to recording. The information recording medium includes a recording layer which contains a material having a reflectance which varies by irradiation of a light beam, on which information is recorded as reflectance variations, and a substrate for supporting the recording layer, the recording layer including a metal nitride as a major component. In a method of manufacturing the information recording medium having a recording layer which includes a material having a reflectance which varies by irradiation of a light beam, on which information is recorded as reflectance variations, and the substrate for supporting the recording layer, the recording layer including a metal nitride as a major component, the method includes a recording layer forming step for forming the recording layer by a reactive sputtering method which uses a target comprised of a metal constituting a metal nitride, wherein a flow ratio Ar:N2 in an atmosphere including Ar and N2 in the recording layer forming step is set within the range of 80:10 to 10:80.

    摘要翻译: 信息记录介质具有优异的抖动特性,在记录之前和之后具有相当大的反射率差异。 该信息记录介质包括一记录层,该记录层含有具有反射率的材料,其反射率随着光束的照射而变化,信息被记录为反射率变化,以及用于支撑该记录层的基板,该记录层包括一金属氮化物 一个主要组成部分。 在制造具有记录层的信息记录介质的方法中,记录层包括具有通过照射光束而变化的反射率的材料,其上记录信息作为反射率变化,以及用于支撑记录层的基板,记录层 包括金属氮化物作为主要成分,该方法包括用反应溅射法形成记录层的记录层形成步骤,该方法使用由构成金属氮化物的金属组成的靶,其中流动比Ar: 在记录层形成步骤中包括Ar和N 2 的气氛中,将其设定在80:10至10:80的范围内。

    Memory controller, nonvolatile storage device, nonvolatile storage system, and nonvolatile memory address management method
    3.
    发明授权
    Memory controller, nonvolatile storage device, nonvolatile storage system, and nonvolatile memory address management method 失效
    内存控制器,非易失性存储设备,非易失性存储系统和非易失性存储器地址管理方法

    公开(公告)号:US08051268B2

    公开(公告)日:2011-11-01

    申请号:US11814202

    申请日:2006-07-21

    IPC分类号: G06F12/00

    摘要: For address management of a nonvolatile memory, the whole logical address space is divided into logical address ranges (0 to 15), and the physical address space is divided into physical areas (segments (0 to 15)). The logical address ranges are respectively associated with the physical areas (segments) to manage the addresses. The sizes of the logical address ranges are equalized. The size of the physical area (segment (0)) corresponding to the logical address range (0) in which data of high rewrite frequency such as an FAT is expected to be stored is larger than those of the other physical areas, and the logical address ranges and the physical areas are allocated. Alternatively, the sizes of the physical areas are equalized, and the size of the logical address range (0) is set as a smaller one than those of the other logical address ranges. With this, the actual rewrite frequencies of the physical areas (segments) are equal to one another, and consequently the life of the nonvolatile memory can be prolonged.

    摘要翻译: 对于非易失性存储器的地址管理,整个逻辑地址空间被划分为逻辑地址范围(0至15),物理地址空间被划分为物理区域(段(0至15))。 逻辑地址范围分别与物理区域(段)相关联以管理地址。 逻辑地址范围的大小相等。 对应于期望存储诸如FAT的高重写频率的数据的逻辑地址范围(0)的物理区域(段(0))的大小大于其他物理区域的大小,并且逻辑 地址范围和物理区域被分配。 或者,物理区域的大小相等,并且逻辑地址范围(0)的大小被设置为比其他逻辑地址范围的大小小。 由此,物理区域(段)的实际重写频率彼此相等,因此可以延长非易失性存储器的寿命。

    Storage device with buffer control unit
    4.
    发明授权
    Storage device with buffer control unit 有权
    带缓冲控制单元的存储设备

    公开(公告)号:US07818477B2

    公开(公告)日:2010-10-19

    申请号:US11909749

    申请日:2006-03-24

    摘要: When a control unit (160) in a storage device (100) detects that a write end command or a data amount to be written has been transmitted from a host device (110), the control unit (160) saves control information required for writing data in a control information save memory (142). The control unit (160) also saves data which has not been written in storage medium into a buffer save memory (152) from a data buffer (151) and releases the busy state for the host device (110). The control unit (160) writes the saved data into a storage medium (120). Even if the power is turned OFF before completion of write, write can be performed into the storage medium (120) by using the saved data when the power is turned ON next time.

    摘要翻译: 当存储装置(100)中的控制单元(160)检测到从主机(110)发送写入结束命令或写入数据量时,控制单元(160)保存写入所需的控制信息 控制信息中的数据保存存储器(142)。 控制单元(160)还将从存储介质中未被写入的数据从数据缓冲器(151)保存到缓冲存储器(152)中,并且释放主机设备(110)的忙状态。 控制单元(160)将保存的数据写入存储介质(120)。 即使在完成写入之前电源被关闭,当下一次接通电源时,也可以通过使用保存的数据来对存储介质(120)进行写入。

    Memory card, data processor,memory card control method and memory card setting
    6.
    发明申请
    Memory card, data processor,memory card control method and memory card setting 失效
    存储卡,数据处理器,存储卡控制方式和存储卡设置

    公开(公告)号:US20070186040A1

    公开(公告)日:2007-08-09

    申请号:US10597650

    申请日:2005-02-02

    IPC分类号: G06F12/00

    摘要: A memory card (1) includes a host interface (2) that transmits and receives a command and data to and from the data processor (50), a nonvolatile memory (7) that stores data, a controller (3) that controls the operation of the memory card, and a storage section (32) that stores specified management information. The management information includes retry setting information which specifies whether a retry function is executed or not when an error occurs during an operation of writing data to the nonvolatile memory. The controller (3) refers to the retry setting information in the data writing operation, and controls the data writing operation so as to disable the retry function in the event of an error in the data writing operation, when the retry setting information indicates disabling of the retry function or to enable the retry function in the event of an error in the data writing operation, when the retry setting information indicates enabling of the retry function.

    摘要翻译: 存储卡(1)包括向数据处理器(50)发送和接收命令和数据的主机接口(2),存储数据的非易失性存储器(7),控制操作的控制器(3) 以及存储指定的管理信息的存储部(32)。 管理信息包括重试设置信息,其在向非易失性存储器写入数据的操作期间发生错误时指定是否执行重试功能。 控制器(3)参考数据写入操作中的重试设置信息,并且当重试设置信息指示禁用时,控制数据写入操作以便在数据写入操作中发生错误的情况下禁用重试功能 重试功能,或者当重试设置信息指示重试功能的启用时,在数据写入操作中发生错误的情况下启用重试功能。

    Semiconductor memory device, controller, and read/write control method thereof
    7.
    发明授权
    Semiconductor memory device, controller, and read/write control method thereof 有权
    半导体存储器件,控制器及其读/写控制方法

    公开(公告)号:US07203105B2

    公开(公告)日:2007-04-10

    申请号:US10553974

    申请日:2004-10-13

    IPC分类号: G11C7/00

    CPC分类号: G06F12/06 G06F2212/2022

    摘要: A controller 102 and four flash memories F0 to F3 are connected by twos to two memory buses, and each flash memory is divided into two regions of substantially the same size to form a first half and a last half regions. In a four-memory configuration, a consecutive logical address specified by a host apparatus is divided into a predetermined size, and a write operation is performed in a format that repeatedly circulates through F0, F1, F2, F3 in this order. In a two-memory configuration, the write operation is performed in a format that repeatedly circulates through F00, F10, F01, F11. Thus, a controller processing is made common regardless of the number of flash memories connected to the controller.

    摘要翻译: 控制器102和四个闪速存储器F 0至F 3通过两个连接到两个存储器总线,并且每个闪速存储器被划分为大致相同大小的两个区域,以形成前半部分和后半个区域。 在四存储器配置中,由主机设备指定的连续逻辑地址被划分为预定大小,并以按顺序重复循环的格式执行写入操作。 。 在双存储器配置中,写入操作以通过F 00,F 10,F 01,F 11重复循环的格式执行。 因此,与控制器连接的闪存数量无关,控制器处理是常见的。

    Memory controller, nonvolatile memory device, nonvolatile memory system and data writing method
    8.
    发明申请
    Memory controller, nonvolatile memory device, nonvolatile memory system and data writing method 有权
    存储控制器,非易失性存储器件,非易失性存储器系统和数据写入方法

    公开(公告)号:US20070011581A1

    公开(公告)日:2007-01-11

    申请号:US11434494

    申请日:2006-05-16

    IPC分类号: G11C29/00

    摘要: With nonvolatile memory device employing a nonvolatile memory such as multiple-valued NAND flash memory or the like in which each memory cell holds data in a plurality of pages, there is such a problem that, if an error occurred under writing data, data stored in other page in the same group of the current page is changed, and hence the object of the present invention is to solve this problem. In writing data into a nonvolatile memory 110, when error occurred under writing data into a certain page, an error page identification part 128 identifies an error type and a physical address of the page where error occurred. An error corrector 129 then corrects errors occurred in other pages belonging to the same group of error occurrence page.

    摘要翻译: 对于采用诸如多值NAND闪速存储器等非易失性存储器的非易失性存储器件,其中每个存储器单元保持多个页面中的数据,存在如下问题:如果在写入数据时发生错误,则存储在 当前页面的同一组中的其他页面被改变,因此本发明的目的是解决这个问题。 在将数据写入非易失性存储器110时,当在特定页面中写入数据时发生错误时,错误页识别部件128识别错误发生的页面的错误类型和物理地址。 错误校正器129然后校正属于同一组错误发生页面的其他页面中发生的错误。

    Area management type memory system, area management type memory unit and area management type memory controller
    9.
    发明申请
    Area management type memory system, area management type memory unit and area management type memory controller 审中-公开
    区域管理类型存储系统,区域管理类型存储单元和区域管理类型存储控制器

    公开(公告)号:US20060007738A1

    公开(公告)日:2006-01-12

    申请号:US11175399

    申请日:2005-07-07

    IPC分类号: G11C11/34

    CPC分类号: G06F11/201

    摘要: In a storage medium which has a number of areas, access to any area is controlled in accordance with whether or not access to another area is possible, and thereby, destruction of data due to malfunctioning or a wrong operation is prevented. A link control part which controls access to the second area based on the information on access to the first area is provided, and access to the second area is controlled on the basis of whether or not access to the first area is possible. Control becomes possible, such that access to the second area becomes impossible in the state where access to the first area is impossible, while access to the second area becomes possible in the case where access to the first area is possible.

    摘要翻译: 在具有多个区域的存储介质中,根据是否可以访问其他区域来控制对任何区域的访问,从而防止由于故障或错误操作而导致的数据破坏。 提供了基于关于对第一区域的访问的信息来控制对第二区域的访问的链接控制部分,并且基于是否可以访问第一区域来控制对第二区域的访问。 控制成为可能,使得在不可能访问第一区域的状态下不可能访问第二区域,而在可能访问第一区域的情况下可以访问第二区域。

    Semiconductor memory device, memory controller and data recording method
    10.
    发明申请
    Semiconductor memory device, memory controller and data recording method 审中-公开
    半导体存储器件,存储器控制器和数据记录方法

    公开(公告)号:US20050204115A1

    公开(公告)日:2005-09-15

    申请号:US11043411

    申请日:2005-01-27

    IPC分类号: G06F12/08

    CPC分类号: G06F12/0246

    摘要: A read/write memory 109 is provided with a memory controller 110 so as to store address management information temporarily. A non-volatile memory access unit 106 writes user data on a non-volatile memory 111 according to a write instruction. When the user data is rewritten, an address management information controller 105 causes a physical block, which is an object to which the address management information 108 is rewritten, to be a to-be-invalid block. After completion of a series of writing process, the to-be-invalid block is turned into an invalid block and the address management information in the read/write memory 109 is rewritten on the non-volatile memory 111.

    摘要翻译: 读/写存储器109设置有存储器控制器110,以临时存储地址管理信息。 非易失性存储器访问单元106根据写入指令将用户数据写入非易失性存储器111。 当用户数据被重写时,地址管理信息控制器105使作为地址管理信息108被重写的对象的物理块成为无效块。 在完成一系列写入处理之后,将无效块变成无效块,并且读/写存储器109中的地址管理信息被重写在非易失性存储器111上。