Abstract:
Electronic systems supporting multiple operation modes are provided, wherein the electronic system includes a portable device and a docking system. The portable device at least includes one processing unit and a first operation module, wherein the processing unit includes a plurality of operation frequencies and is operable in a plurality of operation modes, and each operation mode corresponds to an operation frequency. The docking system includes a container for containing the portable device and a second operation module. When the portable device is plugged into the container of the docking system, the portable device receives a signal from the docking system, determines an operation mode of the portable device according to the received signal, adjusts the operation frequency of the processing unit corresponding to the operation mode and selectively applies the first modules or second modules to control the electronic system.
Abstract:
A bus cycle trapping system includes at least one register, a north bridge, a south bridge and a central processing unit (CPU). The register is configured to store at least one trapping parameter. The north bridge traps a bus cycle matching the at least one trapping parameter while issuing an activating signal. The south bridge sends a system management interrupt message according to the activating signal. The CPU enters a system management mode according to the system management interrupt and executes a system management interrupt routine for doing a debugging test of the bus cycle matching the trapping parameter.
Abstract:
A power saving method and system thereof is disclosed. When the central processing unit is under a non-snooping sleep state and a peripheral device sends a bus master request, a chip will drive the central processing unit waking from the non-snooping sleep state and entering a system management mode for executing an interrupt service routine that makes the central processing unit in halt status. The central processing unit is then driven to enter a snooping sleep state for snooping the bus master request. After the execution of the bus master request, the chip will drive the central processing unit to leave the snooping sleep state and return to the non-snooping sleep state for power consumption conservation.
Abstract:
A method and apparatus for driving a non-native SATA hard disk applied in a computer is provided. The computer includes a basic input/output system (BIOS) and an operating system (OS), both of which support an advanced configuration and power interface (ACPI). The non-native SATA hard disk includes a conversion interface and a parallel ATA (PATA) internal disk. First, issue an interrupt. Then, process an interrupt handle routine for detecting and saving the timing mode of the PATA internal disk. Next, load a default IDE driver. Then, report the saved timing mode. Finally, set the SATA hard disk according to the timing mode.
Abstract:
A computer system for processing data in a non-operational state and processing method thereof are provided. The computer system includes a data output unit, a data source, a data processing module and a state monitor unit. The data processing module accesses and processes data from the data source, and transmits the processed data to the data output unit. The state monitor unit monitors a power supply state of the computer system to generate a state switch signal, which indicates whether the computer system is in an operational state or a non-operational state. When the state switch signal indicates that the computer system is in a non-operational state, the data source and the data processing module receives operating voltages to access and process data.
Abstract:
A power saving method and system thereof is disclosed. When the central processing unit is under a non-snooping sleep state and a peripheral device sends a bus master request, a chip will drive the central processing unit waking from the non-snooping sleep state and entering a system management mode for executing an interrupt service routine that makes the central processing unit in halt status. The central processing unit is then driven to enter a snooping sleep state for snooping the bus master request. After the execution of the bus master request, the chip will drive the central processing unit to leave the snooping sleep state and return to the non-snooping sleep state for power consumption conservation.
Abstract:
A method and apparatus for driving a non-native SATA hard disk applied in a computer is provided. The computer includes a basic input/output system (BIOS) and an operating system (OS), both of which support an advanced configuration and power interface (ACPI). The non-native SATA hard disk includes a conversion interface and a parallel ATA (PATA) internal disk. First, issue an interrupt. Then, process an interrupt handle routine for detecting and saving the timing mode of the PATA internal disk. Next, load a default IDE driver. Then, report the saved timing mode. Finally, set the SATA hard disk according to the timing mode.
Abstract:
A computer system for processing data in a non-operational state and processing method thereof are provided. The computer system includes a data output unit, a data source, a data processing module and a state monitor unit. The data processing module accesses and processes data from the data source, and transmits the processed data to the data output unit. The state monitor unit monitors a power supply state of the computer system to generate a state switch signal, which indicates whether the computer system is in an operational state or a non-operational state. When the state switch signal indicates that the computer system is in a non-operational state, the data source and the data processing module receives operating voltages to access and process data.
Abstract:
A bus cycle trapping system includes at least one register, a north bridge, a south bridge and a central processing unit (CPU). The register is configured to store at least one trapping parameter. The north bridge traps a bus cycle matching the at least one trapping parameter while issuing an activating signal. The south bridge sends a system management interrupt message according to the activating signal. The CPU enters a system management mode according to the system management interrupt and executes a system management interrupt routine for doing a debugging test of the bus cycle matching the trapping parameter.
Abstract:
A computer system and a power-management method thereof are provided. The computer system has an image-reading mode, a first power-management mode and a second power-management mode, and the computer system operating in the second power-management mode consumes less power than it consumes in the first power-management mode. The computer system comprises a first portion comprising a graphics processing unit, a memory space and a display; and a second portion comprising a storage storing an image data. When the computer system operates in the image-reading mode, the image data has been transferred to the memory space from the storage, the second portion enters to the second power-management mode from the first power-management mode, and the first portion keeps in the first power-management mode, so that the graphics processing unit can display an image by the display according to the image data stored in the memory space.