Abstract:
A sealant region pattern for a liquid crystal display apparatus and a method for fabricating the same. The method comprises providing a first substrate and a second substrate opposite thereto, forming a predetermined material layer on the first substrate, forming an organic material pattern layer having openings of a saw tooth pattern on the predetermined material layer to expose the surface of the predetermined material layer underneath, The surface of the predetermined material layer and the sidewall of the organic material pattern layer form a predetermined angle.
Abstract:
A sealant region pattern for a liquid crystal display apparatus and a method for fabricating the same. The method comprises providing a first substrate and a second substrate opposite thereto, forming a predetermined material layer on the first substrate, forming an organic material pattern layer having openings of a saw tooth pattern on the predetermined material layer to expose the surface of the predetermined material layer underneath, The surface of the predetermined material layer and the sidewall of the organic material pattern layer form a predetermined angle.
Abstract:
An array substrate structure of a display panel includes a substrate, a plurality of first wirings, a first patterned insulating layer, a plurality of second wirings, a plurality of first protective patterns, and a plurality of second protective patterns. The substrate has a wiring region. The first wirings are disposed in the wiring region. The first patterned insulating layer is disposed on the first wirings. The second wirings are disposed on the first patterned insulating layer. The first protective patterns are disposed in the wiring region and disposed on the corresponding second wiring, respectively, where the first protective pattern includes a semiconductor material. The second protective patterns are disposed on the corresponding first protective pattern, respectively, where the second protective pattern includes an inorganic insulating material.
Abstract:
An array substrate structure of a display panel includes a substrate, a plurality of first wirings, a first patterned insulating layer, a plurality of second wirings, a plurality of first protective patterns, and a plurality of second protective patterns. The substrate has a wiring region. The first wirings are disposed in the wiring region. The first patterned insulating layer is disposed on the first wirings. The second wirings are disposed on the first patterned insulating layer. The first protective patterns are disposed in the wiring region and disposed on the corresponding second wiring, respectively, where the first protective pattern includes a semiconductor material. The second protective patterns are disposed on the corresponding first protective pattern, respectively, where the second protective pattern includes an inorganic insulating material.
Abstract:
A pixel structure is disclosed. The pixel structure includes a substrate, a first data line having at least one end formed on the substrate, a first insulation layer overlying the first data line and exposing a part of the end of the first data line, a shielding electrode disposed on the first insulation layer and overlapped with the first data line, a second data line formed on the first insulation layer and electrically connected to the exposed end of the first data line, a second insulation layer overlying the shielding electrode and the second data line, and a pixel electrode formed on the second insulation layer and overlapped with the shielding electrode. The invention also provides a method for fabricating the pixel structure.
Abstract:
A pixel structure is disposed on a substrate and electrically connected to a scan line and a data line. The pixel structure including an active device, a bottom capacitor electrode, an insulator, and a pixel electrode is provided. The active device is disposed on the substrate and has a gate, a source and a drain. Besides, the active device is electrically connected to the scan line and the data line. The bottom capacitor electrode and the gate are separately disposed on the substrate. The insulator covering the active device and the bottom capacitor electrode is made of a mono film. The pixel electrode is electrically connected to the active device, and at least a part of the pixel electrode extends to the insulator above the bottom capacitor electrode.
Abstract:
A copper gate electrode, applied in a thin-film-transistor liquid crystal display (LCD) device, at least comprises a patterned copper layer formed on a glass substrate, and a barrier layer formed on the patterned copper layer. The barrier layer comprises at least one of nitrogen and phosphorus, or comprises an alloy formularized as M1M2R wherein M1 is cobalt (Co) or molybdenum (Mo), M2 is tungsten (W), molybdenum (Mo), rhenium (Re) or vanadium (V), and R is boron (B) or phosphorus (P).
Abstract:
A pixel structure is disposed on a substrate and electrically connected to a scan line and a data line. The pixel structure including an active device, a bottom capacitor electrode, an insulator, and a pixel electrode is provided. The active device is disposed on the substrate and has a gate, a source and a drain. Besides, the active device is electrically connected to the scan line and the data line. The bottom capacitor electrode and the gate are separately disposed on the substrate. The insulator covering the active device and the bottom capacitor electrode is made of a mono film. The pixel electrode is electrically connected to the active device, and at least a part of the pixel electrode extends to the insulator above the bottom capacitor electrode.
Abstract:
The wiring line structure comprises a transparent substrate, a barrier layer, a metal layer, and a photosensitive protecting layer. The barrier layer and a metal layer are successively disposed on the transparent substrate. The photosensitive protecting layer is formed on the barrier layer and both sides of the metal layer. A method for fabricating the wiring line structure is also disclosed.
Abstract:
A first patterned conductive layer is formed on a substrate. A dielectric layer, a semiconductor layer, a second conductive layer and a photoresist layer are formed above the first patterned conductive layer. The photoresist layer is patterned using a photomask with multiple different transparencies, and the patterned photoresist layer has at least three different thicknesses. The photoresist layer within the channel region is removed. The second conductive layer within the channel region and part of semiconductor layer are etched to form a channel, source and drain of a thin film transistor. The photoresist layer corresponding to a pixel connecting region and a data pad region is removed to expose a pixel connecting region and a data pad. The remained photoresist layer is reflowed so as to cover the channel. The uncovered semiconductor layer is removed using the reflowed photoresist layer and the patterned second conductive layer as a mask.