公开(公告)号：US07813100B2

公开(公告)日：2010-10-12

申请号：US12348639

申请日：2009-01-05

申请人： Yi-Fang Lin ,  Hsi-Chieh Chen

发明人： Yi-Fang Lin ,  Hsi-Chieh Chen

IPC分类号： H01F13/00

CPC分类号： H03H1/0007 ,  H01F13/006

摘要： A demagnetization circuit for reducing interference in a mobile phone includes a wave filter, a demagnetization circuit and an audio playing circuit. The wave filter is configured to filter a received audio signal from the mobile phone. The wave filter includes an input that receives the audio signal, and an output. The demagnetization circuit is structured and arranged to generate an opposite magnetic field to that of the mobile phone to reduce pulse magnetic fields generated by the mobile phone.

摘要翻译： 用于减少移动电话中的干扰的消磁电路包括滤波器，去磁电路和音频播放电路。 滤波器被配置为对来自移动电话的接收到的音频信号进行滤波。 滤波器包括接收音频信号的输入端和输出端。 退磁电路被构造和布置成产生与手机相反的磁场，以减少由移动电话产生的脉冲磁场。

公开(公告)号：US6150273A

公开(公告)日：2000-11-21

申请号：US200628

申请日：1998-11-30

申请人： Lu-Min Liu ,  Hsi-Chieh Chen ,  Ping-Ho Lo ,  Sheng-Hao Lin

发明人： Lu-Min Liu ,  Hsi-Chieh Chen ,  Ping-Ho Lo ,  Sheng-Hao Lin

IPC分类号： H01L21/762 ,  H01L21/302

CPC分类号： H01L21/76224

摘要： A method of fabricating kink-effect-free shallow trench isolations is presented in this invention. First, a layer of silicon oxide and a layer of polysilican are sequentially deposited on a substrate, and then shallow trenches are formed, next thermal oxidation is performed to grow a passivation oxide layer on the exposed silicon, and then, a dielectric layer is formed to fill into the shallow trench. Finally, the dielectric layer on the active area is removed by using chemical mechanical polishing and the polysilicon layer provides for the etching end point. The level of shallow trench is higher than the level of active area as soon as stop polishing, because the polysilicon layer is polished faster than dielectric layer. It provides the passivation oxide on the sidewall of shallow trench to form spacers of the active area after removing the polysilicon of active area. It can provide a perfect shallow trench after an oxidation and etching process to avoid the kink effect.

摘要翻译： 本发明提出了一种制造无扭结的浅沟槽隔离的方法。 首先，在衬底上依次沉积氧化硅层和聚硅氧烷层，然后形成浅沟槽，进行下一个热氧化以在暴露的硅上生长钝化氧化物层，然后形成介电层 填补浅沟。 最后，通过使用化学机械抛光去除有源区上的电介质层，并且多晶硅层提供蚀刻终点。 一旦停止抛光，浅沟槽的水平高于有效面积的水平，因为多晶硅层的抛光速度比电介质层快。 它在浅沟槽的侧壁上提供钝化氧化物，以在去除有源区域的多晶硅之后形成有源区的间隔物。 在氧化和蚀刻工艺之后，它可以提供完美的浅沟槽，以避免扭结效应。

公开(公告)号：US08624785B2

公开(公告)日：2014-01-07

申请号：US13082537

申请日：2011-04-08

申请人： Hsi-Chieh Chen

发明人： Hsi-Chieh Chen

IPC分类号： H01Q1/38

CPC分类号： H01Q9/42 ,  H01Q1/243 ,  H01Q5/357

摘要： A dual-band antenna includes a radiator unit. The radiator unit includes a base portion, an extension portion extending from the base portion, a connecting portion extending from the extension portion, a transition portion extending from the connecting portion, and a u-shaped portion extending from the transition section. The connecting portion, the extension portion, and the base portion define a first slot. The u-shaped portion defines a second slot.

摘要翻译： 双频天线包括散热器单元。 散热器单元包括基部，从基部延伸的延伸部，从延伸部延伸的连接部，从连接部延伸的过渡部以及从过渡部延伸的u形部。 连接部分，延伸部分和基部部分限定第一狭槽。 U形部分限定第二狭槽。

公开(公告)号：US20050151178A1

公开(公告)日：2005-07-14

申请号：US10749771

申请日：2003-12-30

申请人： James Shyu ,  Hsi-Chieh Chen ,  Chuan-Chi Chen

发明人： James Shyu ,  Hsi-Chieh Chen ,  Chuan-Chi Chen

IPC分类号： H01L21/314 ,  H01L21/318 ,  H01L21/32 ,  H01L21/8242 ,  H01L29/94

CPC分类号： H01L27/10829 ,  H01L21/3141 ,  H01L21/3185 ,  H01L21/32 ,  H01L27/10867 ,  H01L29/945

摘要： A method for manufacturing a trench capacitor that comprises defining a semiconductor substrate, forming a trench with a lower region and an upper region in the semiconductor substrate, forming a buried conductive region around the lower region, forming a first insulating layer along sidewalls of the trench up to a level between the lower region and the upper region, forming a second insulating layer along the sidewalls of the trench at the upper region, the second insulating layer being separated from the first insulating layer by an intermediate region, and forming an oxide on the sidewalls of the trench at the intermediate region.

摘要翻译： 一种制造沟槽电容器的方法，包括限定半导体衬底，在半导体衬底中形成具有下部区域和上部区域的沟槽，在下部区域周围形成掩埋导电区域，沿着沟槽的侧壁形成第一绝缘层 直到下部区域和上部区域之间的水平面，在上部区域沿着沟槽的侧壁形成第二绝缘层，第二绝缘层通过中间区域与第一绝缘层分离，并且形成氧化物 在中间区域的沟槽的侧壁。

公开(公告)号：US06248641B1

公开(公告)日：2001-06-19

申请号：US09245953

申请日：1999-02-05

申请人： Lu-Min Liu ,  Hsi-Chieh Chen ,  Ping-Ho Lo ,  Sheng-Hao Lin

发明人： Lu-Min Liu ,  Hsi-Chieh Chen ,  Ping-Ho Lo ,  Sheng-Hao Lin

IPC分类号： H01L2176

CPC分类号： H01L21/76224

摘要： A method of fabricating a shallow trench isolation is disclosed. First, a pad oxide layer and a polysilicon layer are formed on a silicon substrate. The pad oxide layer and the polysilicon layer are etched to expose parts of the substrate. Then the exposed parts of the substrate are oxidized to form an oxide layer. Next, the oxide layer is etched back to form an oxide spacer on the side wall of the polysilicon. Then, a shallow trench is formed by etching the partly exposed substrate. Next, a dielectric layer is formed to fill the shallow trench and then etched back by CMP to stop on the polysilicon layer. Finally, the pad oxide layer and the polysilicon layer are removed. As a result, oxide spacers on the side wall of the shallow trench are formed to eliminate the kink-effect.

摘要翻译： 公开了一种制造浅沟槽隔离的方法。 首先，在硅衬底上形成衬垫氧化物层和多晶硅层。 蚀刻衬垫氧化物层和多晶硅层以暴露衬底的部分。 然后将基板的暴露部分氧化形成氧化物层。 接下来，氧化层被回蚀刻以在多晶硅的侧壁上形成氧化物间隔物。 然后，通过蚀刻部分曝光的衬底形成浅沟槽。 接下来，形成介电层以填充浅沟槽，然后通过CMP进行回蚀以在多晶硅层上停止。 最后，去除衬垫氧化物层和多晶硅层。 结果，形成浅沟槽侧壁上的氧化物隔离物以消除扭结效应。

公开(公告)号：US06242322B1

公开(公告)日：2001-06-05

申请号：US09453440

申请日：1999-12-03

申请人： Hsi-Chieh Chen ,  Cheng-Yu Chen

发明人： Hsi-Chieh Chen ,  Cheng-Yu Chen

IPC分类号： H01L2176

CPC分类号： H01L21/76229

摘要： The present invention proposes a method for forming shallow trench isolation. Isolation trenches are firstly formed on a silicon substrate. High-density plasma oxide layer is used to fill the trenches. A layer of poly-silicon and a thin oxide layer are then deposited on the high-density plasma oxide layer. Selective poly-silicon chemical mechanical polishing is then used to form a self-align reverse poly mask on the surface of the shallow trenches filled with the high-density plasma oxide layer. The high-density plasma oxide layer is locally etched. Chemical mechanical polishing is then used to perform a planarization process on the surface. In the present invention, photolithography is not necessary in the planarization process of high-density plasma oxide layer. Manufacture cost is thus lower.

摘要翻译： 本发明提出了形成浅沟槽隔离的方法。 首先在硅衬底上形成隔离沟槽。 高密度等离子体氧化物层用于填充沟槽。 然后在高密度等离子体氧化物层上沉积多晶硅层和薄氧化物层。 然后使用选择性多晶硅化学机械抛光在填充有高密度等离子体氧化物层的浅沟槽的表面上形成自对准反向聚合掩膜。 局部蚀刻高密度等离子体氧化物层。 然后使用化学机械抛光在表面上进行平面化处理。 在本发明中，高密度等离子体氧化物层的平坦化处理中不需要光刻。 制造成本因此降低。

公开(公告)号：US20060228864A1

公开(公告)日：2006-10-12

申请号：US11103948

申请日：2005-04-12

申请人： Hsi-Chieh Chen ,  Chuan-Chi Chen

发明人： Hsi-Chieh Chen ,  Chuan-Chi Chen

IPC分类号： H01L21/76

CPC分类号： H01L29/66181 ,  H01L27/1087

摘要： A semiconductor device having a transistor and a storage capacitor. The transistor includes source and drain regions formed on a substrate. The storage capacitor is coupled to the transistor. The storage capacitor is formed from a bottle-shaped trench and having an Epi-Si layer grown inside the trench to form at least part of one of the source and drain regions. The Epi-Si layer can be selectively grown inside the trench from portions of the substrate such that the Epi-Si layer is used to define a bottle-shape for the trench.

摘要翻译： 具有晶体管和存储电容器的半导体器件。 晶体管包括形成在衬底上的源区和漏区。 存储电容器耦合到晶体管。 存储电容器由瓶形沟槽形成并且具有在沟槽内生长的Epi-Si层以形成源区和漏区之一的至少一部分。 可以从衬底的部分选择性地在沟槽内生长Epi-Si层，使得Epi-Si层用于限定沟槽的瓶形。

公开(公告)号：US07094659B2

公开(公告)日：2006-08-22

申请号：US10962473

申请日：2004-10-13

申请人： Hsi-Chieh Chen ,  James Shyu ,  Hippo Wu

发明人： Hsi-Chieh Chen ,  James Shyu ,  Hippo Wu

IPC分类号： H01L21/76

CPC分类号： H01L27/1087 ,  H01L27/10829 ,  H01L29/66181

摘要： A method of forming a trench capacitor is disclosed. After completion of the bottom electrode of the capacitor, a collar dielectric layer is directly formed on the sidewall of the deep trench using self-starved atomic layer chemical vapor deposition (self-starved ALCVD). Then, a high dielectric constant (high k) dielectric layer is formed overlying the collar dielectric and the bottom portion of the deep trench using atomic layer chemical vapor deposition (ALCVD). Thereafter, a conductive layer is filled into the deep trench and recessed to a predetermined depth. A portion of the dielectric layer and the high dielectric constant (high k) layer at the top of the deep trench are removed to complete the fabrication of the deep trench capacitor.

摘要翻译： 公开了一种形成沟槽电容器的方法。 在电容器的底部电极完成之后，使用自匮乏的原子层化学气相沉积（自我饥饿的ALCVD）直接在深沟槽的侧壁上形成环形电介质层。 然后，使用原子层化学气相沉积（ALCVD），在轴环电介质和深沟槽的底部上形成高介电常数（高k）电介质层。 此后，将导电层填充到深沟槽中并凹进到预定深度。 去除深沟槽顶部的介电层和高介电常数（高k）层的一部分，以完成深沟槽电容器的制造。

公开(公告)号：US06995451B2

公开(公告)日：2006-02-07

申请号：US10749771

申请日：2003-12-30

申请人： James Shyu ,  Hsi-Chieh Chen ,  Chuan-Chi Chen

发明人： James Shyu ,  Hsi-Chieh Chen ,  Chuan-Chi Chen

IPC分类号： H01L21/20 ,  H01L29/00

CPC分类号： H01L27/10829 ,  H01L21/3141 ,  H01L21/3185 ,  H01L21/32 ,  H01L27/10867 ,  H01L29/945

摘要： A method for manufacturing a trench capacitor that comprises defining a semiconductor substrate, forming a trench with a lower region and an upper region in the semiconductor substrate, forming a buried conductive region around the lower region, forming a first insulating layer along sidewalls of the trench up to a level between the lower region and the upper region, forming a second insulating layer along the sidewalls of the trench at the upper region, the second insulating layer being separated from the first insulating layer by an intermediate region, and forming an oxide on the sidewalls of the trench at the intermediate region.

摘要翻译： 一种制造沟槽电容器的方法，包括限定半导体衬底，在半导体衬底中形成具有下部区域和上部区域的沟槽，在下部区域周围形成掩埋导电区域，沿着沟槽的侧壁形成第一绝缘层 直到下部区域和上部区域之间的水平面，在上部区域沿着沟槽的侧壁形成第二绝缘层，第二绝缘层通过中间区域与第一绝缘层分离，并形成氧化物 在中间区域的沟槽的侧壁。

公开(公告)号：US6020259A

公开(公告)日：2000-02-01

申请号：US846471

申请日：1997-05-01

申请人： Hsi-Chieh Chen ,  Guan-Jiun Yi ,  Wen-Cheng Tu ,  Kuo-Lun Tseng

发明人： Hsi-Chieh Chen ,  Guan-Jiun Yi ,  Wen-Cheng Tu ,  Kuo-Lun Tseng

IPC分类号： H01L21/768 ,  H01L21/441

CPC分类号： H01L21/76876 ,  H01L21/7684 ,  H01L21/76843

摘要： A method for forming a tungsten plug is disclosed herein. A TiSi.sub.2 layer is selectively formed in a contact hole by using chemical vapor deposition. Then, a TiN layer is formed on the surface of the contact hole and on the TiSi.sub.2 layer. Next, a tungsten layer is formed on the TiN layer and in the contact hole. A CMP is used to remove a portion of the tungsten layer and TiN layer for planarization.

摘要翻译： 本文公开了形成钨丝塞的方法。 通过使用化学气相沉积在接触孔中选择性地形成TiSi 2层。 然后，在接触孔的表面和TiSi 2层上形成TiN层。 接下来，在TiN层和接触孔中形成钨层。 使用CMP来除去钨层和TiN层的一部分用于平坦化。