公开(公告)号：US07858969B2

公开(公告)日：2010-12-28

申请号：US11737769

申请日：2007-04-20

申请人： Yi-Yun Tsai ,  Chuan-Yi Wu ,  Chin-Chuan Lai

发明人： Yi-Yun Tsai ,  Chuan-Yi Wu ,  Chin-Chuan Lai

IPC分类号： H01L51/10 ,  H01L51/40

CPC分类号： H01L51/102 ,  H01L51/0022 ,  H01L51/0529 ,  H01L51/0545

摘要： An organic thin film transistor including a substrate, a gate, a gate insulator, an adhesive layer, a metal nano-particle layer and an organic semiconductor layer is provided. The gate is disposed on the substrate. The gate insulator is disposed on the gate and the substrate. The adhesive layer is disposed on the gate insulator. Besides, the adhesive layer has a hydrophobic surface above the gate and a first hydrophilic surface and a second hydrophilic surface on two sides of the hydrophobic surface. A surface of the metal nano-particle layer is modified by a hydrophilic group, and the metal nano-particle layer is disposed on the first and the second hydrophilic surfaces of the adhesive layer as a source and a drain, respectively. The organic semiconductor layer is disposed on the hydrophobic surface of the adhesive layer and on the metal nano-particle layer.

摘要翻译： 提供了包括基板，栅极，栅极绝缘体，粘合层，金属纳米颗粒层和有机半导体层的有机薄膜晶体管。 栅极设置在基板上。 栅极绝缘体设置在栅极和基板上。 粘合剂层设置在栅极绝缘体上。 此外，粘合剂层在浇口上方具有疏水表面，在疏水表面的两侧具有第一亲水表面和第二亲水表面。 金属纳米粒子层的表面被亲水基团改性，金属纳米粒子层分别作为源极和漏极设置在粘合剂层的第一和第二亲水表面上。 有机半导体层设置在粘合层的疏水性表面和金属纳米粒子层上。

公开(公告)号：US20080157064A1

公开(公告)日：2008-07-03

申请号：US11737769

申请日：2007-04-20

申请人： Yi-Yun Tsai ,  Chuan-Yi Wu ,  Chin-Chuan Lai

发明人： Yi-Yun Tsai ,  Chuan-Yi Wu ,  Chin-Chuan Lai

IPC分类号： H01L51/30 ,  H01L51/40

CPC分类号： H01L51/102 ,  H01L51/0022 ,  H01L51/0529 ,  H01L51/0545

摘要： An organic thin film transistor including a substrate, a gate, a gate insulator, an adhesive layer, a metal nano-particle layer and an organic semiconductor layer is provided. The gate is disposed on the substrate. The gate insulator is disposed on the gate and the substrate. The adhesive layer is disposed on the gate insulator. Besides, the adhesive layer has a hydrophobic surface above the gate and a first hydrophilic surface and a second hydrophilic surface on two sides of the hydrophobic surface. A surface of the metal nano-particle layer is modified by a hydrophilic group, and the metal nano-particle layer is disposed on the first and the second hydrophilic surfaces of the adhesive layer as a source and a drain, respectively. The organic semiconductor layer is disposed on the hydrophobic surface of the adhesive layer and on the metal nano-particle layer.

摘要翻译： 提供了包括基板，栅极，栅极绝缘体，粘合层，金属纳米颗粒层和有机半导体层的有机薄膜晶体管。 栅极设置在基板上。 栅极绝缘体设置在栅极和基板上。 粘合剂层设置在栅极绝缘体上。 此外，粘合剂层在浇口上方具有疏水表面，在疏水表面的两侧具有第一亲水表面和第二亲水表面。 金属纳米粒子层的表面被亲水基团改性，金属纳米粒子层分别作为源极和漏极设置在粘合剂层的第一和第二亲水表面上。 有机半导体层设置在粘合层的疏水性表面和金属纳米粒子层上。

公开(公告)号：US20080224139A1

公开(公告)日：2008-09-18

申请号：US11775874

申请日：2007-07-11

申请人： Chin-Chuan Lai ,  Chuan-Yi Wu ,  Yi-Yun Tsai

发明人： Chin-Chuan Lai ,  Chuan-Yi Wu ,  Yi-Yun Tsai

IPC分类号： H01L29/06

CPC分类号： H01L29/78678 ,  H01L29/66765 ,  H01L29/78669

摘要： A thin film transistor including a substrate, a gate, a gate insulator layer, a semiconductor layer, an ohmic contact layer, a source and a drain is provided. The gate is disposed on the substrate while the gate insulator layer is disposed on the substrate and covers the gate. The semiconductor layer is disposed on the gate insulator layer above the gate. The semiconductor layer includes an undoped amorphous silicon layer and a first undoped microcrystalline silicon (μc-Si) layer, wherein the first undoped μc-Si layer is disposed on the undoped amorphous silicon layer. The ohmic contact layer is disposed on part of the semiconductor layer and the source and the drain are disposed on the ohmic contact layer. Therefore, the thin film transistor has better quality control and electrical characteristics.

摘要翻译： 提供了包括基板，栅极，栅极绝缘体层，半导体层，欧姆接触层，源极和漏极的薄膜晶体管。 栅极设置在基板上，同时栅极绝缘体层设置在基板上并覆盖栅极。 半导体层设置在栅极上方的栅极绝缘体层上。 半导体层包括未掺杂的非晶硅层和第一未掺杂微晶硅（muc-Si）层，其中第一未掺杂的粘硅层设置在未掺杂的非晶硅层上。 欧姆接触层设置在半导体层的一部分上，源极和漏极设置在欧姆接触层上。 因此，薄膜晶体管具有更好的质量控制和电气特性。

公开(公告)号：US20070262379A1

公开(公告)日：2007-11-15

申请号：US11433439

申请日：2006-05-15

申请人： Chin-Chuan Lai ,  Hsian-Kun Chiu ,  Chuan-Yi Wu

发明人： Chin-Chuan Lai ,  Hsian-Kun Chiu ,  Chuan-Yi Wu

IPC分类号： H01L27/12 ,  H01L27/01 ,  H01L31/0392

CPC分类号： H01L29/78603 ,  H01L29/4908 ,  H01L29/78609

摘要： Aluminum gate electrode parasitic resistance and capacitance delay suffers performance, and even makes the signal loss to high-resolution and small-size requests for thin film transistor liquid crystal display. An important technology employed in manufacturing thin film transistor is to convert surface of glass substrate into a silicon nitride layer, and subsequently to plate with one of low resistant copper, silver, copper alloy and silver alloy, and finally to form the thin film transistor on the substrate.

摘要翻译： 铝栅极的寄生电阻和电容延迟受到性能的影响，甚至使得信号损耗达到高分辨率和小尺寸要求的薄膜晶体管液晶显示。 用于制造薄膜晶体管的重要技术是将玻璃基板的表面转化为氮化硅层，然后用低电阻铜，银，铜合金和银合金之一进行平板化，最后形成薄膜晶体管 底物。

公开(公告)号：US07229863B2

公开(公告)日：2007-06-12

申请号：US11163602

申请日：2005-10-25

申请人： Chuan-Yi Wu ,  Yung-Chia Kuan ,  Chia-Chien Lu ,  Chin-Chuan Lai

发明人： Chuan-Yi Wu ,  Yung-Chia Kuan ,  Chia-Chien Lu ,  Chin-Chuan Lai

IPC分类号： H01L21/84

CPC分类号： H01L29/41733 ,  H01L29/458 ,  H01L29/66742 ,  Y10S438/906

摘要： A method for fabricating a thin film transistor is provided. First, a gate is formed on a substrate. A gate-insulating layer is formed to cover the gate. A patterned semiconductor layer is formed on the gate-insulating layer. A first and a second conductive layer are formed on the patterned semiconductor layer in sequence. The second conductive layer is patterned such that each side of thereof above the gate has a taper profile and the first conductive layer is exposed. A first plasma process is performed to transform the surface and the taper profile of the second conductive layer into a first protection layer. The first conductive layer not covered by the first protection layer and the second conductive layer is removed to form a source/drain. The source/drain is with fine dimensions and the diffusion of metallic ions from the second conductive layer to the patterned semiconductor layer can be avoided.

摘要翻译： 提供一种制造薄膜晶体管的方法。 首先，在基板上形成栅极。 形成栅极绝缘层以覆盖栅极。 在栅极绝缘层上形成图案化的半导体层。 依次在图案化的半导体层上形成第一和第二导电层。 第二导电层被图案化，使得栅极上方的每一侧具有锥形轮廓，并且第一导电层被暴露。 执行第一等离子体处理以将第二导电层的表面和锥形轮廓变换为第一保护层。 不被第一保护层和第二导电层覆盖的第一导电层被去除以形成源极/漏极。 源极/漏极具有精细的尺寸，并且可以避免金属离子从第二导电层到图案化半导体层的扩散。

公开(公告)号：US07405113B2

公开(公告)日：2008-07-29

申请号：US11832550

申请日：2007-08-01

申请人： Chuan-Yi Wu ,  Chin-Chuan Lai ,  Yung-Chia Kuan ,  Wei-Jen Tai

发明人： Chuan-Yi Wu ,  Chin-Chuan Lai ,  Yung-Chia Kuan ,  Wei-Jen Tai

IPC分类号： H01L21/00

CPC分类号： H01L29/41733 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78669

摘要： A thin film transistor is provided, including a substrate, a gate, a first dielectric layer, a channel layer, a source/drain and a second dielectric layer. The gate is disposed on the substrate, and the gate and the substrate are covered with the first dielectric layer. The channel layer is at least disposed on the first dielectric layer above the gate. The source/drain is disposed on the channel layer. The source/drain includes a first barrier layer, a conductive layer and a second barrier layer. The first barrier layer is disposed between the conductive layer and the channel layer. The conductive layer is covered with the first barrier layer and the second barrier layer. The source/drain is covered with the second dielectric layer. Accordingly, the variation of electric characters can be reduced. Moreover, a method for fabricating a thin film transistor is also provided.

摘要翻译： 提供一种薄膜晶体管，其包括基板，栅极，第一介电层，沟道层，源极/漏极和第二介电层。 栅极设置在基板上，栅极和基板被第一介电层覆盖。 沟道层至少设置在栅极上方的第一介电层上。 源极/漏极设置在沟道层上。 源/漏包括第一阻挡层，导电层和第二阻挡层。 第一阻挡层设置在导电层和沟道层之间。 导电层被第一阻挡层和第二阻挡层覆盖。 源极/漏极被第二介电层覆盖。 因此，可以减少电气字符的变化。 此外，还提供了一种制造薄膜晶体管的方法。

公开(公告)号：US20070269940A1

公开(公告)日：2007-11-22

申请号：US11832550

申请日：2007-08-01

申请人： CHUAN-YI WU ,  Chin-Chuan Lai ,  Yung-Chia Kuan ,  Wei-Jen Tai

发明人： CHUAN-YI WU ,  Chin-Chuan Lai ,  Yung-Chia Kuan ,  Wei-Jen Tai

IPC分类号： H01L21/84

CPC分类号： H01L29/41733 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78669

摘要： A thin film transistor is provided, including a substrate, a gate, a first dielectric layer, a channel layer, a source/drain and a second dielectric layer. The gate is disposed on the substrate, and the gate and the substrate are covered with the first dielectric layer. The channel layer is at least disposed on the first dielectric layer above the gate. The source/drain is disposed on the channel layer. The source/drain includes a first barrier layer, a conductive layer and a second barrier layer. The first barrier layer is disposed between the conductive layer and the channel layer. The conductive layer is covered with the first barrier layer and the second barrier layer. The source/drain is covered with the second dielectric layer. Accordingly, the variation of electric characters can be reduced. Moreover, a method for fabricating a thin film transistor is also provided.

摘要翻译： 提供一种薄膜晶体管，其包括基板，栅极，第一介电层，沟道层，源极/漏极和第二介电层。 栅极设置在基板上，栅极和基板被第一介电层覆盖。 沟道层至少设置在栅极上方的第一介电层上。 源极/漏极设置在沟道层上。 源/漏包括第一阻挡层，导电层和第二阻挡层。 第一阻挡层设置在导电层和沟道层之间。 导电层被第一阻挡层和第二阻挡层覆盖。 源极/漏极被第二介电层覆盖。 因此，可以减少电气字符的变化。 此外，还提供了一种制造薄膜晶体管的方法。

公开(公告)号：US07291885B2

公开(公告)日：2007-11-06

申请号：US11214677

申请日：2005-08-29

申请人： Chuan-Yi Wu ,  Chin-Chuan Lai ,  Yung-Chia Kuan ,  Wei-Jen Tai

发明人： Chuan-Yi Wu ,  Chin-Chuan Lai ,  Yung-Chia Kuan ,  Wei-Jen Tai

IPC分类号： H01L27/01

CPC分类号： H01L29/41733 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78669

摘要： A thin film transistor is provided, including a substrate, a gate, a first dielectric layer, a channel layer, a source/drain and a second dielectric layer. The gate is disposed on the substrate, and the gate and the substrate are covered with the first dielectric layer. The channel layer is at least disposed on the first dielectric layer above the gate. The source/drain is disposed on the channel layer. The source/drain includes a first barrier layer, a conductive layer and a second barrier layer. The first barrier layer is disposed between the conductive layer and the channel layer. The conductive layer is covered with the first barrier layer and the second barrier layer. The source/drain is covered with the second dielectric layer. Accordingly, the variation of electric characters can be reduced. Moreover, a method for fabricating a thin film transistor is also provided.

摘要翻译： 提供一种薄膜晶体管，其包括基板，栅极，第一介电层，沟道层，源极/漏极和第二介电层。 栅极设置在基板上，栅极和基板被第一介电层覆盖。 沟道层至少设置在栅极上方的第一介电层上。 源极/漏极设置在沟道层上。 源/漏包括第一阻挡层，导电层和第二阻挡层。 第一阻挡层设置在导电层和沟道层之间。 导电层被第一阻挡层和第二阻挡层覆盖。 源极/漏极被第二介电层覆盖。 因此，可以减少电气字符的变化。 此外，还提供了一种制造薄膜晶体管的方法。

公开(公告)号：US20070093003A1

公开(公告)日：2007-04-26

申请号：US11163602

申请日：2005-10-25

申请人： Chuan-Yi Wu ,  Yung-Chia Kuan ,  Chia-Chien Lu ,  Chin-Chuan Lai

发明人： Chuan-Yi Wu ,  Yung-Chia Kuan ,  Chia-Chien Lu ,  Chin-Chuan Lai

IPC分类号： H01L21/84 ,  H01L21/00

CPC分类号： H01L29/41733 ,  H01L29/458 ,  H01L29/66742 ,  Y10S438/906

摘要： A method for fabricating a thin film transistor is provided. First, a gate is formed on a substrate. A gate-insulating layer is formed to cover the gate. A patterned semiconductor layer is formed on the gate-insulating layer. A first and a second conductive layer are formed on the patterned semiconductor layer in sequence. The second conductive layer is patterned such that each side of thereof above the gate has a taper profile and the first conductive layer is exposed. A first plasma process is performed to transform the surface and the taper profile of the second conductive layer into a first protection layer. The first conductive layer not covered by the first protection layer and the second conductive layer is removed to form a source/drain. The source/drain is with fine dimensions and the diffusion of metallic ions from the second conductive layer to the patterned semiconductor layer can be avoided.

摘要翻译： 提供一种制造薄膜晶体管的方法。 首先，在基板上形成栅极。 形成栅极绝缘层以覆盖栅极。 在栅极绝缘层上形成图案化的半导体层。 依次在图案化的半导体层上形成第一和第二导电层。 第二导电层被图案化，使得栅极上方的每一侧具有锥形轮廓，并且第一导电层被暴露。 执行第一等离子体处理以将第二导电层的表面和锥形轮廓变换为第一保护层。 不被第一保护层和第二导电层覆盖的第一导电层被去除以形成源极/漏极。 源极/漏极具有精细的尺寸，并且可以避免金属离子从第二导电层到图案化半导体层的扩散。

公开(公告)号：US20070045734A1

公开(公告)日：2007-03-01

申请号：US11214677

申请日：2005-08-29

申请人： Chuan-Yi Wu ,  Chin-Chuan Lai ,  Yung-Chia Kuan ,  Wei-Jen Tai

发明人： Chuan-Yi Wu ,  Chin-Chuan Lai ,  Yung-Chia Kuan ,  Wei-Jen Tai

IPC分类号： H01L27/12

CPC分类号： H01L29/41733 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78669

摘要： A thin film transistor is provided, including a substrate, a gate, a first dielectric layer, a channel layer, a source/drain and a second dielectric layer. The gate is disposed on the substrate, and the gate and the substrate are covered with the first dielectric layer. The channel layer is at least disposed on the first dielectric layer above the gate. The source/drain is disposed on the channel layer. The source/drain includes a first barrier layer, a conductive layer and a second barrier layer. The first barrier layer is disposed between the conductive layer and the channel layer. The conductive layer is covered with the first barrier layer and the second barrier layer. The source/drain is covered with the second dielectric layer. Accordingly, the variation of electric characters can be reduced. Moreover, a method for fabricating a thin film transistor is also provided.