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    TRANSISTOR AND MANUFACTURING METHOD OF TRANSISTOR
    3.
    发明申请
    TRANSISTOR AND MANUFACTURING METHOD OF TRANSISTOR 审中-公开

    公开(公告)号：US20170179413A1

    公开(公告)日：2017-06-22

    申请号：US15454247

    申请日：2017-03-09

    申请人： FUJIFILM CORPORATION

    发明人： Yoshihisa USAMI ,  Yoshiki MAEHARA ,  Takahiko ICHIKI

    IPC分类号： H01L51/05 ,  H01L51/10

    CPC分类号： H01L51/0529 ,  H01L21/283 ,  H01L29/417 ,  H01L29/423 ,  H01L29/42384 ,  H01L29/49 ,  H01L29/4908 ,  H01L29/7869 ,  H01L51/0541 ,  H01L51/0545 ,  H01L51/105

    摘要： A transistor and a manufacturing method of a transistor which prevents a decrease in mobility, prevents a decrease in a withstand voltage of the insulating layer, and prevents a short circuit between a gate electrode and a semiconductor layer due to curvature. A substrate having insulating properties, a source electrode and a drain electrode disposed in a surface direction of a main surface of the substrate by being separated from each other, a gate electrode disposed between the source electrode and the drain electrode in the surface direction of the substrate, a semiconductor layer disposed in contact with the source electrode and the drain electrode, and an insulating film disposed between the gate electrode and the semiconductor layer in a direction perpendicular to the main surface of the substrate are included, and a gap region is formed between the semiconductor layer and the insulating film.

    N-TYPE THIN FILM TRANSISTOR
    4.
    发明申请
    N-TYPE THIN FILM TRANSISTOR 有权

    公开(公告)号：US20170133613A1

    公开(公告)日：2017-05-11

    申请号：US15409861

    申请日：2017-01-19

    申请人： Tsinghua University ,  HON HAI PRECISION INDUSTRY CO., LTD.

    发明人： GUAN-HONG LI ,  QUN-QING LI ,  YUAN-HAO JIN ,  SHOU-SHAN FAN

    IPC分类号： H01L51/10 ,  H01L51/00

    CPC分类号： H01L51/107 ,  H01L51/0048 ,  H01L51/0096 ,  H01L51/0525 ,  H01L51/0529 ,  H01L51/0541 ,  H01L51/0545 ,  H01L51/0558 ,  Y02E10/549

    摘要： An N-type thin film transistor includes an insulating substrate, a first MgO layer, a semiconductor carbon nanotube layer, a second MgO layer, a functional dielectric layer, a gate electrode, a source electrode and a drain electrode. The first MgO layer is located on the insulating substrate. The semiconductor carbon nanotube layer is located on the first MgO layer. The source electrode and the drain electrode are electrically connected to the semiconductor carbon nanotube layer, wherein the source electrode and the drain electrode are spaced from each other, and a channel is defined in the semiconductor carbon nanotube layer and between the source electrode and the drain electrode. The second MgO layer is located on the semiconductor carbon nanotube layer. The functional dielectric layer covering the second MgO layer. The gate electrode on the functional dielectric layer.

    N-type thin film transistor
    5.
    发明授权
    N-type thin film transistor 有权
    N型薄膜晶体管

    公开(公告)号：US09583723B2

    公开(公告)日：2017-02-28

    申请号：US14985246

    申请日：2015-12-30

    申请人： Tsinghua University ,  HON HAI PRECISION INDUSTRY CO., LTD.

    发明人： Guan-Hong Li ,  Qun-Qing Li ,  Yuan-Hao Jin ,  Shou-Shan Fan

    IPC分类号： H01L51/10 ,  H01L51/00 ,  H01L51/05

    CPC分类号： H01L51/107 ,  H01L51/0048 ,  H01L51/0096 ,  H01L51/052 ,  H01L51/0525 ,  H01L51/0529 ,  H01L51/0541 ,  H01L51/0545 ,  H01L51/0558

    摘要： An N-type thin film transistor includes an insulating substrate, a gate electrode, an insulating layer, a semiconductor carbon nanotube layer, an MgO layer, a functional dielectric layer, a source electrode, and a drain electrode. The gate electrode is located on a surface of the insulating substrate. The insulating layer is located on the gate electrode. The semiconductor carbon nanotube layer is located on the insulating layer. The source electrode and the drain electrode electrically connect the semiconductor carbon nanotube layer, wherein the source electrode and the drain electrode are spaced from each other, and a channel is defined in the semiconductor carbon nanotube layer between the source electrode and the drain electrode. The MgO layer is located on the semiconductor carbon nanotube layer. The functional dielectric layer covers the MgO layer.

    摘要翻译： N型薄膜晶体管包括绝缘基板，栅电极，绝缘层，半导体碳纳米管层，MgO层，功能电介质层，源电极和漏电极。 栅电极位于绝缘基板的表面上。 绝缘层位于栅电极上。 半导体碳纳米管层位于绝缘层上。 源电极和漏电极电连接半导体碳纳米管层，其中源电极和漏极彼此间隔开，并且在源电极和漏电极之间的半导体碳纳米管层中限定沟道。 MgO层位于半导体碳纳米管层上。 功能介电层覆盖MgO层。

    Electronic device insulating layer, and method for producing electronic device insulating layer
    6.
    发明授权
    Electronic device insulating layer, and method for producing electronic device insulating layer 有权
    电子器件绝缘层，以及电子器件绝缘层的制造方法

    公开(公告)号：US09461257B2

    公开(公告)日：2016-10-04

    申请号：US14380400

    申请日：2013-02-26

    申请人： SUMITOMO CHEMICAL COMPANY, LIMITED

    发明人： Isao Yahagi

    IPC分类号： H01L51/05 ,  H01L51/10 ,  H01L51/00

    CPC分类号： H01L51/0529 ,  H01L51/0023 ,  H01L51/0541 ,  H01L51/0545 ,  H01L51/055 ,  H01L51/107 ,  Y10T428/31909

    摘要： An object of the present invention is to provide an electronic device insulating layer which may improve characteristics of an electronic device. The means for solving the object is an electronic device insulating layer comprising a first insulating layer formed from a first insulating layer material and a second insulating layer formed on the first insulating layer from a second insulating layer material, the first insulating layer material being an insulating layer material comprising a photosensitive resin material (A), a tungsten (V) alkoxide (B) and a basic compound (C), the second insulating layer material being an insulating layer material comprising a polymer compound (D) which contains a repeating unit containing a cyclic ether structure and a repeating unit having an organic group capable of producing a phenolic hydroxyl group by the action of an acid.

    摘要翻译： 本发明的目的是提供一种电子设备绝缘层，其可改善电子设备的特性。 用于解决该问题的方法是一种电子器件绝缘层，包括由第一绝缘层材料形成的第一绝缘层和在第一绝缘层上形成的第二绝缘层，第二绝缘层材料是绝缘层 包含感光性树脂材料（A），钨（V）醇盐（B）和碱性化合物（C）的层材料，所述第二绝缘层材料是包含高分子化合物（D）的绝缘层材料，所述高分子化合物（D）含有重复单元 含有环醚结构的重复单元和具有能够通过酸的作用产生酚羟基的有机基团的重复单元。

    Electronic Device
    7.
    发明申请
    Electronic Device 有权
    电子设备

    公开(公告)号：US20160254058A1

    公开(公告)日：2016-09-01

    申请号：US15033558

    申请日：2014-10-30

    申请人： THE UNIVERSITY COURT OF THE UNIVERSITY OF GLASGOW

    发明人： Leroy CRONIN ,  Asen ASENOV

    IPC分类号： G11C16/10 ,  G11C16/34 ,  H01L21/28 ,  G11C16/04 ,  H01L29/788 ,  H01L29/423

    CPC分类号： G11C16/10 ,  G11C16/0466 ,  G11C16/34 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42332 ,  H01L29/7883 ,  H01L51/0084 ,  H01L51/0529

    摘要： Provided is an electronic device, such as a flash memory device and/or a write-once-read-once memory device, where the device has a polyoxometallate that is capable of providing and/or accepting one or more electrons. The polyoxometallate may have a Wells-Dawson structure and the polyoxometallate may comprise a cage and optionally one or more guests. Also provided is a method of using the memory device, the method comprising the step of providing to or accepting from the polyoxometalate one or more electrons to provide a polyoxometalate in a reduced or oxidised state.

    摘要翻译： 提供了一种电子设备，例如闪存设备和/或一次写入一次存储器件，其中该器件具有能够提供和/或接受一个或多个电子的多金属氧酸盐。 多金属氧酸盐可以具有威尔逊 - 道森结构，并且多金属氧酸盐可以包含笼子和任选的一个或多个客人。 还提供了一种使用该存储器件的方法，该方法包括提供或接受多金属氧酸盐一种或多种电子以提供还原或氧化态的多金属氧酸盐的步骤。

    SEMICONDUCTOR ELEMENT AND SEMICONDUCTOR ELEMENT MANUFACTURING METHOD
    8.
    发明申请
    SEMICONDUCTOR ELEMENT AND SEMICONDUCTOR ELEMENT MANUFACTURING METHOD 审中-公开
    半导体元件和半导体元件制造方法

    公开(公告)号：US20160141530A1

    公开(公告)日：2016-05-19

    申请号：US14897530

    申请日：2014-02-28

    申请人： SHARP KABUSHIKI KAISHA

    发明人： Katsuyuki SUGA

    IPC分类号： H01L51/05 ,  H01L51/00 ,  H01L51/10

    CPC分类号： H01L51/0545 ,  H01L51/0005 ,  H01L51/0021 ,  H01L51/0529 ,  H01L51/055 ,  H01L51/105

    摘要： In an organic TFT (1), a material used for uppermost layers (14b, 15b) of a source electrode (14) and a drain electrode (15) has a smaller difference in work function relative to a material used for a semiconductor layer (16) than does a material used for layers of the source electrode (14) and the drain electrode (15) other than the uppermost layers (14a, 14b). The top surfaces and side faces of the uppermost layers of the source electrode (14) and the drain electrode (15) contact the semiconductor layer (16) directly, and the layers of the source electrode (14) and the drain electrode (15) other than the uppermost layers are separated from the semiconductor layer (16) by a second gate insulating layer (12).

    摘要翻译： 在有机TFT（1）中，用于源电极（14）和漏电极（15）的最上层（14b，15b）的材料相对于用于半导体层的材料的功函数差（ 16）比除了最上层（14a，14b）以外的源电极（14）和漏电极（15）的层的材料使用。 源电极（14）和漏电极（15）的最上层的顶面和侧面直接与半导体层（16）接触，源电极（14）和漏电极（15）的层 除了最上层之外，第二栅极绝缘层（12）与半导体层（16）分离。

    Surface modification
    10.
    发明授权
    Surface modification 有权
    表面改性

    公开(公告)号：US09112153B2

    公开(公告)日：2015-08-18

    申请号：US14250327

    申请日：2014-04-10

    申请人： CAMBRIDGE DISPLAY TECHNOLOGY LIMITED

    发明人： Thomas Kugler

    IPC分类号： H01L21/312 ,  H01L51/00 ,  C08J7/04 ,  H01L51/05

    CPC分类号： H01L51/0003 ,  C08J7/042 ,  H01L51/0034 ,  H01L51/0529

    摘要： A method of modifying a fluorinated polymer surface comprising the steps of depositing a first layer on at least a portion of the fluorinated polymer surface, the first layer comprising a first polymer, the first polymer being a substantially perfluorinated aromatic polymer; and depositing a second layer on at least a portion of the first layer, the second layer comprising a second polymer, the second polymer being an aromatic polymer having a lower degree of fluorination than said first polymer, whereby the second layer provides a surface on to which a substance having a lower degree of fluorination than the first polymer, e.g. a non-fluorinated substance is depositable.

    摘要翻译： 一种改性氟化聚合物表面的方法，包括以下步骤：在氟化聚合物表面的至少一部分上沉积第一层，第一层包含第一聚合物，第一聚合物是基本上全氟化的芳族聚合物; 以及在所述第一层的至少一部分上沉积第二层，所述第二层包含第二聚合物，所述第二聚合物是具有比所述第一聚合物低的氟化度的芳族聚合物，由此所述第二层提供表面 其具有比第一聚合物低的氟化度的物质，例如 非氟化物质是可沉积的。