公开(公告)号：US07937048B2

公开(公告)日：2011-05-03

申请号：US11997482

申请日：2006-07-19

申请人： Yoichi Sato ,  Tetsuya Higuchi

发明人： Yoichi Sato ,  Tetsuya Higuchi

IPC分类号： H04B1/02

CPC分类号： H04L27/34 ,  H04B3/54 ,  H04B2203/5416 ,  H04B2203/5425 ,  H04B2203/5491 ,  H04B2203/5495 ,  H04L25/03828 ,  H04L27/2601

摘要： A signal transmission apparatus of the invention comprises: a correlator 12 for shaping a spectrum of a signal; and a precoder 12 disposed on a previous stage of the correlator and including an adder which subtracts an output signal of a feedback filter from an input signal, a modulo arithmetic unit which inputs an output signal of the adder and executes modulo arithmetic operation, and the feedback filter which inputs an output signal of the modulo arithmetic unit and is provided with a transfer function obtained by subtracting 1 from a transfer function of the correlator. The correlator may be IIR filter means having a desired notch characteristic. By disposing a correlator which can freely shape a transmission signal spectrum containing a deep notch and suppress only a specified band on a receiving side, the suppression of an external noise can also be realized.

摘要翻译： 本发明的信号发送装置包括：相关器12，用于对信号的频谱进行整形; 以及预置编码器12，其配置在相关器的前一级，并且包括从输入信号中减去反馈滤波器的输出信号的加法器，输入加法器的输出信号并执行模运算的模运算单元， 反馈滤波器，其输入模运算单元的输出信号，并且具有通过从相关器的传递函数中减去1而获得的传递函数。 相关器可以是具有期望的陷波特性的IIR滤波器装置。 通过设置可以自由地形成包含深陷波的发送信号频谱并且仅抑制接收侧的指定频带的相关器，也可以实现对外部噪声的抑制。

公开(公告)号：US08284856B2

公开(公告)日：2012-10-09

申请号：US12280210

申请日：2007-02-13

申请人： Yoichi Sato ,  Tetsuya Higuchi ,  Masahiro Murakawa

发明人： Yoichi Sato ,  Tetsuya Higuchi ,  Masahiro Murakawa

IPC分类号： H04L27/00

CPC分类号： H04L25/03044 ,  H04L27/38

摘要： A serial-parallel converter/encoder unit 11 inputs a transmission symbol data at a transmission symbol rate that is one-Nth of a base-point symbol rate. A precoder/collator 13 creates a transmission symbol waveform at the base-point symbol rate. The transmission symbol waveform becomes a transmission signal after passing through a roll-off filter 14 with a band corresponding to the base-point symbol rate and a modulator 15. A reception signal demodulated by a demodulator 33 is input to a fractionally-spaced equalizer 38 that operates at the base-point symbol rate and is forcibly equalized at the transmission symbol rate by using a reference signal. A level of a signal output from the fractionally-spaced equalizer 38 at the transmission symbol rate is determined by a level determining unit 39 and becomes a reception symbol data by a sawtooth-function output unit 40.

摘要翻译： 串行/并行转换器/编码器单元11以基点符号率的九分之一的传输符号速率输入传输符号数据。 预编码器/整理器13以基点符号率创建发送符号波形。 发送符号波形在通过具有与基点符号率对应的频带的滚降滤波器14和调制器15之后成为发送信号。由解调器33解调的接收信号被输入到分数间隔的均衡器38 其以基点符号速率操作，并且通过使用参考信号以传输符号速率被强制均衡。 由等级间隔均衡器38以传输符号速率输出的信号电平由电平确定单元39确定，并由锯齿波功能输出单元40变成接收符号数据。

公开(公告)号：US20100061441A1

公开(公告)日：2010-03-11

申请号：US12280210

申请日：2007-02-13

申请人： Yoichi Sato ,  Tetsuya Higuchi ,  Masahiro Murakawa

发明人： Yoichi Sato ,  Tetsuya Higuchi ,  Masahiro Murakawa

IPC分类号： H04L27/01 ,  H04L27/00

CPC分类号： H04L25/03044 ,  H04L27/38

摘要： A serial-parallel converter/encoder unit 11 inputs a transmission symbol data at a transmission symbol rate that is one-Nth of a base-point symbol rate. A precoder/collator 13 creates a transmission symbol waveform at the base-point symbol rate. The transmission symbol waveform becomes a transmission signal after passing through a roll-off filter 14 with a band corresponding to the base-point symbol rate and a modulator 15. A reception signal demodulated by a demodulator 33 is input to a fractionally-spaced equalizer 38 that operates at the base-point symbol rate and is forcibly equalized at the transmission symbol rate by using a reference signal. A level of a signal output from the fractionally-spaced equalizer 38 at the transmission symbol rate is determined by a level determining unit 39 and becomes a reception symbol data by a sawtooth-function output unit 40.

摘要翻译： 串行/并行转换器/编码器单元11以基点符号率的九分之一的传输符号速率输入传输符号数据。 预编码器/整理器13以基点符号率创建发送符号波形。 发送符号波形在通过具有与基点符号率对应的频带的滚降滤波器14和调制器15之后成为发送信号。由解调器33解调的接收信号被输入到分数间隔的均衡器38 其以基点符号速率操作，并且通过使用参考信号以传输符号速率被强制均衡。 由等级间隔均衡器38以传输符号速率输出的信号电平由电平确定单元39确定，并由锯齿波功能输出单元40变成接收符号数据。

公开(公告)号：US20100003933A1

公开(公告)日：2010-01-07

申请号：US11997482

申请日：2006-07-19

申请人： Yoichi Sato ,  Tetsuya Higuchi

发明人： Yoichi Sato ,  Tetsuya Higuchi

IPC分类号： H04B1/04 ,  H04B1/02

CPC分类号： H04L27/34 ,  H04B3/54 ,  H04B2203/5416 ,  H04B2203/5425 ,  H04B2203/5491 ,  H04B2203/5495 ,  H04L25/03828 ,  H04L27/2601

摘要： A signal transmission apparatus of the invention comprises: a correlator 12 for shaping a spectrum of a signal; and a precoder 12 disposed on a previous stage of the correlator and including an adder which subtracts an output signal of a feedback filter from an input signal, a modulo arithmetic unit which inputs an output signal of the adder and executes modulo arithmetic operation, and the feedback filter which inputs an output signal of the modulo arithmetic unit and is provided with a transfer function obtained by subtracting 1 from a transfer function of the correlator. The correlator may be IIR filter means having a desired notch characteristic. By disposing a correlator which can freely shape a transmission signal spectrum containing a deep notch and suppress only a specified band on a receiving side, the suppression of an external noise can also be realized.

摘要翻译： 本发明的信号发送装置包括：相关器12，用于对信号的频谱进行整形; 以及预置编码器12，其配置在相关器的前一级，并且包括从输入信号中减去反馈滤波器的输出信号的加法器，输入加法器的输出信号并执行模运算的模运算单元， 反馈滤波器，其输入模运算单元的输出信号，并且具有通过从相关器的传递函数中减去1而获得的传递函数。 相关器可以是具有期望的陷波特性的IIR滤波器装置。 通过设置可以自由地形成包含深陷波的发送信号频谱并且仅抑制接收侧的指定频带的相关器，也可以实现对外部噪声的抑制。

公开(公告)号：US08887159B2

公开(公告)日：2014-11-11

申请号：US12243843

申请日：2008-10-01

申请人： Hironori Takahashi ,  Motoki Hirano ,  Peirong Liu ,  Yoichi Sato

发明人： Hironori Takahashi ,  Motoki Hirano ,  Peirong Liu ,  Yoichi Sato

IPC分类号： G06F9/46 ,  G06F9/48 ,  G06F9/54

CPC分类号： G06F9/4843 ,  G06F9/545

摘要： Systems and methods are provided for a flexible and scalable operating system achieving a fast boot. A computing system is described that includes a reserved static object memory configured to store predefined static threads, and a secure kernel configured to be executed in a fast boot mode. The secure kernel further may be configured to chain the static threads to a secure kernel thread queue stored in a secure kernel work memory, and to create temporary threads in the secure kernel work memory during the fast boot mode. The computing system may include a main kernel configured to be initialized by creating dynamic threads in a main kernel work memory during the fast boot mode. The main kernel may be configured to chain the static threads to a main kernel thread queue, and to assume control of the static threads from the secure kernel.

摘要翻译： 提供了系统和方法，用于实现快速启动的灵活且可扩展的操作系统。 描述了一种计算系统，其包括被配置为存储预定义的静态线程的保留静态对象存储器，以及配置为以快速启动模式执行的安全内核。 安全内核还可以被配置为将静态线程链接到存储在安全内核工作存储器中的安全内核线程队列，并且在快速引导模式期间在安全内核工作存储器中创建临时线程。 计算系统可以包括被配置为通过在快速启动模式期间在主内核工作存储器中创建动态线程来初始化的主内核。 可以将主内核配置为将静态线程链接到主内核线程队列，并承担来自安全内核的静态线程的控制。

公开(公告)号：US08706315B2

公开(公告)日：2014-04-22

申请号：US13005145

申请日：2011-01-12

申请人： Yoichi Sato

发明人： Yoichi Sato

IPC分类号： G05D23/00

CPC分类号： G06F1/206 ,  H05K7/20836 ,  Y02D10/16

摘要： A cooling controlling apparatus that cools an electronic apparatus includes a cooling fan that discharges air in an inside of the electronic apparatus to an outside of the electronic apparatus; an intake air temperature detector that detects a temperature of air taken into the electronic apparatus by the cooling fan; a part temperature detector that detects a temperature of an electronic part arranged inside the electronic apparatus; and a fan controller that controls a rotation number of the cooling fan based on the detected temperature of the electronic part and the detected intake air temperature.

摘要翻译： 冷却电子设备的冷却控制装置包括将电子设备内部的空气排出到电子设备的外部的冷却风扇; 进气温度检测器，其检测由所述冷却风扇吸入所述电子设备的空气的温度; 部件温度检测器，其检测布置在电子设备内的电子部件的温度; 以及风扇控制器，其基于检测到的电子部件的温度和检测到的进气温度来控制冷却风扇的转速。

公开(公告)号：US08651648B2

公开(公告)日：2014-02-18

申请号：US12810761

申请日：2008-12-25

申请人： Yoichi Sato ,  Masakazu Ohashi

发明人： Yoichi Sato ,  Masakazu Ohashi

IPC分类号： B41J2/01

CPC分类号： B41M5/0017 ,  C09D11/30 ,  C09D11/54 ,  D06P1/445 ,  D06P5/30 ,  Y10T428/2481

摘要： The present invention has its object to provide a treatment solution for inkjet textile printing that causes few remaining marks even when applied to a fabric. The present invention relates to a treatment solution for inkjet textile printing, the treatment solution including at least: 1) a water-soluble polyvalent metal salt; 2) at least one resin component selected from the group consisting of a nonionic resin emulsion, an anionic resin emulsion, and a carboxymethyl cellulose; 3) at least one surfactant component selected from the group consisting of a nonionic surfactant, an anionic surfactant, and an amphoteric surfactant; and 4) an aqueous medium, the treatment solution being applied to a fabric before printing of an ink composition for inkjet textile printing.

摘要翻译： 本发明的目的是提供一种用于喷墨织物印刷的处理溶液，即使在施加到织物上时也几乎没有剩余痕迹。 本发明涉及一种喷墨织物印花处理液，该处理液至少包括：1）水溶性多价金属盐; 2）至少一种选自非离子树脂乳液，阴离子树脂乳液和羧甲基纤维素的树脂组分; 3）至少一种选自非离子表面活性剂，阴离子表面活性剂和两性表面活性剂的表面活性剂组分; 和4）水性介质，所述处理溶液在印刷用于喷墨织物印刷的油墨组合物之前施加到织物上。

公开(公告)号：US08109150B2

公开(公告)日：2012-02-07

申请号：US12530394

申请日：2008-07-24

申请人： Yoichi Sato ,  Koichi Morimura ,  Shinichiro Hori ,  Shintaro Kumano ,  Takanori Karato ,  Masato Kurita

发明人： Yoichi Sato ,  Koichi Morimura ,  Shinichiro Hori ,  Shintaro Kumano ,  Takanori Karato ,  Masato Kurita

IPC分类号： G01B5/28 ,  G06F19/00 ,  G01N29/04 ,  G01N19/08

CPC分类号： G01N3/00 ,  G01M5/0016 ,  G01M5/0033 ,  G01N2203/0062 ,  G01N2203/0064 ,  G01N2203/0066 ,  G01N2203/0218

摘要： The precision of crack-propagation prediction is improved by taking into consideration a variation in the error due to inspectors and inspection methods. There is provided a crack-propagation prediction method including a correlation-information preparing step of measuring the length of a crack initiated in a test object by a plurality of inspectors and/or a plurality of inspection methods and obtaining correlation information between data acquired through the measurement and the condition of an actual crack; a crack-length estimating step of estimating the actual length of the crack initiated in an inspection target on the basis of the crack length measured by an inspector during inspection of the inspection target and the correlation information; and a crack-propagation-curve estimating step of estimating a crack-propagation curve of the inspection target originating from the crack length estimated in the crack-length estimating step.

摘要翻译： 通过考虑到由于检查人员和检查方法导致的误差的变化，提高了裂纹扩展预测的精度。 提供了一种裂纹扩展预测方法，包括：相关信息准备步骤，通过多个检查者和/或多个检查方法测量在测试对象中发起的裂纹的长度，并获得通过 测量和实际裂纹的状况; 裂纹长度估计步骤，基于在检查对象的检查期间由检查员测量的裂纹长度和相关信息，估计检查对象中发生的裂纹的实际长度; 以及裂纹扩展曲线估计步骤，用于估计由裂纹长度估计步骤中估计的裂缝长度产生的检测对象的裂纹扩展曲线。

公开(公告)号：US20110255323A1

公开(公告)日：2011-10-20

申请号：US12977243

申请日：2010-12-23

申请人： Kanji Otsuka ,  Tsuneo Ito ,  Yoichi Sato ,  Masahiro Yoshida ,  Shigeru Yamamoto ,  Takeshi Koyama ,  Yuko Tanba ,  Yutaka Akiyama

发明人： Kanji Otsuka ,  Tsuneo Ito ,  Yoichi Sato ,  Masahiro Yoshida ,  Shigeru Yamamoto ,  Takeshi Koyama ,  Yuko Tanba ,  Yutaka Akiyama

IPC分类号： G11C5/06

CPC分类号： G06F13/4022 ,  G11C5/02 ,  G11C7/1006 ,  G11C2213/71

摘要： There is a problem that a bandwidth bottleneck occurs because a crossbar switch is used to cope with an increase in scale. In an example of a memory/logic conjugate system according to the present invention, a plurality of cluster memory chips each including a plurality of cluster memories 20 including basic cells 10 arranged in a cluster, the basic cell 10 including a memory circuit, and a controller chip that controls the plurality of cluster memories are three-dimensionally stacked, the plurality of cluster memories 20 located along the stacking direction of the plurality of cluster memory chips and the controller chip are electrically coupled to the controller chip via a multibus 11 including a through-via, an arbitrary one of the basic cells 10 is directly accessed through the multibus 11 from the controller chip so that truth value data is written therein, and whereby the arbitrary basic cell 10 is switched to a logic circuit as conjugate.

摘要翻译： 存在带宽瓶颈的问题，因为使用交叉开关来应对规模的增加。 在根据本发明的存储器/逻辑共轭系统的示例中，多个集群存储器芯片，每个集群存储器芯片包括多个集群存储器20，其包括布置在集群中的基本单元10，基本单元10包括存储器电路，以及 控制多个集群存储器的控制器芯片是三维堆叠的，沿着多个集群存储器芯片的堆叠方向定位的多个集群存储器20和控制器芯片经由多片11电连接到控制器芯片， 通孔中，任意一个基本单元10通过多轴11从控制器芯片直接访问，从而将真值数据写入其中，从而将任意的基本单元10切换到逻辑电路作为共轭。

公开(公告)号：US07633250B2

公开(公告)日：2009-12-15

申请号：US10995189

申请日：2004-11-24

申请人： Yoichi Sato

发明人： Yoichi Sato

IPC分类号： H02P3/00 ,  H02P5/00 ,  H02P7/00 ,  H02P3/20

CPC分类号： H05K7/20209

摘要： The present invention provides a fan that has a fan motor and two signal lines including a number-of-rotations switching control signal line and a rotational state outputting signal line, makes the fan motor rotate at a number of rotations determined by a number-of-rotations switching control signal input via the number-of-rotations switching control signal line, outputs the rotational state of the fan motor via the rotational state outputting signal line, and can provide notification of detail data without increasing the number of signal lines. The fan retains data in the data storage section in a non-volatile manner and outputs the data via the conventionally existing rotational state outputting signal line.

摘要翻译： 本发明提供一种风扇，其具有风扇电动机和包括转数转换控制信号线和旋转状态输出信号线的两条信号线，使风扇电动机以多个 经旋转数切换控制信号线输入的旋转切换控制信号通过旋转状态输出信号线输出风扇马达的旋转状态，能够提供详细数据的通知而不增加信号线数。 风扇以非易失性方式将数据保存在数据存储部分中，并通过常规旋转状态输出信号线输出数据。