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    Memory/logic conjugate system
    1.
    发明授权
    Memory/logic conjugate system 失效
    存储器/逻辑共轭系统

    公开(公告)号：US08305789B2

    公开(公告)日：2012-11-06

    申请号：US12977243

    申请日：2010-12-23

    申请人： Kanji Otsuka ,  Tsuneo Ito ,  Yoichi Sato ,  Masahiro Yoshida ,  Shigeru Yamamoto ,  Takeshi Koyama ,  Yuko Tanba ,  Yutaka Akiyama

    发明人： Kanji Otsuka ,  Tsuneo Ito ,  Yoichi Sato ,  Masahiro Yoshida ,  Shigeru Yamamoto ,  Takeshi Koyama ,  Yuko Tanba ,  Yutaka Akiyama

    IPC分类号： G11C5/06

    CPC分类号： G06F13/4022 ,  G11C5/02 ,  G11C7/1006 ,  G11C2213/71

    摘要： A bandwidth bottleneck occurs because a crossbar switch is used to cope with an increase in scale. A memory/logic conjugate system according to the present invention, a plurality of cluster memory chips each including a plurality of cluster memories 20 including basic cells 10 arranged in a cluster, the basic cell 10 including a memory circuit, and a controller chip that controls the plurality of cluster memories are three-dimensionally stacked, the plurality of cluster memories 20 located along the stacking direction of the plurality of cluster memory chips and the controller chip are electrically coupled to the controller chip via a multibus 11 including a through-via, an arbitrary one of the basic cells 10 is directly accessed through the multibus 11 from the controller chip so that truth value data is written therein, and whereby the arbitrary basic cell 10 is switched to a logic circuit as conjugate.

    摘要翻译： 发生带宽瓶颈是因为使用横杠开关来应对规模的增加。 根据本发明的存储器/逻辑共轭系统，多个集群存储器芯片，每个集群存储器芯片包括多个集群存储器20，集群存储器20包括布置在集群中的基本单元10，基本单元10包括存储器电路，以及控制芯片， 多个集群存储器是三维堆叠的，沿着多个集群存储器芯片的堆叠方向定位的多个集群存储器20和控制器芯片经由包括通孔的多通道11电耦合到控制器芯片， 基本单元10中的任意一个基本单元10通过多轴11从控制器芯片直接访问，从而将真值数据写入其中，并且由此将任意基本单元10切换到逻辑电路作为共轭。

    MEMORY/LOGIC CONJUGATE SYSTEM
    2.
    发明申请
    MEMORY/LOGIC CONJUGATE SYSTEM 失效
    内存/逻辑连接系统

    公开(公告)号：US20110255323A1

    公开(公告)日：2011-10-20

    申请号：US12977243

    申请日：2010-12-23

    申请人： Kanji Otsuka ,  Tsuneo Ito ,  Yoichi Sato ,  Masahiro Yoshida ,  Shigeru Yamamoto ,  Takeshi Koyama ,  Yuko Tanba ,  Yutaka Akiyama

    发明人： Kanji Otsuka ,  Tsuneo Ito ,  Yoichi Sato ,  Masahiro Yoshida ,  Shigeru Yamamoto ,  Takeshi Koyama ,  Yuko Tanba ,  Yutaka Akiyama

    IPC分类号： G11C5/06

    CPC分类号： G06F13/4022 ,  G11C5/02 ,  G11C7/1006 ,  G11C2213/71

    摘要： There is a problem that a bandwidth bottleneck occurs because a crossbar switch is used to cope with an increase in scale. In an example of a memory/logic conjugate system according to the present invention, a plurality of cluster memory chips each including a plurality of cluster memories 20 including basic cells 10 arranged in a cluster, the basic cell 10 including a memory circuit, and a controller chip that controls the plurality of cluster memories are three-dimensionally stacked, the plurality of cluster memories 20 located along the stacking direction of the plurality of cluster memory chips and the controller chip are electrically coupled to the controller chip via a multibus 11 including a through-via, an arbitrary one of the basic cells 10 is directly accessed through the multibus 11 from the controller chip so that truth value data is written therein, and whereby the arbitrary basic cell 10 is switched to a logic circuit as conjugate.

    摘要翻译： 存在带宽瓶颈的问题，因为使用交叉开关来应对规模的增加。 在根据本发明的存储器/逻辑共轭系统的示例中，多个集群存储器芯片，每个集群存储器芯片包括多个集群存储器20，其包括布置在集群中的基本单元10，基本单元10包括存储器电路，以及 控制多个集群存储器的控制器芯片是三维堆叠的，沿着多个集群存储器芯片的堆叠方向定位的多个集群存储器20和控制器芯片经由多片11电连接到控制器芯片， 通孔中，任意一个基本单元10通过多轴11从控制器芯片直接访问，从而将真值数据写入其中，从而将任意的基本单元10切换到逻辑电路作为共轭。

    Electrostatic discharge protection circuit and terminating resistor circuit
    5.
    发明申请
    Electrostatic discharge protection circuit and terminating resistor circuit 有权
    静电放电保护电路和终端电阻电路

    公开(公告)号：US20080042686A1

    公开(公告)日：2008-02-21

    申请号：US11819579

    申请日：2007-06-28

    申请人： Kanji Otsuka ,  Tamotsu Usami ,  Yutaka Akiyama ,  Tsuneo Ito ,  Yuko Tanba

    发明人： Kanji Otsuka ,  Tamotsu Usami ,  Yutaka Akiyama ,  Tsuneo Ito ,  Yuko Tanba

    IPC分类号： H03K19/003 ,  H02H9/04

    CPC分类号： H01L27/0266

    摘要： Disclosed is an electrostatic discharge protection circuit capable of realizing speeding up of differential signals by reducing a capacitance of the circuit. Transmission lines are connected to an IN terminal and an IN Bar terminal and differential signals are input to the terminals. The ESD protection circuit is connected to the transmission lines and protects an internal circuit from a surge voltage applied to the IN terminal and the IN Bar terminal. A pair of transistors of the ESD protection circuit is formed in the same well. Thereby, when differential signals transit, charges in drains of the pair of transistors holding a state before a transition transfer in the same well. As a result, the capacitances in the drains of the pair of transistors are reduced with respect to the transition of differential signals so that the speeding up of differential signals can be realized.

    摘要翻译： 公开了一种能够通过减小电路的电容来实现差分信号的加速的静电放电保护电路。 传输线连接到IN端子，IN条形端子和差分信号输入端子。 ESD保护电路连接到传输线，并保护内部电路免受施加到IN端子和IN Bar端子的浪涌电压。 ESD保护电路的一对晶体管形成在同一个阱中。 因此，当差分信号传输时，在同一井内转移转移之前保持状态的一对晶体管的漏极中的电荷。 结果，一对晶体管的漏极中的电容相对于差分信号的转变而减小，从而可以实现差分信号的加速。

    Electrostatic discharge protection circuit and terminating resistor circuit
    6.
    发明授权
    Electrostatic discharge protection circuit and terminating resistor circuit 有权
    静电放电保护电路和终端电阻电路

    公开(公告)号：US07791852B2

    公开(公告)日：2010-09-07

    申请号：US11819579

    申请日：2007-06-28

    申请人： Kanji Otsuka ,  Tamotsu Usami ,  Yutaka Akiyama ,  Tsuneo Ito ,  Yuko Tanba

    发明人： Kanji Otsuka ,  Tamotsu Usami ,  Yutaka Akiyama ,  Tsuneo Ito ,  Yuko Tanba

    IPC分类号： H02H3/22

    CPC分类号： H01L27/0266

    摘要： Disclosed is an electrostatic discharge protection circuit capable of realizing speeding up of differential signals by reducing a capacitance of the circuit. Transmission lines are connected to an IN terminal and an IN Bar terminal and differential signals are input to the terminals. The ESD protection circuit is connected to the transmission lines and protects an internal circuit from a surge voltage applied to the IN terminal and the IN Bar terminal. A pair of transistors of the ESD protection circuit is formed in the same well. Thereby, when differential signals transit, charges in drains of the pair of transistors holding a state before a transition transfer in the same well. As a result, the capacitances in the drains of the pair of transistors are reduced with respect to the transition of differential signals so that the speeding up of differential signals can be realized.

    摘要翻译： 公开了一种能够通过减小电路的电容来实现差分信号的加速的静电放电保护电路。 传输线连接到IN端子，IN条形端子和差分信号输入端子。 ESD保护电路连接到传输线，并保护内部电路免受施加到IN端子和IN Bar端子的浪涌电压。 ESD保护电路的一对晶体管形成在同一个阱中。 因此，当差分信号转移时，在同一井内转移转移之前保持状态的一对晶体管的漏极中的电荷。 结果，一对晶体管的漏极中的电容相对于差分信号的转变而减小，从而可以实现差分信号的加速。

    Signal transmission circuit and signal transmission system with reduced reflection
    7.
    发明授权
    Signal transmission circuit and signal transmission system with reduced reflection 有权
    信号传输电路和信号传输系统减少反射

    公开(公告)号：US07969256B2

    公开(公告)日：2011-06-28

    申请号：US12153786

    申请日：2008-05-23

    申请人： Kanji Otsuka ,  Yutaka Akiyama

    发明人： Kanji Otsuka ,  Yutaka Akiyama

    IPC分类号： H04B3/28

    CPC分类号： H04L25/028

    摘要： A signal transmission circuit includes a transmitting circuit for outputting a transmitting signal to a transmission line, a parallel circuit including a capacitor and a first resistance connected between an output terminal of the transmitting circuit and the transmission line, and a series circuit including an inductor and a second resistance connected between an output side of the parallel circuit and a ground.

    摘要翻译： 信号传输电路包括用于向传输线输出发送信号的发送电路，包括电容器的并联电路和连接在发送电路的输出端子与传输线路之间的第一电阻，以及串联电路，包括电感器和 连接在并联电路的输出侧和地之间的第二电阻。

    Antenna apparatus utilizing aperture of transmission line
    9.
    发明授权
    Antenna apparatus utilizing aperture of transmission line 有权
    利用传输线孔径的天线装置

    公开(公告)号：US07872612B2

    公开(公告)日：2011-01-18

    申请号：US12155247

    申请日：2008-05-30

    申请人： Kanji Otsuka ,  Tamotsu Usami ,  Yutaka Akiyama ,  Chihiro Ueda

    发明人： Kanji Otsuka ,  Tamotsu Usami ,  Yutaka Akiyama ,  Chihiro Ueda

    IPC分类号： H01Q9/28

    CPC分类号： H01Q13/06

    摘要： An antenna apparatus utilizing an aperture of transmission line, which is connected to a first transmission line having a predetermined characteristic impedance, includes a tapered line portion, and an aperture portion. The tapered line portion is connected to one end of the transmission line, and the tapered line portion includes a second transmission line including a pair of line conductors. The tapered line portion keeps a predetermined characteristic impedance constant and expands at least one of a width of the transmission line and an interval in a tapered shape at a predetermined taper angle. The aperture portion has a radiation aperture connected to one end of the tapered line portion. A size of one side of the aperture end plane of the aperture portion is set to be equal to or higher than a quarter wavelength of the minimum operating frequency of the antenna apparatus.

    摘要翻译： 利用连接到具有预定特性阻抗的第一传输线的传输线孔径的天线装置包括锥形线部分和开口部分。 锥形线部分连接到传输线的一端，并且锥形线部分包括包括一对线导体的第二传输线。 锥形线部分保持预定的特性阻抗恒定，并以预定的锥角将传输线的宽度和间隔的至少一个以锥形形状扩展。 开口部分具有连接到锥形线部分的一端的辐射孔。 开口部的孔径端面的一侧的尺寸被设定为等于或高于天线装置的最小工作频率的四分之一波长。

    Antenna apparatus utilizing aperture of transmission line
    10.
    发明申请
    Antenna apparatus utilizing aperture of transmission line 有权
    利用传输线孔径的天线装置

    公开(公告)号：US20080316136A1

    公开(公告)日：2008-12-25

    申请号：US12155247

    申请日：2008-05-30

    申请人： Kanji Otsuka ,  Tamotsu Usami ,  Yutaka Akiyama ,  Chihiro Ueda

    发明人： Kanji Otsuka ,  Tamotsu Usami ,  Yutaka Akiyama ,  Chihiro Ueda

    IPC分类号： H01Q9/28

    CPC分类号： H01Q13/06

    摘要： An antenna apparatus utilizing an aperture of transmission line, which is connected to a first transmission line having a predetermined characteristic impedance, includes a tapered line portion, and an aperture portion. The tapered line portion is connected to one end of the transmission line, and the tapered line portion includes a second transmission line including a pair of line conductors. The tapered line portion keeps a predetermined characteristic impedance constant and expands at least one of a width of the transmission line and an interval in a tapered shape at a predetermined taper angle. The aperture portion has a radiation aperture connected to one end of the tapered line portion. A size of one side of the aperture end plane of the aperture portion is set to be equal to or higher than a quarter wavelength of the minimum operating frequency of the antenna apparatus.

    摘要翻译： 利用连接到具有预定特性阻抗的第一传输线的传输线孔径的天线装置包括锥形线部分和开口部分。 锥形线部分连接到传输线的一端，并且锥形线部分包括包括一对线导体的第二传输线。 锥形线部分保持预定的特性阻抗恒定，并以预定的锥角将传输线的宽度和间隔的至少一个以锥形形状扩展。 开口部分具有连接到锥形线部分的一端的辐射孔。 开口部的孔径端面的一侧的尺寸被设定为等于或高于天线装置的最小工作频率的四分之一波长。