公开(公告)号：US07964491B2

公开(公告)日：2011-06-21

申请号：US12345612

申请日：2008-12-29

申请人： Yong Chul Shin ,  Tae Kyung Kim

发明人： Yong Chul Shin ,  Tae Kyung Kim

IPC分类号： H01L21/44

CPC分类号： H01L21/76816 ,  H01L21/76802 ,  H01L23/485 ,  H01L27/105 ,  H01L27/11521 ,  H01L27/11529 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming metal wirings of a nonvolatile memory device include forming a first insulating layer over a semiconductor substrate including a first junction area and a second junction area, forming first and second contact holes through which the first and second junction areas are respectively exposed in the first insulating layer, forming first and second contact plugs within the first and second contact holes, etching a part of the second contact plug, thus forming a recess, forming a second insulating layer to fill the recess, forming a third insulating layer over the semiconductor substrate including the first and second insulating layers, forming a first trench through which the first contact plug is exposed a second trench through which the second contact plug is exposed by etching the third insulating layer, and forming first and second metal wirings within the first and second trenches, respectively.

摘要翻译： 形成非易失性存储器件的金属配线的方法包括在包括第一接合区域和第二接合区域的半导体衬底上形成第一绝缘层，形成第一和第二接触孔，第一和第二接合区域分别通过该接触孔暴露在 第一绝缘层，在第一和第二接触孔内形成第一和第二接触塞，蚀刻第二接触塞的一部分，从而形成凹陷，形成第二绝缘层以填充凹部，在第 包括所述第一和第二绝缘层的半导体衬底，形成第一沟槽，所述第一接触插塞通过所述第一沟槽露出第二沟槽，所述第二接触插塞通过蚀刻所述第三绝缘层而暴露在所述第二沟槽中;以及在所述第一沟槽内形成第一和第二金属布线 和第二个沟槽。

公开(公告)号：US06329106B1

公开(公告)日：2001-12-11

申请号：US09393868

申请日：1999-09-10

申请人： Sang Man Bae ,  Yong Chul Shin ,  Young Mo Koo ,  Kwang Yoon Koh ,  Bong Ho Kim ,  Dong Jun Ahn

发明人： Sang Man Bae ,  Yong Chul Shin ,  Young Mo Koo ,  Kwang Yoon Koh ,  Bong Ho Kim ,  Dong Jun Ahn

IPC分类号： G03F900

CPC分类号： G03F1/32 ,  G03F1/74

摘要： The present invention is directed to prevent generating repair by-products during a repair process of a phase shift mask, and defects on a quartz substrate. According to the present invention, a repair method for phase shift mask in a semiconductor device so as to remove a bridge formed between a phase shift layer on a quartz substrate, comprises the steps of: first repairing the bridge by implanting a charging ion according to a focused ion beam(“FIB”) method; and second repairing the first repaired bridge portion by emitting laser and then removing the bridge.

摘要翻译： 本发明旨在防止在相移掩模的修复过程中产生修复副产物，并且在石英衬底上产生缺陷。根据本发明，一种用于半导体器件中的相移掩模的修复方法，以便去除 形成在石英衬底上的相移层之间的桥包括以下步骤：首先通过根据聚焦离子束（“FIB”）方法注入充电离子来修复桥; 并且通过发射激光器然后去除桥接件来修复第一修复的桥接部分。

公开(公告)号：US09768114B2

公开(公告)日：2017-09-19

申请号：US13290379

申请日：2011-11-07

申请人： Yong Chul Shin

发明人： Yong Chul Shin

IPC分类号： H01L23/528 ,  H01L23/522

CPC分类号： H01L23/528 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a first line pattern and a second line pattern formed in parallel on a semiconductor substrate, third line patterns formed in parallel between the first line pattern and the second line pattern, fourth line patterns formed in parallel between the first line pattern and the second line pattern, a first connection structure configured to couple a first of the third line patterns with a first of the fourth lines patterns, which are adjacent to the first line pattern, and a second connection structure configured to couple a second of the first lines patterns with a second of the fourth lines patterns, which are adjacent to the second line pattern.

公开(公告)号：US20090004866A1

公开(公告)日：2009-01-01

申请号：US12016771

申请日：2008-01-18

申请人： Woo Yung Jung ,  Yong Chul Shin

发明人： Woo Yung Jung ,  Yong Chul Shin

IPC分类号： H01L21/311

CPC分类号： H01L21/31144 ,  H01L21/0271 ,  H01L21/32139

摘要： A method for fabricating a semiconductor device includes forming a target etch layer over a substrate, a first auxiliary layer over the target etch layer, an isolation layer over the first auxiliary layer, and a second auxiliary layer over the isolation layer. A first exposure process is performed, where the first auxiliary layer is in focus and the second auxiliary layer is out of focus. A second exposure process is performed, where the second auxiliary layer in focus and the first auxiliary layer is out of focus. The second auxiliary layer is developed to form first mask patterns. The isolation layer and the first auxiliary layer are etched by using the first mask patterns to form second mask patterns. The second mask patterns are developed to form third mask patterns that are used to facilitate subsequent etching of the target etch layer.

摘要翻译： 一种用于制造半导体器件的方法包括在衬底上形成目标蚀刻层，在目标蚀刻层上形成第一辅助层，在第一辅助层上形成隔离层，以及在隔离层上方形成第二辅助层。 执行第一曝光处理，其中第一辅助层被聚焦并且第二辅助层失焦。 执行第二曝光处理，其中聚焦的第二辅助层和第一辅助层失焦。 第二辅助层被开发以形成第一掩模图案。 通过使用第一掩模图案来蚀刻隔离层和第一辅助层以形成第二掩模图案。 第二掩模图案被开发以形成用于促进目标蚀刻层的后续蚀刻的第三掩模图案。

公开(公告)号：US20080194098A1

公开(公告)日：2008-08-14

申请号：US11771989

申请日：2007-06-29

申请人： Yong Chul Shin

发明人： Yong Chul Shin

IPC分类号： H01L21/4763 ,  H01L29/788

CPC分类号： H01L21/76816 ,  H01L27/115 ,  H01L27/11521

摘要： A method of forming a semiconductor device includes forming a first conductive layer over a semiconductor substrate. A dielectric layer is formed over the first conductive layer. A mask pattern having a first opening is formed over the dielectric layer. The mask pattern is annealed to convert the first opening into a second opening that is smaller than the first opening. The dielectric layer is etched using the mask pattern with the second opening to form a hole that exposes the first conductive layer. A second conductive layer is formed over the dielectric layer and within the hole, the second conductive layer contacting the first conductive layer pattern through the hole.

摘要翻译： 形成半导体器件的方法包括在半导体衬底上形成第一导电层。 在第一导电层上方形成电介质层。 在电介质层上形成具有第一开口的掩模图案。 将掩模图案退火以将第一开口转换成小于第一开口的第二开口。 使用具有第二开口的掩模图案蚀刻电介质层，以形成露出第一导电层的孔。 第二导电层形成在电介质层之上并且在孔内，第二导电层通过孔接触第一导电层图案。

公开(公告)号：US07955985B2

公开(公告)日：2011-06-07

申请号：US12016771

申请日：2008-01-18

申请人： Woo Yung Jung ,  Yong Chul Shin

发明人： Woo Yung Jung ,  Yong Chul Shin

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L21/31144 ,  H01L21/0271 ,  H01L21/32139

摘要： A method for fabricating a semiconductor device includes forming a target etch layer over a substrate, a first auxiliary layer over the target etch layer, an isolation layer over the first auxiliary layer, and a second auxiliary layer over the isolation layer. A first exposure process is performed, where the first auxiliary layer is in focus and the second auxiliary layer is out of focus. A second exposure process is performed, where the second auxiliary layer in focus and the first auxiliary layer is out of focus. The second auxiliary layer is developed to form first mask patterns. The isolation layer and the first auxiliary layer are etched by using the first mask patterns to form second mask patterns. The second mask patterns are developed to form third mask patterns that are used to facilitate subsequent etching of the target etch layer.

摘要翻译： 一种用于制造半导体器件的方法包括在衬底上形成目标蚀刻层，在目标蚀刻层上形成第一辅助层，在第一辅助层上形成隔离层，以及在隔离层上方形成第二辅助层。 执行第一曝光处理，其中第一辅助层被聚焦并且第二辅助层失焦。 执行第二曝光处理，其中聚焦的第二辅助层和第一辅助层失焦。 第二辅助层被开发以形成第一掩模图案。 通过使用第一掩模图案来蚀刻隔离层和第一辅助层以形成第二掩模图案。 第二掩模图案被开发以形成用于促进目标蚀刻层的后续蚀刻的第三掩模图案。

公开(公告)号：US20100210722A1

公开(公告)日：2010-08-19

申请号：US12682493

申请日：2008-10-07

申请人： Yong Chul Shin ,  Myung-Sook Choi ,  Myoung-Nam Woo ,  Kyung Hwa Jung ,  Ki Seok Kim

发明人： Yong Chul Shin ,  Myung-Sook Choi ,  Myoung-Nam Woo ,  Kyung Hwa Jung ,  Ki Seok Kim

IPC分类号： A61K31/22 ,  C07C69/00 ,  A61P3/00

CPC分类号： A61K31/336

摘要： The present invention relates to a composition for the prevention or treatment lipid metabolic disorders comprising fucoxanthin or marine plant extract comtaining the same as an effective indredients. Fucoxanthin or a marine plant extract comprising the same is effective in reducing weight increase and reducing triglyceride and cholesterol level in liver tissue, or plasma through inhibiting the synthesis of fatty acid and promoting the oxidation of fatty acid. Therefore, the composition comprising fucoxanthin or a marine plant extract comprising the same as an effective ingredient may be effectively used for the prevention and treatment of lipid metabolic disorders.

摘要翻译： 本发明涉及用于预防或治疗脂质代谢紊乱的组合物，其包含与有效成分相同的岩藻黄素或海洋植物提取物。 岩藻黄素或其组合物的海洋植物提取物通过抑制脂肪酸的合成和促进脂肪酸的氧化，有效降低肝组织或血浆中的甘油三酯和胆固醇水平的增加和减少。 因此，含有岩藻黄素的组合物或与有效成分相同的海洋植物提取物可以有效地用于预防和治疗脂质代谢紊乱。

公开(公告)号：US07592168B2

公开(公告)日：2009-09-22

申请号：US10568132

申请日：2004-08-10

申请人： Yong Chul Shin ,  John Y J Jeon ,  Kyung Hwa Jung ,  Mi Ran Park ,  Youngso Kim

发明人： Yong Chul Shin ,  John Y J Jeon ,  Kyung Hwa Jung ,  Mi Ran Park ,  Youngso Kim

IPC分类号： C12N9/80 ,  C07H21/04

CPC分类号： C12N9/80 ,  C12P35/02

摘要： A CPC acylase mutant of the present invention has an improved reactivity and specific activity to CPC, which can be efficiently employed for directly preparing 7-ACA from CPC by a one-step enzymatic method.

摘要翻译： 本发明的CPC酰基转移酶突变体对CPC具有改善的反应性和比活性，可以有效地用于通过一步酶法直接制备CPC的7-ACA。

公开(公告)号：US20080191283A1

公开(公告)日：2008-08-14

申请号：US11856696

申请日：2007-09-17

申请人： Yong Chul Shin

发明人： Yong Chul Shin

IPC分类号： H01L27/088 ,  H01L21/8234

CPC分类号： H01L21/823475 ,  H01L27/105 ,  H01L27/1052

摘要： A semiconductor device includes a gate pattern formed over a semiconductor substrate, the substrate defining a cell region and a peripheral region. First and second contact plugs are formed in the cell region. Third and fourth contact plugs are formed in the peripheral region. A first separation structure is formed in the cell region and covers the first contact plug. A second separation structures are formed in the peripheral region and define first and second openings, the first opening exposing an upper portion of the third contact plug, the second opening exposing an upper portion of the fourth contact plug. First, second, and third metal wire sections are formed over the first, second, third, and fourth contact plugs. The first metal wire section is formed in the cell region and contacts the second contact plug. The second metal wire section is formed in the peripheral region and contacts the third contact plug. The third metal wire section is formed in the peripheral region and contacts the fourth contact plug. The first separation structure electrically isolates the first contact plug from the first metal section.

摘要翻译： 半导体器件包括形成在半导体衬底上的栅极图案，衬底限定单元区域和外围区域。 第一和第二接触塞形成在电池区域中。 第三和第四接触塞形成在周边区域中。 在单元区域中形成第一分离结构并覆盖第一接触插塞。 第二分离结构形成在周边区域中并且限定第一和第二开口，第一开口暴露第三接触插塞的上部，第二开口露出第四接触插塞的上部。 第一，第二和第三金属线部分形成在第一，第二，第三和第四接触塞上。 第一金属线部分形成在电池区域中并接触第二接触插塞。 第二金属线部分形成在周边区域中并接触第三接触插塞。 第三金属线部分形成在周边区域中并与第四接触插塞接触。 第一分离结构将第一接触插塞与第一金属部分电隔离。

公开(公告)号：US07005329B2

公开(公告)日：2006-02-28

申请号：US10889919

申请日：2004-07-13

申请人： Yong Chul Shin

发明人： Yong Chul Shin

IPC分类号： H01L21/00

CPC分类号： H01L27/10858

摘要： Disclosed is a method for manufacturing a semiconductor device. The method comprises the steps of: providing a first substrate and a second substrate; forming a capacitor and a gate line on a first surface of the first substrate; forming an insulating layer on a resultant structure of the first substrate; bonding the second substrate to the insulating layer of the first substrate; turning a resultant structure over in such a manner that a second surface of the first substrate is an upper surface of the resultant structure; polishing the second surface of the first substrate by a predetermined thickness; forming an isolation layer for defining an active region by performing an isolation process with respect to the second surface of the first substrate for which a polishing process is finished; and forming a bit line on the active region in the first substrate.

摘要翻译： 公开了半导体器件的制造方法。 该方法包括以下步骤：提供第一基底和第二基底; 在所述第一基板的第一表面上形成电容器和栅极线; 在所述第一基板的所得结构上形成绝缘层; 将第二基板接合到第一基板的绝缘层; 转动所得结构，使得第一基板的第二表面是所得结构的上表面; 将第一基板的第二表面抛光预定厚度; 通过对抛光处理结束的第一基板的第二表面执行隔离工艺来形成用于限定有源区的隔离层; 以及在第一衬底的有源区上形成位线。