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1.发明申请NON-VOLATILE MEMORY DEVICE GENERATING A RESET PULSE BASED ON A SET PULSE, AND METHOD OF OPERATING THE SAME 有权基于设定脉冲产生复位脉冲的非易失性存储器件及其操作方法公开(公告)号：US20130265837A1
公开(公告)日：2013-10-10
申请号：US13710504
申请日：2012-12-11
申请人： Yong Jin Kwon , Kwang Jin Lee , Hye-Jin Kim
发明人： Yong Jin Kwon , Kwang Jin Lee , Hye-Jin Kim
IPC分类号： G11C7/22
CPC分类号： G11C7/22 , G11C13/00 , G11C13/0004 , G11C13/0061 , G11C13/0069 , G11C29/021 , G11C29/023 , G11C29/028 , G11C2013/0088
摘要： A non-volatile memory device includes a set pulse generator configured to generate a set pulse, a reset pulse generator configured to generate a reset pulse based on the set pulse, and a write driver block configured to write second data to a second non-volatile memory cell using the reset pulse, while writing first data to a first non-volatile memory cell using the set pulse.
摘要翻译： 非易失性存储器件包括被配置为产生置位脉冲的置位脉冲发生器，被配置为基于所设置的脉冲产生复位脉冲的复位脉冲发生器，以及被配置为将第二数据写入第二非易失性的写入驱动器块 使用复位脉冲的存储单元，同时使用设定脉冲将第一数据写入第一非易失性存储单元。
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2.发明授权Non-volatile memory device generating a reset pulse based on a set pulse, and method of operating the same 有权基于设定脉冲产生复位脉冲的非易失性存储器件及其操作方法公开(公告)号：US08787100B2
公开(公告)日：2014-07-22
申请号：US13710504
申请日：2012-12-11
申请人： Yong Jin Kwon , Kwang Jin Lee , Hye-Jin Kim
发明人： Yong Jin Kwon , Kwang Jin Lee , Hye-Jin Kim
CPC分类号： G11C7/22 , G11C13/00 , G11C13/0004 , G11C13/0061 , G11C13/0069 , G11C29/021 , G11C29/023 , G11C29/028 , G11C2013/0088
摘要： A non-volatile memory device includes a set pulse generator configured to generate a set pulse, a reset pulse generator configured to generate a reset pulse based on the set pulse, and a write driver block configured to write second data to a second non-volatile memory cell using the reset pulse, while writing first data to a first non-volatile memory cell using the set pulse.
摘要翻译： 非易失性存储器件包括被配置为产生置位脉冲的置位脉冲发生器，被配置为基于所设置的脉冲产生复位脉冲的复位脉冲发生器，以及被配置为将第二数据写入第二非易失性的写入驱动器块 使用复位脉冲的存储单元，同时使用设定脉冲将第一数据写入第一非易失性存储单元。
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公开(公告)号：US07881145B2
公开(公告)日：2011-02-01
申请号：US12453872
申请日：2009-05-26
申请人： Kwang Jin Lee , Joon Min Park , Hye-Jin Kim
发明人： Kwang Jin Lee , Joon Min Park , Hye-Jin Kim
IPC分类号： G11C8/00
CPC分类号： G11C13/0069 , G11C7/22 , G11C8/12 , G11C13/0004 , G11C2013/0076 , G11C2207/2209
摘要： A semiconductor device according to example embodiments may be configured so that, when a read command for performing a read operation is input while a write operation is performed, and when a memory bank accessed by a write address during the write operation is the same as a memory bank accessed by a read address during the read operation, the semiconductor device may suspend the write operation automatically or in response to an internal signal until the read operation is finished and performs the write operation after the read operation is finished.
摘要翻译： 根据示例实施例的半导体器件可以被配置为使得当执行写入操作时输入用于执行读取操作的读取命令，并且当在写入操作期间由写入地址访问的存储体组与 存储体在读取操作期间由读取地址访问，半导体器件可以自动暂停写入操作或响应于内部信号直到读取操作完成，并且在读取操作完成之后执行写入操作。
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公开(公告)号：US08588010B2
公开(公告)日：2013-11-19
申请号：US12929349
申请日：2011-01-18
申请人： Kwang Jin Lee , Du Eung Kim , Hye Jin Kim
发明人： Kwang Jin Lee , Du Eung Kim , Hye Jin Kim
IPC分类号： G11C7/22
CPC分类号： G11C13/0064 , G11C7/1078 , G11C7/1096 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C11/56 , G11C11/5628 , G11C11/5678 , G11C13/0004 , G11C13/0061 , G11C13/0069 , G11C15/00 , G11C2013/0078 , G11C2211/5621 , G11C2211/5642 , G11C2211/5643
摘要： At least one embodiment includes a non-volatile memory cell array, a write buffer configured to store data being written into the non-volatile memory cell array, and a write unit configured to write data into the non-volatile memory cell array. The write unit is configured to perform writing of data such that each data will have reached a stable storage state in the non-volatile memory prior to being over-written in the write buffer.
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公开(公告)号：US08189422B2
公开(公告)日：2012-05-29
申请号：US12929123
申请日：2011-01-03
申请人： Kwang Jin Lee , Joon Min Park , Hye-Jin Kim
发明人： Kwang Jin Lee , Joon Min Park , Hye-Jin Kim
IPC分类号： G11C8/00
CPC分类号： G11C13/0069 , G11C7/22 , G11C8/12 , G11C13/0004 , G11C2013/0076 , G11C2207/2209
摘要： A semiconductor device according to example embodiments may be configured so that, when a read command for performing a read operation is input while a write operation is performed, and when a memory bank accessed by a write address during the write operation is the same as a memory bank accessed by a read address during the read operation, the semiconductor device may suspend the write operation automatically or in response to an internal signal until the read operation is finished and performs the write operation after the read operation is finished.
摘要翻译： 根据示例实施例的半导体器件可以被配置为使得当执行写入操作时输入用于执行读取操作的读取命令，并且当在写入操作期间由写入地址访问的存储体组与 存储体在读取操作期间由读取地址访问，半导体器件可以自动暂停写入操作或响应于内部信号直到读取操作完成，并且在读取操作完成之后执行写入操作。
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公开(公告)号：US20110110172A1
公开(公告)日：2011-05-12
申请号：US12929349
申请日：2011-01-18
申请人： Kwang Jin Lee , Du Eung Kim , Hye Jin Kim
发明人： Kwang Jin Lee , Du Eung Kim , Hye Jin Kim
CPC分类号： G11C13/0064 , G11C7/1078 , G11C7/1096 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C11/56 , G11C11/5628 , G11C11/5678 , G11C13/0004 , G11C13/0061 , G11C13/0069 , G11C15/00 , G11C2013/0078 , G11C2211/5621 , G11C2211/5642 , G11C2211/5643
摘要： At least one embodiment includes a non-volatile memory cell array, a write buffer configured to store data being written into the non-volatile memory cell array, and a write unit configured to write data into the non-volatile memory cell array. The write unit is configured to perform writing of data such that each data will have reached a stable storage state in the non-volatile memory prior to being over-written in the write buffer.
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7.发明申请Semiconductor device having resistance based memory array, method of reading and writing, and systems associated therewith 有权具有基于电阻的存储器阵列，读取和写入方法以及与其相关联的系统的半导体器件公开(公告)号：US20090141549A1
公开(公告)日：2009-06-04
申请号：US12292890
申请日：2008-11-28
申请人： Kwang Jin Lee , Du Eung Kim , Hye Jin Kim
发明人： Kwang Jin Lee , Du Eung Kim , Hye Jin Kim
CPC分类号： G11C13/0064 , G11C7/1078 , G11C7/1096 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C11/56 , G11C11/5628 , G11C11/5678 , G11C13/0004 , G11C13/0061 , G11C13/0069 , G11C15/00 , G11C2013/0078 , G11C2211/5621 , G11C2211/5642 , G11C2211/5643
摘要： At least one embodiment includes a non-volatile memory cell array, a write buffer configured to store data being written into the non-volatile memory cell array, and a write unit configured to write data into the non-volatile memory cell array. The write unit is configured to perform writing of data such that each data will have reached a stable storage state in the non-volatile memory prior to being over-written in the write buffer.
摘要翻译： 至少一个实施例包括非易失性存储单元阵列，被配置为存储被写入非易失性存储单元阵列的数据的写入缓冲器以及被配置为将数据写入到非易失性存储单元阵列中的写入单元。 写单元被配置为执行数据的写入，使得在被写入缓冲器之前，每个数据将在非易失性存储器中已经达到稳定的存储状态。
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公开(公告)号：US20110096611A1
公开(公告)日：2011-04-28
申请号：US12929123
申请日：2011-01-03
申请人： Kwang Jin Lee , Joon Min Park , Hye-Jin Kim
发明人： Kwang Jin Lee , Joon Min Park , Hye-Jin Kim
IPC分类号： G11C7/00
CPC分类号： G11C13/0069 , G11C7/22 , G11C8/12 , G11C13/0004 , G11C2013/0076 , G11C2207/2209
摘要： A semiconductor device according to example embodiments may be configured so that, when a read command for performing a read operation is input while a write operation is performed, and when a memory bank accessed by a write address during the write operation is the same as a memory bank accessed by a read address during the read operation, the semiconductor device may suspend the write operation automatically or in response to an internal signal until the read operation is finished and performs the write operation after the read operation is finished.
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9.发明授权Semiconductor device having resistance based memory array, method of reading and writing, and systems associated therewith 有权具有基于电阻的存储器阵列，读取和写入方法以及与其相关联的系统的半导体器件公开(公告)号：US07894277B2
公开(公告)日：2011-02-22
申请号：US12292890
申请日：2008-11-28
申请人： Kwang Jin Lee , Du Eung Kim , Hye Jin Kim
发明人： Kwang Jin Lee , Du Eung Kim , Hye Jin Kim
IPC分类号： G11C7/00
CPC分类号： G11C13/0064 , G11C7/1078 , G11C7/1096 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C11/56 , G11C11/5628 , G11C11/5678 , G11C13/0004 , G11C13/0061 , G11C13/0069 , G11C15/00 , G11C2013/0078 , G11C2211/5621 , G11C2211/5642 , G11C2211/5643
摘要： At least one embodiment includes a non-volatile memory cell array, a write buffer configured to store data being written into the non-volatile memory cell array, and a write unit configured to write data into the non-volatile memory cell array. The write unit is configured to perform writing of data such that each data will have reached a stable storage state in the non-volatile memory prior to being over-written in the write buffer.
摘要翻译： 至少一个实施例包括非易失性存储单元阵列，被配置为存储被写入非易失性存储单元阵列的数据的写入缓冲器以及被配置为将数据写入到非易失性存储单元阵列中的写入单元。 写单元被配置为执行数据的写入，使得在被写入缓冲器之前，每个数据将在非易失性存储器中已经达到稳定的存储状态。
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公开(公告)号：US20090303807A1
公开(公告)日：2009-12-10
申请号：US12453872
申请日：2009-05-26
申请人： Kwang Jin Lee , Joon Min Park , Hye-Jin Kim
发明人： Kwang Jin Lee , Joon Min Park , Hye-Jin Kim
CPC分类号： G11C13/0069 , G11C7/22 , G11C8/12 , G11C13/0004 , G11C2013/0076 , G11C2207/2209
摘要： A semiconductor device according to example embodiments may be configured so that, when a read command for performing a read operation is input while a write operation is performed, and when a memory bank accessed by a write address during the write operation is the same as a memory bank accessed by a read address during the read operation, the semiconductor device may suspend the write operation automatically or in response to an internal signal until the read operation is finished and performs the write operation after the read operation is finished.
摘要翻译： 根据示例实施例的半导体器件可以被配置为使得当执行写入操作时输入用于执行读取操作的读取命令，并且当在写入操作期间由写入地址访问的存储体组与 存储体在读取操作期间由读取地址访问，半导体器件可以自动暂停写入操作或响应于内部信号直到读取操作完成，并且在读取操作完成之后执行写入操作。
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