公开(公告)号：US06920064B2

公开(公告)日：2005-07-19

申请号：US10804584

申请日：2004-03-16

申请人： Theodore Zhu ,  Yong Lu ,  Anthony Arrott

发明人： Theodore Zhu ,  Yong Lu ,  Anthony Arrott

IPC分类号： G11C11/00 ,  G11C11/15 ,  G11C11/14

CPC分类号： G11C11/16 ,  G11C11/15

摘要： A magneto-resistive memory comprises magneto-resistive memory cells comprising two pinned magnetic layers on one side of a free magnetic layer. The pinned magnetic layers are formed with anti-parallel magnetization orientations such that a net magnetic moment of the two layers is substantially zero. The influence of pinned magnetic layers on free magnetic layer magnetization orientations is substantially eliminated, allowing for increased predictability in switching behavior and increased write selectivity of memory cells.

摘要翻译： 磁阻存储器包括在自由磁性层的一侧上包括两个固定磁性层的磁阻存储器单元。 被钉扎的磁性层形成为具有反平行磁化取向，使得两层的净磁矩基本为零。 固有磁性层对自由磁性层磁化取向的影响基本上消除了，从而增加了开关行为的可预测性和增加了存储单元的写入选择性。

公开(公告)号：US06677165B1

公开(公告)日：2004-01-13

申请号：US10393713

申请日：2003-03-20

申请人： Yong Lu ,  Theodore Zhu

发明人： Yong Lu ,  Theodore Zhu

IPC分类号： H01L218242

CPC分类号： H01L27/222 ,  H01L43/12 ,  Y10S438/951

摘要： A process that advantageously forms MRAM cells without the application of ion beam milling processes. Unlike conventional processes that rely on ion beam milling processes to remove materials from a magnetoresistive sandwich from areas other than areas that will later form MRAM cell bodies, this process forms a layer of photoresist over areas other than those areas that correspond to MRAM cell bodies. The photoresist is lifted off after the deposition of a magnetoresistive sandwich that forms the MRAM cell bodies, thereby safely removing the magnetoresistive sandwich from undesired areas while maintaining the magnetoresistive sandwich in the areas corresponding to MRAM cell bodies.

摘要翻译： 有利地形成MRAM电池而不施加离子束研磨工艺的方法。 不同于依靠离子束研磨工艺从除了稍后形成MRAM单元体的区域之外的区域从磁阻三明治去除材料的常规工艺，该工艺在除了对应于MRAM单元体的那些区域之外的区域上形成光致抗蚀剂层。 在形成MRAM单元体的磁阻三明治的沉积之后，光致抗蚀剂被剥离，从而从不期望的区域安全地去除磁阻三明治，同时在对应于MRAM单元体的区域中保持磁阻三明治。

公开(公告)号：US06178111B1

公开(公告)日：2001-01-23

申请号：US09455850

申请日：1999-12-07

申请人： Jeffrey Scott Sather ,  Theodore Zhu ,  Yong Lu

发明人： Jeffrey Scott Sather ,  Theodore Zhu ,  Yong Lu

IPC分类号： G11C1100

CPC分类号： G11C11/15

摘要： Disclosed are apparatus and methods for efficiently writing states to one or more magneto-resistive elements. In one embodiment, current switches are provided for directing a write current through a number of write lines to control the write state of the magneto-resistive elements. In another embodiment, a sense current is selectively controlled to control which magneto-resistive elements are written to a particular state. In both embodiments, a latching element may be used to sense the state of the magneto-resistive elements, and may assume a corresponding logic state.

摘要翻译： 公开了用于有效地将状态写入一个或多个磁阻元件的装置和方法。 在一个实施例中，提供电流开关用于引导写入电流通过多个写入线以控制磁阻元件的写入状态。 在另一个实施例中，选择性地控制感测电流以控制将哪个磁阻元件写入特定状态。 在两个实施例中，锁存元件可用于感测磁阻元件的状态，并且可以采取相应的逻辑状态。

公开(公告)号：US06872997B2

公开(公告)日：2005-03-29

申请号：US10765546

申请日：2004-01-26

申请人： Harry Liu ,  William Larson ,  Lonny Berg ,  Theodore Zhu ,  Shaoping Li ,  Romney R. Katti ,  Yong Lu ,  Anthony Arrott

发明人： Harry Liu ,  William Larson ,  Lonny Berg ,  Theodore Zhu ,  Shaoping Li ,  Romney R. Katti ,  Yong Lu ,  Anthony Arrott

IPC分类号： H01L27/105 ,  G11C11/15 ,  H01L21/8246 ,  H01L43/08 ,  H01L43/12 ,  H01L31/119

CPC分类号： H01L43/12 ,  G11C11/15 ,  H01L43/08

摘要： A magnetic bit structure for a magneto-resistive memory is disclosed that has bit ends that are sufficiently large to accommodate a minimum size contact or via hole. By providing such an arrangement, the magnetic bit structure may be fabricated using conventional contact and/or via processing steps. As such, the cost of manufacturing the device may be reduced, and the overall achievable yield may be increased.

摘要翻译： 公开了一种用于磁阻存储器的磁头结构，其具有足够大的位端以适应最小尺寸的接触或通孔。 通过提供这种布置，可以使用常规的接触和/或通孔处理步骤来制造磁头结构。 因此，可以降低制造装置的成本，并且可以提高总体可实现的产量。

公开(公告)号：US06862700B2

公开(公告)日：2005-03-01

申请号：US10685297

申请日：2003-10-14

申请人： Theodore Zhu ,  Gary Kirchner ,  Richard W. Swanson ,  Yong Lu

发明人： Theodore Zhu ,  Gary Kirchner ,  Richard W. Swanson ,  Yong Lu

IPC分类号： G11C29/00

CPC分类号： G11C29/808 ,  G11C29/846

摘要： A redundancy scheme for a memory is disclosed that is programmable both before and after the memory device is packaged and/or installed in a system. This is preferably accomplished by using programmable non-volatile memory elements to control the replacement circuitry. Because the programmable memory elements are non-volatile, the desired replacement configuration is not lost during shipping, or if power is lost in a system. By allowing post-packaging replacement of defective memory elements, the overall yield of the device may be improved. By allowing post system installation replacement of defective memory elements, the reliability of many systems may be improved. In addition, the disclosed redundancy scheme allows two or more defective memory elements from different rows or columns to be replaced with memory elements from a single redundant low or column. This provides added flexibility during the replacement process.

摘要翻译： 公开了一种用于存储器的冗余方案，其在存储器件被封装和/或安装在系统中之前和之后是可编程的。 这优选地通过使用可编程非易失性存储器元件来控制替换电路来实现。 由于可编程存储器元件是非易失性的，所以在运输过程中或者系统中的电源丢失时，所需的更换配置不会丢失。 通过允许更换缺陷存储元件的后期封装，可以提高器件的整体产量。 通过允许后置系统安装更换有缺陷的存储器元件，可以提高许多系统的可靠性。 此外，所公开的冗余方案允许来自不同行或列的两个或更多个有缺陷的存储器元件被来自单个冗余低或列的存储器元件替换。 这在更换过程中提供了更多的灵活性。

公开(公告)号：US06765823B1

公开(公告)日：2004-07-20

申请号：US10354251

申请日：2003-01-29

申请人： Theodore Zhu ,  Yong Lu ,  Anthony Arrott ,  Joel Drewes

发明人： Theodore Zhu ,  Yong Lu ,  Anthony Arrott ,  Joel Drewes

IPC分类号： G11C1115

CPC分类号： H01L43/08 ,  G11C11/15 ,  G11C11/16 ,  H01L27/222

摘要： A magneto-resistive memory comprising magneto-resistive memory cells is disclosed, comprising a pinned magnetic layer and a free magnetic layer. The two magnetic layers are formed having widened regions at the ends of the layers. As such, the shape made out by the magneto-resistive memory, from a top-view perspective, is wide at the ends and narrower at the mid-, forming an I shape in one preferred embodiment. The end portions of the free magnetic layer are allowed to magnetically couple to the end portions of the pinned magnetic layer such that magnetic coupling is shifted to these widened regions and coupling in the mid-portion between the widened regions is minimized. Thus, the influence of the pinned magnetic layer on the magnetization orientation of the mid-portion of the free magnetic layer is substantially eliminated, allowing for increased predictability in switching behavior and increased write selectivity of memory cells.

摘要翻译： 公开了一种包括磁阻存储器单元的磁阻存储器，包括固定磁性层和自由磁性层。 两个磁性层在层的端部形成有加宽区域。 因此，从顶视角看，由磁阻存储器形成的形状在端部宽，在中间较窄，在一个优选实施例中形成I形。 允许自由磁性层的端部磁耦合到被钉扎的磁性层的端部，使得磁耦合转移到这些加宽的区域，并且在加宽区域之间的中间部分处的耦合被最小化。 因此，钉扎磁性层对自由磁性层的中间部分的磁化取向的影响基本上被消除，从而允许提高存储器单元的开关行为的可预测性和增加的写入选择性。

公开(公告)号：US07328379B2

公开(公告)日：2008-02-05

申请号：US11067326

申请日：2005-02-25

申请人： Theodore Zhu ,  Gary Kirchner ,  Richard W. Swanson ,  Yong Lu

发明人： Theodore Zhu ,  Gary Kirchner ,  Richard W. Swanson ,  Yong Lu

IPC分类号： G11C29/00

CPC分类号： G11C29/808 ,  G11C29/846

摘要： A redundancy scheme for a memory is disclosed that is programmable both before and after the memory device is packaged and/or installed in a system. This is preferably accomplished by using programmable non-volatile memory elements to control the replacement circuitry. Because the programmable memory elements are non-volatile, the desired replacement configuration is not lost during shipping, or if power is lost in a system. By allowing post-packaging replacement of defective memory elements, the overall yield of the device may be improved. By allowing post system installation replacement of defective memory elements, the reliability of many systems may be improved. In addition, the disclosed redundancy scheme allows two or more defective memory elements from different rows or columns to be replaced with memory elements from a single redundant low or column. This provides added flexibility during the replacement process.

摘要翻译： 公开了一种用于存储器的冗余方案，其在存储器件被封装和/或安装在系统中之前和之后是可编程的。 这优选地通过使用可编程非易失性存储器元件来控制替换电路来实现。 由于可编程存储器元件是非易失性的，所以在运输过程中或者系统中的电源丢失时，所需的更换配置不会丢失。 通过允许更换缺陷存储元件的后期封装，可以提高器件的整体产量。 通过允许后置系统安装更换有缺陷的存储器元件，可以提高许多系统的可靠性。 此外，所公开的冗余方案允许来自不同行或列的两个或更多个有缺陷的存储器元件被来自单个冗余行或列的存储器元件替换。 这在更换过程中提供了更多的灵活性。

公开(公告)号：US07029923B2

公开(公告)日：2006-04-18

申请号：US10734663

申请日：2003-12-11

申请人： Harry Liu ,  William Larson ,  Lonny Berg ,  Theodore Zhu ,  Shaoping Li ,  Romney R. Katti ,  Yong Lu ,  Anthony Arrott

发明人： Harry Liu ,  William Larson ,  Lonny Berg ,  Theodore Zhu ,  Shaoping Li ,  Romney R. Katti ,  Yong Lu ,  Anthony Arrott

IPC分类号： H01L21/00

CPC分类号： H01L43/12 ,  G11C11/15 ,  H01L43/08

摘要： A magnetic bit structure for a magneto-resistive memory is disclosed that has bit ends that are sufficiently large to accommodate a minimum size contact or via hole. By providing such an arrangement, the magnetic bit structure may be fabricated using conventional contact and/or via processing steps. As such, the cost of manufacturing the device may be reduced, and the overall achievable yield may be increased.

摘要翻译： 公开了一种用于磁阻存储器的磁头结构，其具有足够大的位端以适应最小尺寸的接触或通孔。 通过提供这种布置，可以使用常规的接触和/或通孔处理步骤来制造磁头结构。 因此，可以降低制造装置的成本，并且可以提高总体可实现的产量。

公开(公告)号：US06992918B2

公开(公告)日：2006-01-31

申请号：US10614709

申请日：2003-07-07

申请人： Shaoping Li ,  Theodore Zhu ,  Anthony S. Arrott ,  Harry Liu ,  William L. Larson ,  Yong Lu

发明人： Shaoping Li ,  Theodore Zhu ,  Anthony S. Arrott ,  Harry Liu ,  William L. Larson ,  Yong Lu

IPC分类号： G11C11/00

CPC分类号： G11C11/16 ,  G11C11/15 ,  H01L27/222

摘要： MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field component from the digital line current that extends along the major axis of the magneto-resistive bits.

公开(公告)号：US06765820B2

公开(公告)日：2004-07-20

申请号：US10352278

申请日：2003-01-27

申请人： Yong Lu ,  Theodore Zhu ,  Romney R. Katti

发明人： Yong Lu ,  Theodore Zhu ,  Romney R. Katti

IPC分类号： G11C1100

CPC分类号： G11C11/5607 ,  G11C7/06 ,  G11C11/15

摘要： A low power, high speed magneto-resistive memory is disclosed. The disclosed memory directly senses the resistive state of one or more magneto-resistive memory elements. This allows the memory to be read during a single read cycle, without the need for a word line current. This may substantially increase the speed and reduce the power of the memory.

摘要翻译： 公开了一种低功率高速磁阻存储器。 所公开的存储器直接感测一个或多个磁阻存储元件的电阻状态。 这允许在单个读取周期期间读取存储器，而不需要字线电流。 这可能会显着增加速度并降低存储器的功率。