Abnormal Condition Detection Circuit, Integrated Circuit Card Having the Circuit, and Method of Operating CPU
    2.
    发明申请
    Abnormal Condition Detection Circuit, Integrated Circuit Card Having the Circuit, and Method of Operating CPU 审中-公开
    异常状态检测电路,具有电路的集成电路卡,以及操作CPU的方法

    公开(公告)号:US20090218406A1

    公开(公告)日:2009-09-03

    申请号:US12394245

    申请日:2009-02-27

    申请人: Ji-Hoon Jeong

    发明人: Ji-Hoon Jeong

    IPC分类号: G06K19/00

    摘要: An abnormal condition detection circuit, an integrated circuit (IC) card having a central processing unit (CPU), and a method of operating the CPU, allow the CPU to be reset when an abnormal condition is detected in the IC card. The IC card includes the CPU, a non-volatile memory, an abnormal condition detection circuit, and a reset signal generator. The IC card includes detectors that detect a corresponding abnormal condition in the IC card, and an enable signal generation circuit that generates a reset enable signal and an interrupt enable signal in response to an interrupt control signal and a detection signal output from at least one of the detectors. The reset signal generator generates a reset signal in response to the reset enable signal. The CPU is reset in response to the reset signal and interrupted in response to the interrupt enable signal.

    摘要翻译: 具有中央处理单元(CPU)的异常状态检测电路,集成电路(IC)卡和CPU的操作方法允许在IC卡中检测到异常情况时CPU复位。 IC卡包括CPU,非易失性存储器,异常状态检测电路和复位信号发生器。 IC卡包括检测IC卡中的相应异常状况的检测器,以及响应于中断控制信号和从至少一个以上的输出的检测信号产生复位使能信号和中断使能信号的使能信号生成电路 探测器。 复位信号发生器响应于复位使能信号产生复位信号。 CPU根据复位信号复位并响应于中断使能信号中断。

    Abnormal condition detection circuit, integrated circuit card having the circuit, and method of operating CPU
    3.
    发明申请
    Abnormal condition detection circuit, integrated circuit card having the circuit, and method of operating CPU 有权
    异常状态检测电路,具有该电路的集成电路卡,以及CPU的操作方法

    公开(公告)号:US20070018003A1

    公开(公告)日:2007-01-25

    申请号:US11341176

    申请日:2006-01-27

    申请人: Ji-Hoon Jeong

    发明人: Ji-Hoon Jeong

    IPC分类号: G06K19/06

    摘要: An abnormal condition detection circuit, an integrated circuit (IC) card having a central processing unit (CPU), and a method of operating the CPU, allow the CPU to be reset when an abnormal condition is detected in the IC card. The IC card includes the CPU, a non-volatile memory, an abnormal condition detection circuit, and a reset signal generator. The IC card includes detectors that detect a corresponding abnormal condition in the IC card, and an enable signal generation circuit that generates a reset enable signal and an interrupt enable signal in response to an interrupt control signal and a detection signal output from at least one of the detectors. The reset signal generator generates a reset signal in response to the reset enable signal. The CPU is reset in response to the reset signal and interrupted in response to the interrupt enable signal.

    摘要翻译: 具有中央处理单元(CPU)的异常状态检测电路,集成电路(IC)卡和CPU的操作方法允许在IC卡中检测到异常情况时CPU复位。 IC卡包括CPU,非易失性存储器,异常状态检测电路和复位信号发生器。 IC卡包括检测IC卡中的相应异常状况的检测器,以及响应于中断控制信号和从至少一个以上的输出的检测信号产生复位使能信号和中断使能信号的使能信号生成电路 探测器。 复位信号发生器响应于复位使能信号产生复位信号。 CPU根据复位信号复位并响应于中断使能信号中断。

    Abnormal condition detection circuit, integrated circuit card having the circuit, and method of operating CPU
    4.
    发明授权
    Abnormal condition detection circuit, integrated circuit card having the circuit, and method of operating CPU 有权
    异常状态检测电路,具有该电路的集成电路卡,以及CPU的操作方法

    公开(公告)号:US07503501B2

    公开(公告)日:2009-03-17

    申请号:US11341176

    申请日:2006-01-27

    申请人: Ji-Hoon Jeong

    发明人: Ji-Hoon Jeong

    IPC分类号: G06K19/00

    摘要: An abnormal condition detection circuit, an integrated circuit (IC) card having a central processing unit (CPU), and a method of operating the CPU, allow the CPU to be reset when an abnormal condition is detected in the IC card. The IC card includes the CPU, a non-volatile memory, an abnormal condition detection circuit, and a reset signal generator. The IC card includes detectors that detect a corresponding abnormal condition in the IC card, and an enable signal generation circuit that generates a reset enable signal and an interrupt enable signal in response to an interrupt control signal and a detection signal output from at least one of the detectors. The reset signal generator generates a reset signal in response to the reset enable signal. The CPU is reset in response to the reset signal and interrupted in response to the interrupt enable signal.

    摘要翻译: 具有中央处理单元(CPU)的异常状态检测电路,集成电路(IC)卡和CPU的操作方法允许在IC卡中检测到异常情况时CPU复位。 IC卡包括CPU,非易失性存储器,异常状态检测电路和复位信号发生器。 IC卡包括检测IC卡中的相应异常状况的检测器,以及响应于中断控制信号和从至少一个以上的输出的检测信号产生复位使能信号和中断允许信号的使能信号生成电路 探测器。 复位信号发生器响应于复位使能信号产生复位信号。 CPU根据复位信号复位并响应于中断使能信号中断。