公开(公告)号：US08390133B2

公开(公告)日：2013-03-05

申请号：US13534078

申请日：2012-06-27

申请人： Yoshihiko Shimanuki ,  Yoshihiro Suzuki ,  Koji Tsuchiya

发明人： Yoshihiko Shimanuki ,  Yoshihiro Suzuki ,  Koji Tsuchiya

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/97 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： There are constituted by a tab on which a semiconductor chip is mounted, a sealing portion formed by resin-sealing the semiconductor chip, a plurality of leads each having a mounted surface exposed to a peripheral portion of a rear surface of the sealing portion and a sealing-portion forming surface disposed on an opposite side thereto, and a wire for connecting a pad of the semiconductor chip and a lead, wherein the length between inner ends of the sealing-portion forming surfaces of the leads disposed so as to oppose to each other is formed to be larger than the length between inner ends of the mounted surfaces. Thereby, a chip mounting region surrounded by the inner end of the sealing-portion forming surface of each lead can be expanded and the size of the mountable chip is increased.

摘要翻译： 由安装半导体芯片的突片，通过树脂密封半导体芯片形成的密封部分，多个引线，每个引线具有暴露于密封部分的后表面的周边部分的安装表面，以及 密封部分形成表面设置在其相对侧上，以及导线，用于连接半导体芯片的焊盘和引线，其中引线的密封部分形成表面的内端之间的长度设置为与每个 另一个形成为大于安装表面的内端之间的长度。 由此，能够扩大由各引线的密封部形成面的内端包围的芯片安装区域，能够增大安装芯片的尺寸。

公开(公告)号：US08222720B2

公开(公告)日：2012-07-17

申请号：US12953499

申请日：2010-11-24

申请人： Yoshihiko Shimanuki ,  Yoshihiro Suzuki ,  Koji Tsuchiya

发明人： Yoshihiko Shimanuki ,  Yoshihiro Suzuki ,  Koji Tsuchiya

IPC分类号： H01L23/495

CPC分类号： H01L24/97 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： There are constituted by a tab (1b) on which a semiconductor chip (2) is mounted, a sealing portion (3) formed by resin-sealing the semiconductor chip (2), a plurality of leads (1a) each having a mounted surface (1d) exposed to a peripheral portion of a rear surface (3a) of the sealing portion (3) and a sealing-portion forming surface (1g) disposed on an opposite side thereto, and a wire (4) for connecting a pad (2a) of the semiconductor chip (2) and a lead (1a), wherein the length (M) between inner ends (1h) of the sealing-portion forming surfaces (1g) of the leads (1a) disposed so as to oppose to each other is formed to be larger than the length (L) between inner ends (1h) of the mounted surfaces (1d). Thereby, a chip mounting region surrounded by the inner end (1h) of the sealing-portion forming surface (1g) of each lead (1a) can be expanded and the size of the mountable chip is increased.

摘要翻译： 由安装有半导体芯片（2）的突片（1b），通过树脂密封半导体芯片（2）形成的密封部分（3），多个引线（1a），其具有安装表面 （1d）暴露于密封部分（3）的后表面（3a）的周边部分和设置在其相对侧上的密封部分形成表面（1g）和用于连接焊盘（4）的焊丝（4） 2a）和引线（1a）之间的长度（M），其中引线（1a）的密封部分形成表面（1g）的内端（1h）之间的长度（M）设置为与 彼此形成为大于安装面（1d）的内端（1h）之间的长度（L）。 由此，可以扩大由每个引线（1a）的密封部形成面（1g）的内端（1h）包围的芯片安装区域，并且可安装芯片的尺寸增大。

公开(公告)号：US20110089548A1

公开(公告)日：2011-04-21

申请号：US12953499

申请日：2010-11-24

申请人： YOSHIHIKO SHIMANUKI ,  Yoshihiro Suzuki ,  Koji Tsuchiya

发明人： YOSHIHIKO SHIMANUKI ,  Yoshihiro Suzuki ,  Koji Tsuchiya

IPC分类号： H01L23/495

CPC分类号： H01L24/97 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： There are constituted by a tab (1b) on which a semiconductor chip (2) is mounted, a sealing portion (3) formed by resin-sealing the semiconductor chip (2), a plurality of leads (1a) each having a mounted surface (1d) exposed to a peripheral portion of a rear surface (3a) of the sealing portion (3) and a sealing-portion forming surface (1g) disposed on an opposite side thereto, and a wire (4) for connecting a pad (2a) of the semiconductor chip (2) and a lead (1a), wherein the length (M) between inner ends (1h) of the sealing-portion forming surfaces (1g) of the leads (1a) disposed so as to oppose to each other is formed to be larger than the length (L) between inner ends (1h) of the mounted surfaces (1d). Thereby, a chip mounting region surrounded by the inner end (1h) of the sealing-portion forming surface (1g) of each lead (1a) can be expanded and the size of the mountable chip is increased.

摘要翻译： 由安装有半导体芯片（2）的突片（1b），通过树脂密封半导体芯片（2）形成的密封部分（3），多个引线（1a），其具有安装表面 （1d）暴露于密封部分（3）的后表面（3a）的周边部分和设置在其相对侧上的密封部分形成表面（1g）和用于连接焊盘（4）的焊丝（4） 2a）和引线（1a）之间的长度（M），其中引线（1a）的密封部分形成表面（1g）的内端（1h）之间的长度（M）设置为与 彼此形成为大于安装面（1d）的内端（1h）之间的长度（L）。 由此，可以扩大由每个引线（1a）的密封部形成面（1g）的内端（1h）包围的芯片安装区域，并且可安装芯片的尺寸增大。

公开(公告)号：US07843049B2

公开(公告)日：2010-11-30

申请号：US12408890

申请日：2009-03-23

申请人： Yoshihiko Shimanuki ,  Yoshihiro Suzuki ,  Koji Tsuchiya

发明人： Yoshihiko Shimanuki ,  Yoshihiro Suzuki ,  Koji Tsuchiya

IPC分类号： H01L23/02

CPC分类号： H01L24/97 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： There are constituted by a tab (1b) on which a semiconductor chip (2) is mounted, a sealing portion (3) formed by resin-sealing the semiconductor chip (2), a plurality of leads (1a) each having a mounted surface (1d) exposed to a peripheral portion of a rear surface (3a) of the sealing portion (3) and a sealing-portion forming surface (1g) disposed on an opposite side thereto, and a wire (4) for connecting a pad (2a) of the semiconductor chip (2) and a lead (1a), wherein the length (M) between inner ends (1h) of the sealing-portion forming surfaces (1g) of the leads (1a) disposed so as to oppose to each other is formed to be larger than the length (L) between inner ends (1h) of the mounted surfaces (1d). Thereby, a chip mounting region surrounded by the inner end (1h) of the sealing-portion forming surface (1g) of each lead (1a) can be expanded and the size of the mountable chip is increased.

摘要翻译： 由安装有半导体芯片（2）的突片（1b），通过树脂密封半导体芯片（2）形成的密封部分（3），多个引线（1a），其具有安装表面 （1d）暴露于密封部分（3）的后表面（3a）的周边部分和设置在其相对侧上的密封部分形成表面（1g）和用于连接焊盘（4）的焊丝（4） 2a）和引线（1a）之间的长度（M），其中引线（1a）的密封部分形成表面（1g）的内端（1h）之间的长度（M）设置为与 彼此形成为大于安装面（1d）的内端（1h）之间的长度（L）。 由此，可以扩大由每个引线（1a）的密封部形成面（1g）的内端（1h）包围的芯片安装区域，并且可安装芯片的尺寸增大。

公开(公告)号：US20130001804A1

公开(公告)日：2013-01-03

申请号：US13534078

申请日：2012-06-27

申请人： YOSHIHIKO SHIMANUKI ,  Yoshihiro Suzuki ,  Koji Tsuchiya

发明人： YOSHIHIKO SHIMANUKI ,  Yoshihiro Suzuki ,  Koji Tsuchiya

IPC分类号： H01L23/48

CPC分类号： H01L24/97 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： There are constituted by a tab on which a semiconductor chip is mounted, a sealing portion formed by resin-sealing the semiconductor chip, a plurality of leads each having a mounted surface exposed to a peripheral portion of a rear surface of the sealing portion and a sealing-portion forming surface disposed on an opposite side thereto, and a wire for connecting a pad of the semiconductor chip and a lead, wherein the length between inner ends of the sealing-portion forming surfaces of the leads disposed so as to oppose to each other is formed to be larger than the length between inner ends of the mounted surfaces. Thereby, a chip mounting region surrounded by the inner end of the sealing-portion forming surface of each lead can be expanded and the size of the mountable chip is increased.

摘要翻译： 由安装半导体芯片的突片，通过树脂密封半导体芯片形成的密封部分，多个引线，每个引线具有暴露于密封部分的后表面的周边部分的安装表面，以及 密封部分形成表面设置在其相对侧上，以及导线，用于连接半导体芯片的焊盘和引线，其中引线的密封部分形成表面的内端之间的长度设置为与每个 另一个形成为大于安装表面的内端之间的长度。 由此，能够扩大由各引线的密封部形成面的内端包围的芯片安装区域，能够增大安装芯片的尺寸。

公开(公告)号：US07525184B2

公开(公告)日：2009-04-28

申请号：US10519785

申请日：2003-05-30

申请人： Yoshihiko Shimanuki ,  Yoshihiro Suzuki ,  Koji Tsuchiya

发明人： Yoshihiko Shimanuki ,  Yoshihiro Suzuki ,  Koji Tsuchiya

IPC分类号： H01L21/00 ,  H01L23/02

CPC分类号： H01L24/97 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： There are constituted by a tab (1b) on which a semiconductor chip (2) is mounted, a sealing portion (3) formed by resin-sealing the semiconductor chip (2), a plurality of leads (1a) each having a mounted surface (1d) exposed to a peripheral portion of a rear surface (3a) of the sealing portion (3) and a sealing-portion forming surface (1g) disposed on an opposite side thereto, and a wire (4) for connecting a pad (2a) of the semiconductor chip (2) and a lead (1a), wherein the length (M) between inner ends (1h) of the sealing-portion forming surfaces (1g) of the leads (1a) disposed so as to oppose to each other is formed to be larger than the length (L) between inner ends (1h) of the mounted surfaces (1d). Thereby, a chip mounting region surrounded by the inner end (1h) of the sealing-portion forming surface (1g) of each lead (1a) can be expanded and the size of the mountable chip is increased.

摘要翻译： 由安装有半导体芯片（2）的突片（1b），通过树脂密封半导体芯片（2）形成的密封部分（3），多个引线（1a），其具有安装表面 （1d）暴露于密封部分（3）的后表面（3a）的周边部分和设置在其相对侧上的密封部分形成表面（1g）和用于连接焊盘（4）的焊丝（4） 2a）和引线（1a）之间的长度（M），其中引线（1a）的密封部分形成表面（1g）的内端（1h）之间的长度（M）设置为与 彼此形成为大于安装面（1d）的内端（1h）之间的长度（L）。 由此，可以扩大由每个引线（1a）的密封部形成面（1g）的内端（1h）包围的芯片安装区域，并且可安装芯片的尺寸增大。

公开(公告)号：US20060017143A1

公开(公告)日：2006-01-26

申请号：US10519785

申请日：2003-05-30

申请人： Yoshihiko Shimanuki ,  Yoshihiro Suzuki ,  Koji Tsuchiya

发明人： Yoshihiko Shimanuki ,  Yoshihiro Suzuki ,  Koji Tsuchiya

IPC分类号： H01L23/02

CPC分类号： H01L24/97 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： There are constituted by a tab (1b) on which a semiconductor chip (2) is mounted, a sealing portion (3) formed by resin-sealing the semiconductor chip (2), a plurality of leads (1a) each having a mounted surface (1d) exposed to a peripheral portion of a rear surface (3a) of the sealing portion (3) and a sealing-portion forming surface (1g) disposed on an opposite side thereto, and a wire (4) for connecting a pad (2a) of the semiconductor chip (2) and a lead (1a), wherein the length (M) between inner ends (1h) of the sealing-portion forming surfaces (1g) of the leads (1a) disposed so as to oppose to each other is formed to be larger than the length (L) between inner ends (1h) of the mounted surfaces (1d). Thereby, a chip mounting region surrounded by the inner end (1h) of the sealing-portion forming surface (1g) of each lead (1a) can be expanded and the size of the mountable chip is increased.

摘要翻译： 由安装半导体芯片（2）的突片（1b），通过树脂密封半导体芯片（2）形成的密封部分（3）构成的多个引线（1a），每个引线 暴露于密封部分（3）的后表面（3a）的周边部分的安装表面（1d）和设置在其相对侧上的密封部分形成表面（1g）和线（4） 用于连接半导体芯片（2）的焊盘（2a）和引线（1a），其中引线的密封部分形成表面（1g）的内端（1h）之间的长度（M） （1a）形成为大于安装表面（1d）的内端（1h）之间的长度（L）。 由此，可以扩大由每个引线（1a）的密封部形成面（1g）的内端（1h）包围的芯片安装区域，并且可安装芯片的尺寸增大。

公开(公告)号：US20090200656A1

公开(公告)日：2009-08-13

申请号：US12408890

申请日：2009-03-23

申请人： Yoshihiko Shimanuki ,  Yoshihiro Suzuki ,  Koji Tsuchiya

发明人： Yoshihiko Shimanuki ,  Yoshihiro Suzuki ,  Koji Tsuchiya

IPC分类号： H01L23/498

CPC分类号： H01L24/97 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： There are constituted by a tab (1b) on which a semiconductor chip (2) is mounted, a sealing portion (3) formed by resin-sealing the semiconductor chip (2), a plurality of leads (1a) each having a mounted surface (1d) exposed to a peripheral portion of a rear surface (3a) of the sealing portion (3) and a sealing-portion forming surface (1g) disposed on an opposite side thereto, and a wire (4) for connecting a pad (2a) of the semiconductor chip (2) and a lead (1a), wherein the length (M) between inner ends (1h) of the sealing-portion forming surfaces (1g) of the leads (1a) disposed so as to oppose to each other is formed to be larger than the length (L) between inner ends (1h) of the mounted surfaces (1d). Thereby, a chip mounting region surrounded by the inner end (1h) of the sealing-portion forming surface (1g) of each lead (1a) can be expanded and the size of the mountable chip is increased.

摘要翻译： 由安装有半导体芯片（2）的突片（1b），通过树脂密封半导体芯片（2）形成的密封部分（3），多个引线（1a），其具有安装表面 （1d）暴露于密封部分（3）的后表面（3a）的周边部分和设置在其相对侧上的密封部分形成表面（1g）和用于连接焊盘（4）的焊丝（4） 2a）和引线（1a）之间的长度（M），其中引线（1a）的密封部分形成表面（1g）的内端（1h）之间的长度（M）设置为与 彼此形成为大于安装面（1d）的内端（1h）之间的长度（L）。 由此，可以扩大由每个引线（1a）的密封部形成面（1g）的内端（1h）包围的芯片安装区域，并且可安装芯片的尺寸增大。

公开(公告)号：US07339261B2

公开(公告)日：2008-03-04

申请号：US11653402

申请日：2007-01-16

申请人： Yoshihiko Shimanuki ,  Koji Tsuchiya

发明人： Yoshihiko Shimanuki ,  Koji Tsuchiya

IPC分类号： H01L23/495

CPC分类号： H01L23/3107 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49565 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device which permits reduction in the number of pins and in size thereof is provided. The semiconductor device comprises a sealing body formed of an insulating resin, the sealing body having an upper surface, a lower surface opposite to the upper surface, and side faces which connect the upper and lower surfaces with each other; an electrically conductive tab sealed within the sealing body; tab suspending leads contiguous to the tab and partially exposed to the lower surface and the side faces of the sealing body; a semiconductor chip fixed to a lower surface of the tab; a plurality of electrically conductive leads, the electrically conductive leads each having an inner end portion positioned within the sealing body, an outer end portion exposed to the lower surface and a side face of the sealing body, and a projecting portion projecting into the sealing body from a side face of each of the electrically conductive leads; a projecting portion projecting from a side face of each of the tab suspending leads and positioned within the sealing body; and electrically conductive wires positioned within the sealing body and connecting electrodes formed on a lower surface of the semiconductor chip with the projecting portions of the electrically conductive leads and the tab suspending leads.

摘要翻译： 提供了允许减少引脚数和尺寸的半导体器件。 半导体器件包括由绝缘树脂形成的密封体，密封体具有上表面，与上表面相对的下表面和将上下表面相互连接的侧面; 密封在密封体内的导电片; 突片悬挂引线邻接突片并且部分地暴露于密封体的下表面和侧面; 固定在突片的下表面的半导体芯片; 多个导电引线，所述导电引线各自具有位于所述密封体内的内端部，暴露于所述下表面的外端部和所述密封体的侧面，以及突出部，所述突出部突出到所述密封体 从每个导电引线的侧面; 突出部分，其从每个突片悬挂引线的侧面突出并定位在密封体内; 以及定位在密封体内的导电线和形成在半导体芯片的下表面上的电极与导电引线和突片悬挂引线的突出部分。

公开(公告)号：US20070108563A1

公开(公告)日：2007-05-17

申请号：US11653402

申请日：2007-01-16

申请人： Yoshihiko Shimanuki ,  Koji Tsuchiya

发明人： Yoshihiko Shimanuki ,  Koji Tsuchiya

IPC分类号： H01L23/495

CPC分类号： H01L23/3107 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49565 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device which permits reduction in the number of pins and in size thereof is provided. The semiconductor device comprises a sealing body formed of an insulating resin, the sealing body having an upper surface, a lower surface opposite to the upper surface, and side faces which connect the upper and lower surfaces with each other; an electrically conductive tab sealed within the sealing body; tab suspending leads contiguous to the tab and partially exposed to the lower surface and the side faces of the sealing body; a semiconductor chip fixed to a lower surface of the tab; a plurality of electrically conductive leads, the electrically conductive leads each having an inner end portion positioned within the sealing body, an outer end portion exposed to the lower surface and a side face of the sealing body, and a projecting portion projecting into the sealing body from a side face of each of the electrically conductive leads; a projecting portion projecting from a side face of each of the tab suspending leads and positioned within the sealing body; and electrically conductive wires positioned within the sealing body and connecting electrodes formed on a lower surface of the semiconductor chip with the projecting portions of the electrically conductive leads and the tab suspending leads.

摘要翻译： 提供了允许减少引脚数和尺寸的半导体器件。 半导体器件包括由绝缘树脂形成的密封体，密封体具有上表面，与上表面相对的下表面和将上下表面相互连接的侧面; 密封在密封体内的导电片; 突片悬挂引线邻接突片并且部分地暴露于密封体的下表面和侧面; 固定在突片的下表面的半导体芯片; 多个导电引线，所述导电引线各自具有位于所述密封体内的内端部，暴露于所述下表面的外端部和所述密封体的侧面，以及突出部，所述突出部突出到所述密封体 从每个导电引线的侧面; 突出部分，其从每个突片悬挂引线的侧面突出并定位在密封体内; 以及定位在密封体内的导电线和形成在半导体芯片的下表面上的电极与导电引线和突片悬挂引线的突出部分。