Generator assembly
    2.
    发明授权
    Generator assembly 失效
    发电机总成

    公开(公告)号:US5731687A

    公开(公告)日:1998-03-24

    申请号:US634277

    申请日:1996-04-18

    IPC分类号: F02B63/04 F02B77/13 H02K5/04

    摘要: In a generator assembly, outside air, taken from a suction hole into a fixed soundproof housing, is sucked into a portable engine generator covered by a soundproof case to operate an engine and cool the interior of the fixed soundproof housing. The exhaust gas of the engine and the cooling air of the soundproof case are exhausted outside through the exhaust air hole of the soundproof case and the external exhaust hole of the fixed soundproof housing without leaking into the fixed soundproof housing. Therefore, the portable engine generator can be operated while it remains housed within the fixed soundproof housing. The exhaust air duct of the portable engine generator and the communicating duct of the fixed soundproof housing are communicated in a state of close contact, at the time that the portable engine generator has been positioned by a positioning member provided in the fixed soundproof housing. The portable engine generator can be put into or out from the fixed soundproof housing and is guided and housed by wheel guide rails provided within the fixed soundproof housing.

    摘要翻译: 在发电机组件中,从抽吸孔取入固定隔音壳体的外部空气被吸入由隔音壳体覆盖的便携式发动机发电机中,以操作发动机并且冷却固定隔音壳体的内部。 发动机的排气和隔音箱的冷却空气通过隔音壳体的排气孔和固定隔音壳体的外部排气孔排出外部,而不会泄漏到固定隔音壳体中。 因此,便携式发动机发电机可以在其保持在固定隔音壳体内时被操作。 便携式发动机发电机的排气风道和固定隔音壳体的连通管道在通过设置在固定隔音壳体中的定位构件定位的状态下以紧密接触的状态通信。 便携式发电机可以从固定隔音壳体放入或导出,并由设在固定隔音壳体内的轮子导轨引导和收纳。

    Output circuit for portable generators
    3.
    发明授权
    Output circuit for portable generators 失效
    便携式发电机的输出电路

    公开(公告)号:US5093611A

    公开(公告)日:1992-03-03

    申请号:US554194

    申请日:1990-07-17

    IPC分类号: B23K9/10

    CPC分类号: B23K9/10 Y10T307/289

    摘要: An output circuit for a portable generator having a plurality of output windings provided separately from each other, and control winding provided separately from the output windings. A plurality of thyristor bridge circuits each having thyristors are connected respectively to the output windings. A superposing circuit superposes outputs from the thyristor bridge circuits one upon another to provide a first superposed output voltage. A rectifier circuit is connected to the control winding. The rectifier circuit is disposed such that its output voltage is superposed upon the first superposed output voltage to provide a second superposed output voltage. A control circuit is responsive to the second superposed output voltage for concurrently controlling voltages applied respectively to the gates of the thyristors of the thyristor bridge circuits to thereby maintain the first superposed output voltage at a constant value. An FET is connected to the output of the superposing circuit, and is connectible in series to an external load, for controlling supply of current flowing through the FET to the external load. A current cut-off circuit detects overcurrent in the output circuit and operable, upon detection of the overcurrent, to cause the FET to be turned off to thereby cut off the supply of current to the external load.

    摘要翻译: 一种用于便携式发电机的输出电路,具有彼此分开设置的多个输出绕组,以及与输出绕组分开设置的控制绕组。 各自具有晶闸管的多个晶闸管桥接电路分别连接到输出绕组。 叠加电路将晶闸管桥接电路的输出叠加起来以提供第一叠加输出电压。 整流电路连接到控制绕组。 整流电路被布置成使得其输出电压叠加在第一叠加输出电压上以提供第二叠加输出电压。 控制电路响应于第二重叠输出电压,以同时控制分别施加到晶闸管桥接电路的晶闸管的栅极的电压,从而将第一叠加输出电压保持在恒定值。 FET连接到叠加电路的输出端,可与外部负载串联连接,用于控制流过FET至外部负载的电流供应。 电流截止电路检测输出电路中的过电流,并且在检测到过电流时可操作,以使FET截止,从而切断对外部负载的电流供应。

    Semiconductor circuit having improved layout pattern
    6.
    发明授权
    Semiconductor circuit having improved layout pattern 失效
    具有改进布局图案的半导体电路

    公开(公告)号:US5489860A

    公开(公告)日:1996-02-06

    申请号:US138081

    申请日:1993-10-20

    IPC分类号: H01L27/118 H01L25/00

    CPC分类号: H01L27/11807

    摘要: A semiconductor circuit includes a plurality of first power supply lines which are arranged parallel to each other, a plurality of second power supply lines which are arranged parallel to each other and supplying a power supply voltage different from that supplied by the first power supply lines, where the first and second power supply lines run parallel to each other in a first direction, a first cell made up of the same number of first p-channel transistors and first n-channel transistors which are respectively coupled to the first and second power supply lines, where the first p-channel transistors and the first n-channel transistors are alternately arranged in a second direction and have the same size, and a second cell made up of a different number of second p-channel transistors and second n-channel transistors which are respectively coupled to the first and second power supply lines. The second p-channel transistors and the second n-channel transistors are alternately arranged in the second direction, and the second p-channel transistors are electrically coupled in parallel, so that the second p-channel transistors have a predetermined driving capability.

    摘要翻译: 半导体电路包括彼此平行布置的多个第一电源线,多个第二电源线,彼此并联布置并提供与由第一电源线提供的电源电压不同的电源电压, 其中第一和第二电源线在第一方向上彼此平行地延伸,由相同数量的第一p沟道晶体管和第一n沟道晶体管组成的第一单元,第一p沟道晶体管和第一n沟道晶体管分别耦合到第一和第二电源 线,其中第一p沟道晶体管和第一n沟道晶体管沿第二方向交替布置并具有相同的尺寸,以及由不同数量的第二p沟道晶体管和第二n沟道晶体管构成的第二单元 分别耦合到第一和第二电源线的晶体管。 第二p沟道晶体管和第二n沟道晶体管沿第二方向交替布置,并且第二p沟道晶体管并联电耦合,使得第二p沟道晶体管具有预定的驱动能力。

    Intelligent robust control system for motorcycle using soft computing optimizer
    9.
    发明申请
    Intelligent robust control system for motorcycle using soft computing optimizer 失效
    使用软计算优化器的摩托车智能鲁棒控制系统

    公开(公告)号:US20050197994A1

    公开(公告)日:2005-09-08

    申请号:US10792292

    申请日:2004-03-03

    CPC分类号: B62K21/00

    摘要: A Soft Computing (SC) optimizer for designing a Knowledge Base (KB) to be used in a control system for controlling a motorcycle is described. In one embodiment, a simulation model of the motorcycle and rider control is used. In one embodiment, the simulation model includes a feedforward rider model. The SC optimizer includes a fuzzy inference engine based on a Fuzzy Neural Network (FNN). The SC Optimizer provides Fuzzy Inference System (FIS) structure selection, FIS structure optimization method selection, and teaching signal selection and generation. The user selects a fuzzy model, including one or more of: the number of input and/or output variables; the type of fuzzy inference; and the preliminary type of membership functions. A Genetic Algorithm (GA) is used to optimize linguistic variable parameters and the input-output training patterns. A GA is also used to optimize the rule base, using the fuzzy model, optimal linguistic variable parameters, and a teaching signal. The GA produces a near-optimal FNN. The near-optimal FNN can be improved using classical derivative-based optimization procedures. The FIS structure found by the GA is optimized with a fitness function based on a response of the actual plant model of the controlled plant. The SC optimizer produces a robust KB that is typically smaller that the KB produced by prior art methods.

    摘要翻译: 描述了用于设计用于控制摩托车的控制系统中使用的知识库(KB)的软计算(SC)优化器。 在一个实施例中,使用摩托车和骑手控制的仿真模型。 在一个实施例中,模拟模型包括前馈骑手模型。 SC优化器包括基于模糊神经网络(FNN)的模糊推理机。 SC优化器提供模糊推理系统(FIS)结构选择,FIS结构优化方法选择和教学信号选择与生成。 用户选择模糊模型,包括以下一个或多个:输入和/或输出变量的数量; 模糊推理的类型; 和初步类型的会员职能。 遗传算法(GA)用于优化语言变量参数和输入 - 输出训练模式。 GA也用于优化规则库,使用模糊模型,最优语言变量参数和教学信号。 GA产生近乎最佳的FNN。 可以使用经典的基于导数的优化程序来改进近似最优的FNN。 GA发现的FIS结构通过基于受控植物实际植物模型的响应的适应度函数进行优化。 SC优化器产生通常比现有技术方法产生的KB更小的鲁棒KB。

    Master slice type semiconductor circuit device
    10.
    发明授权
    Master slice type semiconductor circuit device 失效
    主片式半导体电路器件

    公开(公告)号:US4780846A

    公开(公告)日:1988-10-25

    申请号:US750163

    申请日:1985-06-28

    摘要: A master slice type semiconductor circuit device including a memory block having at least one memory circuit; one conductive layer provided to peripheral portions of the memory circuit and used as an input portion thereto; power source lines provided to the peripheral portion of the memory circuit and formed by a conductive layer different from the conductive layer of the input portion; and a contact hole for connecting between the two conductive layers at a selected input portion. The selected input portion connected by the contact hole is set or clamped to a predetermined logic level by the power source line. This enables a change of the memory capacity or the function of the memory block to satisfy customer requirements.

    摘要翻译: 一种主切片型半导体电路装置,包括具有至少一个存储电路的存储块; 提供给存储电路的周边部分并用作其输入部分的一个导电层; 电源线提供到存储电路的周边部分,并由与输入部分的导电层不同的导电层形成; 以及用于在所选择的输入部分处连接两个导电层之间的接触孔。 通过接触孔连接的所选择的输入部分被电源线设置或钳位到预定的逻辑电平。 这样可以改变内存容量或内存块的功能,以满足客户的要求。