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公开(公告)号：US07956916B2
公开(公告)日：2011-06-07
申请号：US12195584
申请日：2008-08-21
IPC分类号： H04N5/335
CPC分类号： H04N5/37452 , H04N5/35581 , H04N5/3559
摘要： Provided is a solid-state imaging device having pixel units that are two-dimensionally arranged, and including: a photodiode that generates an optical signal charge corresponding to an intensity and an exposure time of light; a MOS transistor that transfers the optical signal charge; an accumulating unit that generates a voltage corresponding to the signal charge through the MOS transistor; a storing unit that stores a voltage corresponding to an optical signal charge in the accumulating unit; and a voltage setting unit that sets a value of a voltage in the accumulating unit to a value corresponding to the voltage in the storing unit.
摘要翻译： 提供一种具有二维排列的像素单元的固态成像装置，包括：产生对应于光的强度和曝光时间的光信号电荷的光电二极管; 传输光信号电荷的MOS晶体管; 累积单元，其产生对应于通过MOS晶体管的信号电荷的电压; 存储单元，其将与所述积累单元中的光信号电荷相对应的电压存储; 以及电压设定单元，其将所述累积单元中的电压值设定为与所述存储单元中的电压对应的值。
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公开(公告)号：US06618284B2
公开(公告)日：2003-09-09
申请号：US10011489
申请日：2001-12-11
IPC分类号： G11C1122
CPC分类号： G11C11/22
摘要： A semiconductor memory includes a ferroelectric capacitor having a ferroelectric film, a first electrode formed on the ferroelectric film and a second electrode formed under the ferroelectric film. A data writing unit causes a first state in which the ferroelectric film has polarization in a direction from the first electrode to the second electrode or in a direction from the second electrode to the first electrode and has a substantially saturated polarization value or a second state in which the ferroelectric film has polarization in the same direction as in the first state and has a substantially zero polarization value, thereby writing a data corresponding to the first state or the second state in the ferroelectric capacitor. A data reading unit detects whether the ferroelectric capacitor is in the first state or in the second state, thereby reading a data stored in the ferroelectric capacitor.
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3.发明授权Solid state imaging device and differential circuit having an expanded dynamic range 有权具有扩展动态范围的固态成像装置和差分电路公开(公告)号：US08866059B2
公开(公告)日：2014-10-21
申请号：US13055863
申请日：2009-07-23
IPC分类号： H01L27/00 , H01L27/146 , H04N5/235 , H04N5/355
CPC分类号： H01L27/14603 , H01L27/14643 , H01L27/14645 , H04N5/2355 , H04N5/35572 , H04N5/3559
摘要： A solid-state imaging device that is configurable into a small size appropriate for expanding dynamic range includes: a photodiode which is a photoelectric conversion unit that generates charge by incident light; a MOS transistor which is connected to the photodiode and transfers the charge; a floating diffusion region which is a first accumulation unit which accumulates the charge via the MOS transistor; a MOS transistor which is a second transfer unit connected to the floating diffusion region and connected in series to the MOS transistor; and a MOS transistor which is an output unit which outputs, via the MOS transistor, a signal voltage in accordance with an amount of the charge.
摘要翻译： 可配置为适于扩展动态范围的小尺寸的固态成像装置包括：光电二极管，其是通过入射光产生电荷的光电转换单元; 连接到光电二极管并传送电荷的MOS晶体管; 浮动扩散区域，其是通过MOS晶体管积累电荷的第一累积单元; MOS晶体管，其是与所述浮动扩散区域连接并与所述MOS晶体管串联连接的第二转移单元; 以及MOS晶体管，其是经由MOS晶体管输出根据电荷量的信号电压的输出单元。
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公开(公告)号：US20110121162A1
公开(公告)日：2011-05-26
申请号：US13055863
申请日：2009-07-23
IPC分类号： H01L27/146
CPC分类号： H01L27/14603 , H01L27/14643 , H01L27/14645 , H04N5/2355 , H04N5/35572 , H04N5/3559
摘要： A solid-state imaging device that is configurable into a small size appropriate for expanding dynamic range includes: a photodiode which is a photoelectric conversion unit that generates charge by incident light; a MOS transistor which is connected to the photodiode and transfers the charge; a floating diffusion region which is a first accumulation unit which accumulates the charge via the MOS transistor; a MOS transistor which is a second transfer unit connected to the floating diffusion region and connected in series to the MOS transistor; and a MOS transistor which is an output unit which outputs, via the MOS transistor, a signal voltage in accordance with an amount of the charge.
摘要翻译： 可配置为适于扩展动态范围的小尺寸的固态成像装置包括：光电二极管，其是通过入射光产生电荷的光电转换单元; 连接到光电二极管并传送电荷的MOS晶体管; 浮动扩散区域，其是通过MOS晶体管积累电荷的第一累积单元; MOS晶体管，其是与所述浮动扩散区域连接并与所述MOS晶体管串联连接的第二转移单元; 以及MOS晶体管，其是经由MOS晶体管输出根据电荷量的信号电压的输出单元。
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公开(公告)号：US20050162890A1
公开(公告)日：2005-07-28
申请号：US11041251
申请日：2005-01-25
申请人： Takayoshi Yamada , Yoshihisa Kato
发明人： Takayoshi Yamada , Yoshihisa Kato
CPC分类号： G11C11/5657 , G11C11/22
摘要： In the present invention, a polarization having a lower polarization level than a saturation polarization is caused in a ferroelectric capacitor by applying a voltage that is lower than a saturation voltage to the ferroelectric capacitor. This allows a storage device to store many values by changing a length of a write-time during which the voltage is applied to the capacitor.
摘要翻译： 在本发明中，通过向铁电电容器施加低于饱和电压的电压，在铁电电容器中产生具有比饱和极化低的极化电平的极化。 这允许存储设备通过改变将电压施加到电容器的写入时间的长度来存储许多值。
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公开(公告)号：US06898108B2
公开(公告)日：2005-05-24
申请号：US10647352
申请日：2003-08-26
申请人： Yoshihisa Kato , Takayoshi Yamada
发明人： Yoshihisa Kato , Takayoshi Yamada
IPC分类号： G11C11/22
CPC分类号： G11C11/22
摘要： In a memory block, for example, included in a semiconductor storage device, memory cells, reset transistors, and gain transistors are provided. The memory block further includes charge transistors for charging the gate potentials of the gain transistors, and current shutoff transistors for disconnecting electrical connection between the gain transistors and bit lines.
摘要翻译： 在存储器块中，例如，包括在半导体存储器件中，提供存储单元，复位晶体管和增益晶体管。 存储块还包括用于对增益晶体管的栅极电位充电的电荷晶体管，以及用于断开增益晶体管和位线之间的电连接的电流截止晶体管。
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7.发明授权Non-volatile semiconductor memory device with enhanced erase/write cycle endurance 失效具有增强的擦除/写入周期耐久性的非易失性半导体存储器件公开(公告)号：US06693840B2
公开(公告)日：2004-02-17
申请号：US10271139
申请日：2002-10-15
IPC分类号： G11C700
摘要： The power-supply unit, while directing externally supplied power to the control unit and the like, accumulates an amount of power that is required by the control unit to save data from the volatile memory to the non-volatile memory. When an external power supply has started, the control unit restores data of the non-volatile memory in the volatile memory; and when the external power supply has stopped, the control unit saves data from the volatile memory to the non-volatile memory.
摘要翻译： 电源单元在向控制单元等引导外部供电的同时，累积控制单元所需的功率量，以将数据从易失性存储器保存到非易失性存储器。 当外部电源开始时，控制单元恢复易失性存储器中的非易失性存储器的数据; 并且当外部电源停止时，控制单元将数据从易失性存储器保存到非易失性存储器。
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8.发明授权Solid-state imaging device comprising a holding circuit and driving method thereof 有权固态成像装置，包括保持电路及其驱动方法公开(公告)号：US08817143B2
公开(公告)日：2014-08-26
申请号：US13271466
申请日：2011-10-12
CPC分类号： H04N5/361 , H01L27/14643 , H04N5/3742 , H04N5/3745
摘要： A plurality of pixel circuits arranged in rows and columns, and each of which outputs an electric signal according to an amount of received light; a first column signal line provided for each of the columns, and for sequentially transferring the electric signals from said pixel circuits in a corresponding column; and a holding circuit provided for each of the pixel circuits in each column, and which holds the electric signal transferred through the column signal line in the corresponding column are provided. A holding circuit includes a first capacitor which holds a first electric signal of the corresponding pixel circuit in a reset state; and a second capacitor which holds a second electric signal after the corresponding pixel circuit receives light. A difference circuit calculates a difference between two electric signals held by the first capacitor and the second capacitor in a same holding circuit.
摘要翻译： 多个以行和列排列的像素电路，每个像素电路根据接收的光量输出电信号; 为每个列提供的第一列信号线，并且用于从相应列中的所述像素电路顺序传送电信号; 并且提供为每列中的每个像素电路提供并保持通过相应列中的列信号线传送的电信号的保持电路。 保持电路包括：第一电容器，其将相应像素电路的第一电信号保持在复位状态; 以及在相应的像素电路接收光之后保持第二电信号的第二电容器。 差分电路在相同的保持电路中计算由第一电容器和第二电容器保持的两个电信号之间的差。
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公开(公告)号：US20060067102A1
公开(公告)日：2006-03-30
申请号：US11234295
申请日：2005-09-26
申请人： Takayoshi Yamada , Yoshihisa Kato
发明人： Takayoshi Yamada , Yoshihisa Kato
IPC分类号： G11C11/22
CPC分类号： G11C11/22
摘要： A non-volatile logic circuit according to the present invention is comprised of: a logic circuit block; and an input/output unit operable to input and output data between the logic circuit block and the input/output unit and between a data bus and the input/output unit, wherein the input/output unit has a non-volatile data holding circuit which holds the data. Furthermore, a system large-scale integration (LSI) according to the present invention is comprised of a plurality of non-volatile logic circuits which are connected with one another via a data bus.
摘要翻译： 根据本发明的非易失性逻辑电路包括：逻辑电路块; 以及输入/输出单元，其可操作以在所述逻辑电路块和所述输入/输出单元之间以及在数据总线与所述输入/输出单元之间输入和输出数据，其中所述输入/输出单元具有非易失性数据保持电路， 保存数据。 此外，根据本发明的系统大规模集成（LSI）由通过数据总线彼此连接的多个非易失性逻辑电路组成。
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公开(公告)号：US06707704B2
公开(公告)日：2004-03-16
申请号：US10392843
申请日：2003-03-21
IPC分类号： G11C1122
CPC分类号： G11C11/22
摘要： The semiconductor memory device of the invention includes at least three memory cell blocks arranged in a word line direction. Each of the memory cell blocks includes a plurality of memory cells arranged in a bit line direction. Each of the memory cells includes a ferroelectric capacitor for storing data by displacement of polarization of a ferroelectric film and a selection transistor connected to one of paired electrodes of the ferroelectric capacitor. Each of the memory cell blocks also includes: a bit line, a sub-bit line and a source line extending in the bit line direction; and a read transistor having a gate connected to one end of the sub-bit line, a source connected to the source line, and a drain connected to one end of the bit line. The read transistor reads data by detecting the displacement of the polarization of the ferroelectric film of the ferroelectric capacitor of a data read memory cell from which data is read among the plurality of memory cells. The sub-bit lines of any two of the memory cell blocks are connected to each other via a sub-bit line coupling switch.
摘要翻译： 本发明的半导体存储器件包括沿字线方向布置的至少三个存储单元块。 每个存储单元块包括以位线方向排列的多个存储单元。 每个存储单元包括用于通过铁电薄膜的极化位移存储数据的铁电电容器和连接到铁电体电容器的一对电极之一的选择晶体管。 每个存储单元块还包括：位线，子位线和沿位线方向延伸的源极线; 以及读取晶体管，其具有连接到子位线的一端的栅极，连接到源极线的源极和连接到位线的一端的漏极。 读取晶体管通过检测在多个存储单元中从其读取数据的数据读取存储单元的铁电电容器的铁电体的极化的位移来读取数据。 任何两个存储单元块的子位线通过子位线耦合开关相互连接。
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