摘要:
The credit card information management system checks the creditability of a credit card intended to be used for purchase of goods or service by using the card information owned by member stores of credit companies. A host computer of the card management center outputs information regarding the validity or invalidity of a credit card of a customer member of a credit company as card information, a transmission facility wirelessly transmits digital data of the card information. A receiving facility of a member store receives radio signals of the card information and checks whether or not there is any missing of data. If any missing occurs, a transfer of the missed data is requested to the host computer. A terminal computer extracts only the card information necessary for one's own store from the data outputted by the host computer and data outputted in response to the transfer request and stores the same in memory, and the terminal computer outputs judgement of validity or invalidity of a credit card inputted into a card reader.
摘要:
A system for managing sales of goods for vending machines includes a goods control center, a plurality of vending machines, and terminal computers equipped in the respective vending machines. The goods control center includes a host computer for preparing digital data signals as control instructions, and a frequency moderation sub-carrier broadcasting facility as a transmission facility for outputting the digital data signals. Each vending machine has a receiving facility for receiving the digital data signals from the goods control center, and a responding facility. Each terminal computer receives the digital data signals and selectively extracts the digital data as the control instructions necessary for the vending machine to thereby store the digital data necessary for the vending machine in a memory. Each terminal computer controls the vending machine on a basis of the control instructions stored in the memory, obtains goods market information of the vending machine, and outputs the goods market information to the responding facility for reporting the information to the host computer at the goods control center.
摘要:
A prefix corresponding to a data block at the head of each of data groups in data of a layer 3 of a received FM multiplex broadcast program and data of a layer 4 of the received FM multiplex broadcast program are stored in first storage means. When a data retention command is entered, the data of the layer 3 is produced on the basis of the prefix and the data of the layer 4 which are stored in the first storage means, and the produced data of the layer 3 is retained in second storage means as versatile recording and reproducing data.
摘要:
An FM multiple radio broadcasting receiver includes a data group number and data packet number derivation circuit by which a data group number and a data packet number included in a prefix of FM subcarrier data are derived. A first random number generator generates a first random number on the basis of the data group number, the data packet number and scramble key data which is outputted from a scramble key generation circuit, and sets the first random number in a second random number generator as its initial value. Therefore, it is possible to appropriately scramble or descramble with using packet structure of the FM subcarrier data.
摘要:
In a packet analyzing circuit, first and second key data are detected and stored in respective first and second key data registers. First and second key generation circuits generate first and second keys from the first and second key data. An exclusive OR operation is carried out to both keys so as to generate a scrambling key. Using the scrambling key as an initial value, a random number generator generates a PN code used for scrambling, so that scrambled data is descrambled by adding the PN code to the data. The first key generation circuit, which receives a control signal CON from a timing generation circuit, is controlled by the control signal CON such that a scrambling key is generated only when the random number generator needs an initial value.
摘要:
A scrambling key is generated from demodulated and error-corrected FM demodulation data for use in descrambling. During this process, if error correction has not been normally conducted to an object data packet, a subsequent descrambling operation is not executed to that data packet. In addition, a descrambling operation is not carried out if the object data packet is a parity packet.
摘要:
In a decoding processing circuit of a digital signal receiver, a first comparison circuit detects that a prefix of packet data is inputted in a shift register on the basis of a count value of a counter circuit. In response to the result of detection, a pseudo-random binary sequence generation circuit outputs a pseudo-random binary sequence on the basis of a data group number and a data packet number outputted from the shift register and key data previously extracted by a key data fetch circuit. When a second comparison circuit detects that block data in the data packet is inputted in the shift register, an exclusive OR circuit exclusively ORs the pseudo-random binary sequence with receive data, so that decoded data is inputted in the shift register.
摘要:
A data flow graph processing method divides a program describing target operations into two or more subprograms and converts each of the two or more subprograms into a data flow graph (DFG) representing dependency in execution between operations carried out in sequence. Also generated is flow data indicating the order of execution of DFGs corresponding to respective subprograms. DFGs are converted into configuration data and the flow data is converted into control data.
摘要:
A reconfigurable circuit of reduced circuit scale. The reconfigurable circuit of the present invention comprises a plurality of ALUs capable of changing functions. The plurality of ALUs are arranged in a matrix. At least one connection unit capable of establishing connection between the ALUs selectively is provided between the stages of the ALUs. This connection unit is not intended to allow connection between all the logic circuits in adjoining stages, but is configured so that the logic circuits are each connectable with only some of the logic circuits pertaining to the other stages. The connection limitation allows a reduction in circuit scale.
摘要:
A reconfigurable circuit of reduced circuit scale. The reconfigurable circuit of the present invention comprises a plurality of ALUs capable of changing functions. The plurality of ALUs are arranged in a matrix. At least one connection unit capable of establishing connection between the ALUs selectively is provided between the stages of the ALUs. This connection unit is not intended to allow connection between all the logic circuits in adjoining stages, but is configured so that the logic circuits are each connectable with only some of the logic circuits pertaining to the other stages. The connection limitation allows a reduction in circuit scale.