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公开(公告)号:US06326299B1
公开(公告)日:2001-12-04
申请号:US09361989
申请日:1999-07-28
申请人: Yoshio Homma , Seiichi Kondo , Noriyuki Sakuma , Naofumi Ohashi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada
发明人: Yoshio Homma , Seiichi Kondo , Noriyuki Sakuma , Naofumi Ohashi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada
IPC分类号: H01L214763
CPC分类号: H01L21/3212 , C09G1/02 , H01L21/7684
摘要: In order to suppress an increase of depressions, etc. to occur on a copper based alloy layer during polishing when a copper based alloy inlaid wiring is formed with the damascene method in grooves formed in an insulating film, the polishing rate for the lower metallic layer is set not less than five times faster than the etching rate for the same and the polishing rate for the insulating film is set lower than the polishing rate for the lower metallic layer when the upper metallic layer 13 to become a wiring and the lower metallic layer 12 to become a barrier are polished respectively. Thus, the object damascene wiring can be formed with less erosion on each of insulating layers and dishing on each of metallic layers respectively.
摘要翻译: 为了抑制在绝缘膜中形成的槽中以镶嵌法形成铜基合金镶嵌布线时在抛光期间在铜基合金层上发生的凹陷等的增加,下金属层的研磨速度 设定为比其蚀刻速度快五倍以上,并且当上金属层13成为布线时,绝缘膜的抛光速率被设定为低于下金属层的抛光速率,下金属层 12成为屏障分别抛光。 因此,对象镶嵌布线可以分别形成在绝缘层和每个金属层上的凹陷上较少的侵蚀。
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公开(公告)号:US06638854B2
公开(公告)日:2003-10-28
申请号:US10227284
申请日:2002-08-26
申请人: Yoshio Homma , Seiichi Kondo , Noriyuki Sakuma , Naofumi Ohashi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada
发明人: Yoshio Homma , Seiichi Kondo , Noriyuki Sakuma , Naofumi Ohashi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada
IPC分类号: H01L214763
CPC分类号: H01L21/3212 , C09G1/02 , H01L21/7684
摘要: In order to suppress an increase of depressions, etc. to occur on a copper based alloy layer during polishing when a copper based alloy inlaid wiring is formed with the damascene method in grooves formed in an insulating film, the polishing rate for the lower metallic layer is set not less than five times faster than the etching rate for the same and the polishing rate for the insulating film is set lower than the polishing rate for the lower metallic layer when the upper metallic layer 13 to become a wiring and the lower metallic layer 12 to become a barrier are polished respectively. Thus, the object damascene wiring can be formed with less erosion on each of insulating layers and dishing on each of metallic layers respectively.
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公开(公告)号:US08129275B2
公开(公告)日:2012-03-06
申请号:US12700784
申请日:2010-02-05
申请人: Naofumi Ohashi , Junji Noguchi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada , Kenji Hinode , Yoshio Homma , Seiichi Kondo
发明人: Naofumi Ohashi , Junji Noguchi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada , Kenji Hinode , Yoshio Homma , Seiichi Kondo
IPC分类号: H01L21/44
CPC分类号: H01L21/0209 , G09G5/399 , H01L21/02074 , H01L21/3212 , H01L21/76838 , H01L21/7684 , Y10S438/906
摘要: In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.
摘要翻译: 为了提供通过化学机械抛光(CMP)方法形成的金属配线的防腐蚀技术,根据本发明的半导体集成电路器件的制造方法包括以下步骤:形成Cu(或Cu合金)的金属层 含有Cu作为主要成分),然后通过化学机械抛光(CMP)方法平坦化金属层以形成金属布线; 防止晶片的平面化主面在金属布线的表面上形成疏水性保护膜; 将晶圆的防腐主面浸入或保持湿润状态,使其不会变干; 并将晶片的主要表面保持在潮湿状态。
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公开(公告)号:US20100136786A1
公开(公告)日:2010-06-03
申请号:US12700784
申请日:2010-02-05
申请人: Naofumi Ohashi , Junji Noguchi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada , Kenji Hinode , Yoshio Homma , Seiichi Kondo
发明人: Naofumi Ohashi , Junji Noguchi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada , Kenji Hinode , Yoshio Homma , Seiichi Kondo
IPC分类号: H01L21/768
CPC分类号: H01L21/0209 , G09G5/399 , H01L21/02074 , H01L21/3212 , H01L21/76838 , H01L21/7684 , Y10S438/906
摘要: In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.
摘要翻译: 为了提供通过化学机械抛光(CMP)方法形成的金属配线的防腐蚀技术,根据本发明的半导体集成电路器件的制造方法包括以下步骤:形成Cu(或Cu合金)的金属层 含有Cu作为主要成分),然后通过化学机械抛光(CMP)方法平坦化金属层以形成金属布线; 防止晶片的平面化主面在金属布线的表面上形成疏水性保护膜; 将晶圆的防腐主面浸入或保持湿润状态,使其不会变干; 并将晶片的主要表面保持在潮湿状态。
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公开(公告)号:US06531400B2
公开(公告)日:2003-03-11
申请号:US10222848
申请日:2002-08-19
申请人: Naofumi Ohashi , Junji Noguchi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada , Kenji Hinode , Yoshio Homma , Seiichi Kondo
发明人: Naofumi Ohashi , Junji Noguchi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada , Kenji Hinode , Yoshio Homma , Seiichi Kondo
IPC分类号: H01L214263
CPC分类号: H01L21/0209 , G09G5/399 , H01L21/02074 , H01L21/3212 , H01L21/76838 , H01L21/7684 , Y10S438/906
摘要: In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.
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公开(公告)号:US20080233736A1
公开(公告)日:2008-09-25
申请号:US12127564
申请日:2008-05-27
申请人: Naofumi Ohashi , Junji Noguchi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada , Kenji Hinode , Yoshio Homma , Seiichi Kondo
发明人: Naofumi Ohashi , Junji Noguchi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada , Kenji Hinode , Yoshio Homma , Seiichi Kondo
IPC分类号: H01L21/4763
CPC分类号: H01L21/0209 , G09G5/399 , H01L21/02074 , H01L21/3212 , H01L21/76838 , H01L21/7684 , Y10S438/906
摘要: In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.
摘要翻译: 为了提供通过化学机械抛光(CMP)方法形成的金属配线的防腐蚀技术,根据本发明的半导体集成电路器件的制造方法包括以下步骤:形成Cu(或Cu合金)的金属层 含有Cu作为主要成分),然后通过化学机械抛光(CMP)方法平坦化金属层以形成金属布线; 防止晶片的平面化主面在金属布线的表面上形成疏水性保护膜; 将晶圆的防腐主面浸入或保持湿润状态,使其不会变干; 并将晶片的主要表面保持在潮湿状态。
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公开(公告)号:US20060141792A1
公开(公告)日:2006-06-29
申请号:US11357181
申请日:2006-02-21
申请人: Naofumi Ohashi , Junji Noguchi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada , Kenji Hinode , Yoshio Homma , Seiichi Kondo
发明人: Naofumi Ohashi , Junji Noguchi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada , Kenji Hinode , Yoshio Homma , Seiichi Kondo
IPC分类号: H01L21/44
CPC分类号: H01L21/0209 , G09G5/399 , H01L21/02074 , H01L21/3212 , H01L21/76838 , H01L21/7684 , Y10S438/906
摘要: In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP). method, a process for manufacturing. a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.
摘要翻译: 为了提供通过化学机械抛光(CMP)形成的金属配线的防腐蚀技术。 方法,制造方法。 根据本发明的半导体集成电路器件包括以下步骤:在晶片的主面上形成Cu(或含有Cu作为主要成分的Cu合金)的金属层,然后通过化学机械抛光使金属层平坦化 (CMP)方法形成金属布线; 防止晶片的平面化主面在金属布线的表面上形成疏水性保护膜; 将晶圆的防腐主面浸入或保持湿润状态,使其不会变干; 并将晶片的主要表面保持在潮湿状态。
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公开(公告)号:US06800557B2
公开(公告)日:2004-10-05
申请号:US10369716
申请日:2003-02-21
申请人: Naofumi Ohashi , Junji Noguchi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada , Kenji Hinode , Yoshio Homma , Seiichi Kondo
发明人: Naofumi Ohashi , Junji Noguchi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada , Kenji Hinode , Yoshio Homma , Seiichi Kondo
IPC分类号: H01L21302
CPC分类号: H01L21/0209 , G09G5/399 , H01L21/02074 , H01L21/3212 , H01L21/76838 , H01L21/7684 , Y10S438/906
摘要: In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.
摘要翻译: 为了提供通过化学机械抛光(CMP)方法形成的金属配线的防腐蚀技术,根据本发明的半导体集成电路器件的制造方法包括以下步骤:形成Cu(或Cu合金)的金属层 含有Cu作为主要成分),然后通过化学机械抛光(CMP)方法平坦化金属层以形成金属布线; 防止晶片的平面化主面在金属布线的表面上形成疏水性保护膜; 将晶圆的防腐主面浸入或保持湿润状态,使其不会变干; 并将晶片的主要表面保持在潮湿状态。
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公开(公告)号:US07510970B2
公开(公告)日:2009-03-31
申请号:US11357181
申请日:2006-02-21
申请人: Naofumi Ohashi , Junji Noguchi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada , Kenji Hinode , Yoshio Homma , Seiichi Kondo
发明人: Naofumi Ohashi , Junji Noguchi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada , Kenji Hinode , Yoshio Homma , Seiichi Kondo
IPC分类号: H01L21/44
CPC分类号: H01L21/0209 , G09G5/399 , H01L21/02074 , H01L21/3212 , H01L21/76838 , H01L21/7684 , Y10S438/906
摘要: In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.
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公开(公告)号:US06376345B1
公开(公告)日:2002-04-23
申请号:US09356707
申请日:1999-07-20
申请人: Naofumi Ohashi , Junji Noguchi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada , Kenji Hinode , Yoshio Homma , Seiichi Kondo
发明人: Naofumi Ohashi , Junji Noguchi , Toshinori Imai , Hizuru Yamaguchi , Nobuo Owada , Kenji Hinode , Yoshio Homma , Seiichi Kondo
IPC分类号: H01L2138
CPC分类号: H01L21/0209 , G09G5/399 , H01L21/02074 , H01L21/3212 , H01L21/76838 , H01L21/7684 , Y10S438/906
摘要: In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.
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