摘要:
An image decoding apparatus which decodes, in parallel, a coded stream having processing order dependency includes: a slice data predecoding unit which predecodes, on a macroblock group basis, macroblock groups included in the coded stream to generate macroblock decoding information necessary for decoding other macroblock groups; and a first macroblock decoding unit and a second macroblock decoding unit each of which decodes a corresponding one of macroblock groups included in the coded stream in parallel. Each of the macroblock decoding units, when decoding the corresponding one of macroblock groups, uses the macroblock decoding information that has been generated for the other macroblock group.
摘要:
An image decoding apparatus (40) which decodes, in parallel, a coded stream (Str) having processing order dependency includes: a slice data predecoding unit (402) which predecodes, on a macroblock group basis, macroblock groups included in the coded stream (Str) to generate macroblock decoding information (1001) necessary for decoding other macroblock groups; and a first macroblock decoding unit (404) and a second macroblock decoding unit (405) each of which decodes a corresponding one of macroblock groups included in the coded stream (Str) in parallel. Each of the macroblock decoding units (404, 405), when decoding the corresponding one of macroblock groups, uses the macroblock decoding information (1001) that has been generated for the other macroblock group.
摘要:
While temporal and spatial direct modes are both supported, the amount of temporarily-stored direct-mode prediction information is reduced, thereby reducing the memory bus bandwidth. A motion information generator combines a motion vector for an anchor block with the number of a reference picture of the anchor block, thereby generates motion information of the pixel block. A still-state determination unit determines whether or not the pixel block is considered still based on the motion vector for the anchor block and on the number of the reference picture. A selector selectively stores in a memory either an output of the motion information generator or a determination result of the still-state determination unit as direct-mode prediction information of the pixel block. A motion vector predictor predicts a motion vector for the pixel block in direct mode based on the direct-mode prediction information stored in the memory.
摘要:
When compression encoding processing of an image is performed in units of macroblocks using pipeline structure, application of the skip mode or the like according to MPEG4AVC to compression encode an encoding target block requires motion vectors and the like of adjacent blocks of the encoding target block. However, depending on the structure of the pipeline stages, the motion vectors and the like may not be determined. In such cases, the skip mode cannot be applied to compression encode the encoding target block. The present invention aims to solve this problem and (i) calculates all motion information candidates, of the encoding target block, corresponding to all motion information selectable by a previous block of the encoding target block, and (ii) selects, as the motion information of the encoding target block in the skip mode, the motion information corresponding to the motion information determined for the previous block.
摘要:
To provide an image decoding apparatus that suppresses overhead of parallel processing to improve parallelization efficiency and reduce circuit costs, while solving neighboring macroblock dependencies. The image decoding apparatus (100) includes first and second decoding circuits (101, 102) having a transfer unit that transfers right neighborhood information or left neighborhood information, and first and second transfer completion detection units (104, 105) that respectively detect whether or not the left neighborhood information or the right neighborhood information has been transferred to the first and second decoding circuits (101, 102). Each of the first and second decoding circuits (101, 102) decodes a decoding target macroblock positioned at an edge of a region, when the transfer of the left neighborhood information or the right neighborhood information is detected. A boundary line between regions is orthogonal to a decoding direction corresponding to an order in which macroblocks adjacent to each other are sequentially decoded.
摘要:
To provide an image decoding apparatus that suppresses overhead of parallel processing to improve parallelization efficiency and reduce circuit costs, while solving neighboring macroblock dependencies. The image decoding apparatus (100) includes first and second decoding circuits (101, 102) having a transfer unit that transfers right neighborhood information or left neighborhood information, and first and second transfer completion detection units (104, 105) that respectively detect whether or not the left neighborhood information or the right neighborhood information has been transferred to the first and second decoding circuits (101, 102). Each of the first and second decoding circuits (101, 102) decodes a decoding target macroblock positioned at an edge of a region, when the transfer of the left neighborhood information or the right neighborhood information is detected. A boundary line between regions is orthogonal to a decoding direction corresponding to an order in which macroblocks adjacent to each other are sequentially decoded.
摘要:
An image decoding device is provided that decodes, without an increase in the circuit size, a coded video sequence including a large-size block. The image decoding apparatus includes: a block division unit which divides a current block that is to be decoded and is included in a picture of the coded video sequence, into sub-blocks; an image obtainment unit which obtains, for each of the sub-blocks, image data corresponding to the sub-block from a recording medium; a prediction unit which generates, for each of the sub-blocks, a predicted image of the sub-block, based on the image data obtained by the image obtainment unit; and a reconstruction unit which reconstructs each of the sub-blocks, by adding the predicted image generated for the sub-block to the sub-block.
摘要:
An image decoding device is provided that decodes, without an increase in the circuit size, a coded video sequence including a large-size block. The image decoding apparatus includes: a block division unit which divides a current block that is to be decoded and is included in a picture of the coded video sequence, into sub-blocks; an image obtainment unit which obtains, for each of the sub-blocks, image data corresponding to the sub-block from a recording medium; a prediction unit which generates, for each of the sub-blocks, a predicted image of the sub-block, based on the image data obtained by the image obtainment unit; and a reconstruction unit which reconstructs each of the sub-blocks, by adding the predicted image generated for the sub-block to the sub-block.
摘要:
A moving image decoding apparatus which enables reduction in the memory bandwidth and the memory access latency for the motion compensation filter coefficients for use in inter-picture prediction involving motion compensation using variable coefficients includes: a decoding unit (101) which decodes, from a coded stream, a plurality of motion compensation filter coefficients; a memory (109) for holding the motion compensation filter coefficients included in the coded stream; a filter coefficient storage unit (103) for holding at least one of the motion compensation filter coefficients which is required for the motion compensation; a motion compensation unit (107) which performs motion compensation using the required motion compensation filter coefficient held in the filter coefficient storage unit; and a filter coefficient transfer control unit (102) which writes, in the memory, the motion compensation filter coefficients decoded by the decoding unit, and transfers the required motion compensation filter coefficient from the memory to the filter coefficient storage unit, only when the required coefficient is not yet stored therein.
摘要:
A decoding apparatus (100) according to the present invention includes: a decoding unit (101) which decodes identification information identifying an orthogonal transform basis for inverse orthogonal transform; an orthogonal transform basis accumulation unit (110) accumulating orthogonal transform bases for inverse orthogonal transform; an orthogonal transform basis storage unit (103) storing an orthogonal transform basis for inverse transform, from among the stored orthogonal transform bases; an inverse orthogonal transform unit (112) which performs inverse orthogonal transform using the identified orthogonal transform basis; and an orthogonal transform basis transfer control unit (102) which transfers the identified orthogonal transfer basis from the orthogonal transform basis accumulation unit (110) to the orthogonal transfer basis storage unit (103) only when the identified orthogonal transform basis is not yet stored therein. With this structure, it is possible to reduce the memory bandwidth for the memory storing the orthogonal transform basis and the memory access latency.