公开(公告)号：US10033997B2

公开(公告)日：2018-07-24

申请号：US13805704

申请日：2011-06-21

申请人： Yoshiteru Hayashi ,  Takeshi Tanaka ,  Takashi Hashimoto ,  Satoshi Kajita ,  Hiroshi Amano

发明人： Yoshiteru Hayashi ,  Takeshi Tanaka ,  Takashi Hashimoto ,  Satoshi Kajita ,  Hiroshi Amano

IPC分类号： H04N7/32 ,  H04N19/50 ,  H04N19/51 ,  H04N19/44 ,  H04N19/52 ,  H04N19/176 ,  H04N19/61 ,  H04N19/96 ,  H04N19/107 ,  H04N19/86

摘要： An image decoding device is provided that decodes, without an increase in the circuit size, a coded video sequence including a large-size block. The image decoding apparatus includes: a block division unit which divides a current block that is to be decoded and is included in a picture of the coded video sequence, into sub-blocks; an image obtainment unit which obtains, for each of the sub-blocks, image data corresponding to the sub-block from a recording medium; a prediction unit which generates, for each of the sub-blocks, a predicted image of the sub-block, based on the image data obtained by the image obtainment unit; and a reconstruction unit which reconstructs each of the sub-blocks, by adding the predicted image generated for the sub-block to the sub-block.

公开(公告)号：US20130089149A1

公开(公告)日：2013-04-11

申请号：US13805704

申请日：2011-06-21

申请人： Yoshiteru Hayashi ,  Takeshi Tanaka ,  Takashi Hashimoto ,  Satoshi Kajita ,  Hiroshi Amano

发明人： Yoshiteru Hayashi ,  Takeshi Tanaka ,  Takashi Hashimoto ,  Satoshi Kajita ,  Hiroshi Amano

IPC分类号： H04N7/32

CPC分类号： H04N19/51 ,  H04N19/107 ,  H04N19/176 ,  H04N19/44 ,  H04N19/52 ,  H04N19/61 ,  H04N19/86 ,  H04N19/96

摘要： An image decoding device is provided that decodes, without an increase in the circuit size, a coded video sequence including a large-size block. The image decoding apparatus includes: a block division unit which divides a current block that is to be decoded and is included in a picture of the coded video sequence, into sub-blocks; an image obtainment unit which obtains, for each of the sub-blocks, image data corresponding to the sub-block from a recording medium; a prediction unit which generates, for each of the sub-blocks, a predicted image of the sub-block, based on the image data obtained by the image obtainment unit; and a reconstruction unit which reconstructs each of the sub-blocks, by adding the predicted image generated for the sub-block to the sub-block.

摘要翻译： 提供了一种图像解码装置，其不增加电路尺寸，对包括大尺寸块的编码视频序列进行解码。 图像解码装置包括：块分割单元，将要被解码并被包括在编码视频序列的图像中的当前块划分成子块; 对于每个子块，从记录介质获取与子块相对应的图像数据的图像获取单元; 基于由所述图像获取单元获得的图像数据，对于每个所述子块生成所述子块的预测图像的预测单元; 以及重建单元，通过将对于子块生成的预测图像添加到子块中，来重构每个子块。

公开(公告)号：US20110235716A1

公开(公告)日：2011-09-29

申请号：US13121041

申请日：2010-10-07

申请人： Takeshi Tanaka ,  Hiroshi Amano ,  Yoshiteru Hayashi ,  Takashi Hashimoto ,  Satoshi Kajita

发明人： Takeshi Tanaka ,  Hiroshi Amano ,  Yoshiteru Hayashi ,  Takashi Hashimoto ,  Satoshi Kajita

IPC分类号： H04N7/26

CPC分类号： H04N19/433 ,  H04N19/44

摘要： A decoding apparatus (100) includes: a first memory unit (20) storing pixel data of a decoded reference image to be referred to in decoding; a second memory unit (30) having a storage capacity smaller than that of the first memory unit (20) and providing a data reading speed faster than that provided by the first memory unit (20); a search area transfer unit (40) transferring, from the first memory unit (20) to the second memory unit (30), pixel data in a search area that is a part of the reference image and required to calculate a motion vector for the block; a motion vector operating unit (50) calculating the motion vector by repeatedly (i) reading out, from the second memory unit (30), the pixel data and (ii) performing a predetermined operation on the pixel data; and a decoding unit (60) decoding the block using the calculated motion vector.

摘要翻译： 解码装置（100）包括：第一存储单元，存储解码中要参考的解码参考图像的像素数据; 具有比第一存储单元（20）的存储容量小的存储容量的第二存储器单元（30），并且提供比由第一存储器单元（20）提供的数据读取速度更快的数据读取速度; 搜索区域传送单元，从第一存储单元（20）向第二存储单元（30）传送作为参考图像的一部分的搜索区域中的像素数据，并且需要计算用于 块; 运动矢量运算单元，通过重复地（i）从第二存储器单元（30）读出像素数据和（ii）对像素数据执行预定的操作来计算运动矢量; 以及解码单元（60），使用所计算的运动矢量对该块进行解码。

公开(公告)号：US20120147959A1

公开(公告)日：2012-06-14

申请号：US13255267

申请日：2011-03-02

申请人： Hiroshi Amano ,  Takeshi Tanaka ,  Takashi Hashimoto ,  Yoshiteru Hayashi

发明人： Hiroshi Amano ,  Takeshi Tanaka ,  Takashi Hashimoto ,  Yoshiteru Hayashi

IPC分类号： H04N7/32

CPC分类号： H04N19/82 ,  H04N19/117 ,  H04N19/43 ,  H04N19/44 ,  H04N19/513 ,  H04N19/61

摘要： A moving image decoding apparatus which enables reduction in the memory bandwidth and the memory access latency for the motion compensation filter coefficients for use in inter-picture prediction involving motion compensation using variable coefficients includes: a decoding unit (101) which decodes, from a coded stream, a plurality of motion compensation filter coefficients; a memory (109) for holding the motion compensation filter coefficients included in the coded stream; a filter coefficient storage unit (103) for holding at least one of the motion compensation filter coefficients which is required for the motion compensation; a motion compensation unit (107) which performs motion compensation using the required motion compensation filter coefficient held in the filter coefficient storage unit; and a filter coefficient transfer control unit (102) which writes, in the memory, the motion compensation filter coefficients decoded by the decoding unit, and transfers the required motion compensation filter coefficient from the memory to the filter coefficient storage unit, only when the required coefficient is not yet stored therein.

摘要翻译： 一种运动图像解码装置，其能够减少使用可变系数的运动补偿的帧间预测中使用的运动补偿滤波器系数的存储器带宽和存储器访问等待时间，包括：解码单元， 流，多个运动补偿滤波器系数; 用于保持包含在编码流中的运动补偿滤波器系数的存储器（109） 滤波器系数存储单元，用于保持运动补偿所需的运动补偿滤波器系数中的至少一个; 使用保持在滤波器系数存储单元中的所需运动补偿滤波器系数进行运动补偿的运动补偿单元（107） 以及滤波器系数传递控制单元（102），其在存储器中写入由解码单元解码的运动补偿滤波器系数，并且将所需的运动补偿滤波器系数从存储器传送到滤波器系数存储单元，只有当所需的 系数尚未存储在其中。

公开(公告)号：US08995530B2

公开(公告)日：2015-03-31

申请号：US13255267

申请日：2011-03-02

申请人： Hiroshi Amano ,  Takeshi Tanaka ,  Takashi Hashimoto ,  Yoshiteru Hayashi

发明人： Hiroshi Amano ,  Takeshi Tanaka ,  Takashi Hashimoto ,  Yoshiteru Hayashi

IPC分类号： H04N7/12 ,  H04N11/02 ,  H04N11/04 ,  H04N19/43 ,  H04N19/61 ,  H04N19/117 ,  H04N19/44

CPC分类号： H04N19/82 ,  H04N19/117 ,  H04N19/43 ,  H04N19/44 ,  H04N19/513 ,  H04N19/61

摘要： A moving image decoding apparatus which enables reduction in the memory bandwidth and the memory access latency for the motion compensation filter coefficients for use in inter-picture prediction involving motion compensation using variable coefficients includes: a decoding unit (101) which decodes, from a coded stream, a plurality of motion compensation filter coefficients; a memory (109) for holding the motion compensation filter coefficients included in the coded stream; a filter coefficient storage unit (103) for holding at least one of the motion compensation filter coefficients which is required for the motion compensation; a motion compensation unit (107) which performs motion compensation using the required motion compensation filter coefficient held in the filter coefficient storage unit; and a filter coefficient transfer control unit (102) which writes, in the memory, the motion compensation filter coefficients decoded by the decoding unit, and transfers the required motion compensation filter coefficient from the memory to the filter coefficient storage unit, only when the required coefficient is not yet stored therein.

摘要翻译： 一种运动图像解码装置，其能够减少使用可变系数的运动补偿的帧间预测中使用的运动补偿滤波器系数的存储器带宽和存储器访问等待时间，包括：解码单元， 流，多个运动补偿滤波器系数; 用于保持包含在编码流中的运动补偿滤波器系数的存储器（109） 滤波器系数存储单元，用于保持运动补偿所需的运动补偿滤波器系数中的至少一个; 使用保持在滤波器系数存储单元中的所需运动补偿滤波器系数进行运动补偿的运动补偿单元（107） 以及滤波器系数传递控制单元（102），其在存储器中写入由解码单元解码的运动补偿滤波器系数，并且将所需的运动补偿滤波器系数从存储器传送到滤波器系数存储单元，只有当所需的 系数尚未存储在其中。

公开(公告)号：US20120063693A1

公开(公告)日：2012-03-15

申请号：US13321857

申请日：2011-03-16

申请人： Hiroshi Amano ,  Takeshi Tanaka ,  Takashi Hashimoto ,  Yoshiteru Hayashi

发明人： Hiroshi Amano ,  Takeshi Tanaka ,  Takashi Hashimoto ,  Yoshiteru Hayashi

IPC分类号： G06K9/36

CPC分类号： H04N19/60 ,  H04N19/122 ,  H04N19/44 ,  H04N19/547

摘要： A decoding apparatus (100) according to the present invention includes: a decoding unit (101) which decodes identification information identifying an orthogonal transform basis for inverse orthogonal transform; an orthogonal transform basis accumulation unit (110) accumulating orthogonal transform bases for inverse orthogonal transform; an orthogonal transform basis storage unit (103) storing an orthogonal transform basis for inverse transform, from among the stored orthogonal transform bases; an inverse orthogonal transform unit (112) which performs inverse orthogonal transform using the identified orthogonal transform basis; and an orthogonal transform basis transfer control unit (102) which transfers the identified orthogonal transfer basis from the orthogonal transform basis accumulation unit (110) to the orthogonal transfer basis storage unit (103) only when the identified orthogonal transform basis is not yet stored therein. With this structure, it is possible to reduce the memory bandwidth for the memory storing the orthogonal transform basis and the memory access latency.

摘要翻译： 根据本发明的解码装置（100）包括：解码单元（101），其对识别用于逆正交变换的正交变换基准的识别信息进行解码; 正交变换基积累单元（110），累积用于逆正交变换的正交变换基; 正交变换基准存储单元，从存储的正交变换基中存储用于逆变换的正交变换基础; 使用所识别的正交变换基础进行逆正交变换的逆正交变换单元（112） 以及正交变换基传送控制单元（102），其仅在所识别的正交变换基础尚未存储时，将所识别的正交传送基础从正交变换基础累积单元（110）传送到正交传送基础存储单元（103） 。 利用这种结构，可以减少存储正交变换基础和存储器访问延迟的存储器的存储器带宽。

公开(公告)号：US08559736B2

公开(公告)日：2013-10-15

申请号：US13321857

申请日：2011-03-16

申请人： Hiroshi Amano ,  Takeshi Tanaka ,  Takashi Hashimoto ,  Yoshiteru Hayashi

发明人： Hiroshi Amano ,  Takeshi Tanaka ,  Takashi Hashimoto ,  Yoshiteru Hayashi

IPC分类号： H04N7/50

CPC分类号： H04N19/60 ,  H04N19/122 ,  H04N19/44 ,  H04N19/547

摘要： A decoding apparatus (100) according to the present invention includes: a decoding unit (101) which decodes identification information identifying an orthogonal transform basis for inverse orthogonal transform; an orthogonal transform basis accumulation unit (110) accumulating orthogonal transform bases for inverse orthogonal transform; an orthogonal transform basis storage unit (103) storing an orthogonal transform basis for inverse transform, from among the stored orthogonal transform bases; an inverse orthogonal transform unit (112) which performs inverse orthogonal transform using the identified orthogonal transform basis; and an orthogonal transform basis transfer control unit (102) which transfers the identified orthogonal transfer basis from the orthogonal transform basis accumulation unit (110) to the orthogonal transfer basis storage unit (103) only when the identified orthogonal transform basis is not yet stored therein. With this structure, it is possible to reduce the memory bandwidth for the memory storing the orthogonal transform basis and the memory access latency.

摘要翻译： 根据本发明的解码装置（100）包括：解码单元（101），其对识别用于逆正交变换的正交变换基准的识别信息进行解码; 正交变换基积累单元（110），累积用于逆正交变换的正交变换基; 正交变换基准存储单元，从存储的正交变换基中存储用于逆变换的正交变换基础; 使用所识别的正交变换基础进行逆正交变换的逆正交变换单元（112） 以及正交变换基传送控制单元（102），其仅在所识别的正交变换基础尚未存储时，将所识别的正交传送基础从正交变换基础累积单元（110）传送到正交传送基础存储单元（103） 。 利用这种结构，可以减少存储正交变换基础和存储器访问延迟的存储器的存储器带宽。

公开(公告)号：US09042457B2

公开(公告)日：2015-05-26

申请号：US12673408

申请日：2009-06-05

申请人： Yoshiteru Hayashi ,  Hiroshi Amano ,  Masayasu Iguchi

发明人： Yoshiteru Hayashi ,  Hiroshi Amano ,  Masayasu Iguchi

IPC分类号： H04N7/12 ,  H04N19/436 ,  H04N19/176 ,  H04N19/70 ,  H04N19/134 ,  H04N19/61 ,  H04N19/147 ,  H04N19/44 ,  H04N19/13 ,  H04N19/124 ,  H04N19/132 ,  H04N19/40

CPC分类号： H04N19/436 ,  H04N19/124 ,  H04N19/13 ,  H04N19/132 ,  H04N19/134 ,  H04N19/147 ,  H04N19/174 ,  H04N19/176 ,  H04N19/40 ,  H04N19/44 ,  H04N19/61 ,  H04N19/70

摘要： An image decoding apparatus which decodes, in parallel, a coded stream having processing order dependency includes: a slice data predecoding unit which predecodes, on a macroblock group basis, macroblock groups included in the coded stream to generate macroblock decoding information necessary for decoding other macroblock groups; and a first macroblock decoding unit and a second macroblock decoding unit each of which decodes a corresponding one of macroblock groups included in the coded stream in parallel. Each of the macroblock decoding units, when decoding the corresponding one of macroblock groups, uses the macroblock decoding information that has been generated for the other macroblock group.

摘要翻译： 并行解码具有处理顺序依赖性的编码流的图像解码装置包括：切片数据预解码单元，其以宏块组为基础对包含在编码流中的宏块组进行预解码，以生成解码其他宏块所需的宏块解码信息 团体 以及第一宏块解码单元和第二宏块解码单元，每个解码单元并行地解码编码流中包括的宏块组中的对应的一个。 每个宏块解码单元在对宏块组中相应的一个进行解码时，使用为其他宏块组生成的宏块解码信息。

公开(公告)号：US20110200115A1

公开(公告)日：2011-08-18

申请号：US12673408

申请日：2009-06-05

申请人： Yoshiteru Hayashi ,  Hiroshi Amano ,  Masayasu Iguchi

发明人： Yoshiteru Hayashi ,  Hiroshi Amano ,  Masayasu Iguchi

IPC分类号： H04N7/26

CPC分类号： H04N19/436 ,  H04N19/124 ,  H04N19/13 ,  H04N19/132 ,  H04N19/134 ,  H04N19/147 ,  H04N19/174 ,  H04N19/176 ,  H04N19/40 ,  H04N19/44 ,  H04N19/61 ,  H04N19/70

摘要： An image decoding apparatus (40) which decodes, in parallel, a coded stream (Str) having processing order dependency includes: a slice data predecoding unit (402) which predecodes, on a macroblock group basis, macroblock groups included in the coded stream (Str) to generate macroblock decoding information (1001) necessary for decoding other macroblock groups; and a first macroblock decoding unit (404) and a second macroblock decoding unit (405) each of which decodes a corresponding one of macroblock groups included in the coded stream (Str) in parallel. Each of the macroblock decoding units (404, 405), when decoding the corresponding one of macroblock groups, uses the macroblock decoding information (1001) that has been generated for the other macroblock group.

摘要翻译： 并行地解码具有处理顺序依赖性的编码流（Str）的图像解码装置（40）包括：切片数据预解码单元（402），其以宏块组为基础对包含在编码流中的宏块组 Str）生成对其他宏块组进行解码所需的宏块解码信息（1001） 以及第一宏块解码单元（404）和第二宏块解码单元（405），每个宏块解码单元并行地解码编码流（Str）中包括的宏块组中的对应的一个。 每个宏块解码单元（404,405）在对宏块组中相应的一个进行解码时，使用为其他宏块组生成的宏块解码信息（1001）。

公开(公告)号：US20140219577A1

公开(公告)日：2014-08-07

申请号：US13818198

申请日：2012-07-25

申请人： Yoshiteru Hayashi

发明人： Yoshiteru Hayashi

IPC分类号： G06T5/10

CPC分类号： G06T5/10 ,  G06F7/5443 ,  G06F7/766 ,  G06F9/3001 ,  G06F9/30032 ,  G06F9/30036 ,  G06F17/10 ,  G06F2207/3828 ,  G06T1/00 ,  G06T2200/28 ,  G06T2207/20024 ,  H03H17/0202

摘要： A symmetric filter arithmetic apparatus includes a first data shuffling unit which reads a first data string that is a plurality of consecutive pieces of data from a register file and extract, from the first data string, a left-side data string that is a plurality of consecutive pieces of data to be multiplied by a left-side filter coefficient that is a filter coefficient on a left side of a center of the coefficients, and a second data shuffling unit which reads a second data string that is a plurality of consecutive pieces of data from the register file and extract, from the second data string, a right-side data string that is a plurality of consecutive pieces of data to be multiplied by a right-side filter coefficient that is a filter coefficient on a right side of the center and is the same value as the left-side filter coefficient.

摘要翻译： 对称滤波器运算装置包括：第一数据混洗单元，从第一数据串中读取作为来自寄存器文件的多个连续数据的第一数据串，并从第二数据串中提取多个 要被乘以作为系数中心左侧的滤波器系数的左侧滤波器系数的连续数据块，以及第二数据混洗单元，其读取作为多个连续片段的第二数据串 来自寄存器文件的数据，并从第二数据串中提取右侧数据串，该右侧数据串是要乘以作为右侧的滤波器系数的右侧滤波器系数的多个连续数据块 中心，与左侧滤波器系数相同。