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    Semiconductor device and method of manufacturing the same
    1.
    发明授权
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US08278177B2

    公开(公告)日：2012-10-02

    申请号：US13240303

    申请日：2011-09-22

    申请人： Yosuke Shimamune ,  Masahiro Fukuda ,  Young Suk Kim ,  Akira Katakami ,  Akiyoshi Hatada ,  Naoyoshi Tamura ,  Hiroyuki Ohta

    发明人： Yosuke Shimamune ,  Masahiro Fukuda ,  Young Suk Kim ,  Akira Katakami ,  Akiyoshi Hatada ,  Naoyoshi Tamura ,  Hiroyuki Ohta

    IPC分类号： H01L21/336

    CPC分类号： H01L29/7848 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833

    摘要： A first p-type SiGe mixed crystal layer is formed by an epitaxial growth method in a trench, and a second p-type SiGe mixed crystal layer is formed. On the second SiGe mixed crystal layer, a third p-type SiGe mixed crystal layer is formed. The height of an uppermost surface of the first SiGe mixed crystal layer from the bottom of the trench is lower than the depth of the trench with the surface of the silicon substrate being the standard. The height of an uppermost surface of the second SiGe mixed crystal layer from the bottom of the trench is higher than the depth of the trench with the surface of the silicon substrate being the standard. Ge concentrations in the first and third SiGe mixed crystal layers are lower than a Ge concentration in the second SiGe mixed crystal layer.

    摘要翻译： 在沟槽中通过外延生长法形成第一p型SiGe混晶层，形成第二p型SiGe混晶层。 在第二SiGe混晶层上形成第三p型SiGe混晶层。 从沟槽底部开始的第一SiGe混合晶体层的最上表面的高度低于沟槽的深度，硅衬底的表面是标准的。 从沟槽底部开始的第二SiGe混合晶体层的最上表面的高度高于沟槽的深度，硅衬底的表面是标准的。 第一和第三SiGe混晶层中的Ge浓度低于第二SiGe混晶层中的Ge浓度。

    Semiconductor device and method of manufacturing the same
    3.
    发明授权
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US07626215B2

    公开(公告)日：2009-12-01

    申请号：US11604694

    申请日：2006-11-28

    申请人： Yosuke Shimamune ,  Masahiro Fukuda ,  Young Suk Kim ,  Akira Katakami ,  Akiyoshi Hatada ,  Naoyoshi Tamura ,  Hiroyuki Ohta

    发明人： Yosuke Shimamune ,  Masahiro Fukuda ,  Young Suk Kim ,  Akira Katakami ,  Akiyoshi Hatada ,  Naoyoshi Tamura ,  Hiroyuki Ohta

    IPC分类号： H01L29/78

    CPC分类号： H01L29/7848 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833

    摘要： A first p-type SiGe mixed crystal layer is formed by an epitaxial growth method in a trench, and a second p-type SiGe mixed crystal layer is formed. On the second SiGe mixed crystal layer, a third p-type SiGe mixed crystal layer is formed. The height of an uppermost surface of the first SiGe mixed crystal layer from the bottom of the trench is lower than the depth of the trench with the surface of the silicon substrate being the standard. The height of an uppermost surface of the second SiGe mixed crystal layer from the bottom of the trench is higher than the depth of the trench with the surface of the silicon substrate being the standard. Ge concentrations in the first and third SiGe mixed crystal layers are lower than a Ge concentration in the second SiGe mixed crystal layer.

    摘要翻译： 在沟槽中通过外延生长法形成第一p型SiGe混晶层，形成第二p型SiGe混晶层。 在第二SiGe混晶层上形成第三p型SiGe混晶层。 从沟槽底部开始的第一SiGe混合晶体层的最上表面的高度低于沟槽的深度，硅衬底的表面是标准的。 从沟槽底部开始的第二SiGe混合晶体层的最上表面的高度高于沟槽的深度，硅衬底的表面是标准的。 第一和第三SiGe混晶层中的Ge浓度低于第二SiGe混晶层中的Ge浓度。

    Semiconductor device and method of manufacturing the same
    4.
    发明申请
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US20080023773A1

    公开(公告)日：2008-01-31

    申请号：US11604694

    申请日：2006-11-28

    申请人： Yosuke Shimamune ,  Masahiro Fukuda ,  Young Suk Kim ,  Akira Katakami ,  Akiyoshi Hatada ,  Naoyoshi Tamura ,  Hiroyuki Ohta

    发明人： Yosuke Shimamune ,  Masahiro Fukuda ,  Young Suk Kim ,  Akira Katakami ,  Akiyoshi Hatada ,  Naoyoshi Tamura ,  Hiroyuki Ohta

    IPC分类号： H01L29/76 ,  H01L21/336

    CPC分类号： H01L29/7848 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833

    摘要： A first p-type SiGe mixed crystal layer is formed by an epitaxial growth method in a trench, and a second p-type SiGe mixed crystal layer is formed. On the second SiGe mixed crystal layer, a third p-type SiGe mixed crystal layer is formed. The height of an uppermost surface of the first SiGe mixed crystal layer from the bottom of the trench is lower than the depth of the trench with the surface of the silicon substrate being the standard. The height of an uppermost surface of the second SiGe mixed crystal layer from the bottom of the trench is higher than the depth of the trench with the surface of the silicon substrate being the standard. Ge concentrations in the first and third SiGe mixed crystal layers are lower than a Ge concentration in the second SiGe mixed crystal layer.

    摘要翻译： 在沟槽中通过外延生长法形成第一p型SiGe混晶层，形成第二p型SiGe混晶层。 在第二SiGe混晶层上形成第三p型SiGe混晶层。 从沟槽底部开始的第一SiGe混合晶体层的最上表面的高度低于沟槽的深度，硅衬底的表面是标准的。 从沟槽底部开始的第二SiGe混合晶体层的最上表面的高度高于沟槽的深度，硅衬底的表面是标准的。 第一和第三SiGe混晶层中的Ge浓度低于第二SiGe混晶层中的Ge浓度。

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    7.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20120009750A1

    公开(公告)日：2012-01-12

    申请号：US13240303

    申请日：2011-09-22

    申请人： Yosuke Shimamune ,  Masahiro Fukuda ,  Young Suk Kim ,  Akira Katakami ,  Akiyoshi Hatada ,  Naoyoshi Tamura ,  Hiroyuki Ohta

    发明人： Yosuke Shimamune ,  Masahiro Fukuda ,  Young Suk Kim ,  Akira Katakami ,  Akiyoshi Hatada ,  Naoyoshi Tamura ,  Hiroyuki Ohta

    IPC分类号： H01L21/336

    CPC分类号： H01L29/7848 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833

    摘要： A first p-type SiGe mixed crystal layer is formed by an epitaxial growth method in a trench, and a second p-type SiGe mixed crystal layer is formed. On the second SiGe mixed crystal layer, a third p-type SiGe mixed crystal layer is formed. The height of an uppermost surface of the first SiGe mixed crystal layer from the bottom of the trench is lower than the depth of the trench with the surface of the silicon substrate being the standard. The height of an uppermost surface of the second SiGe mixed crystal layer from the bottom of the trench is higher than the depth of the trench with the surface of the silicon substrate being the standard. Ge concentrations in the first and third SiGe mixed crystal layers are lower than a Ge concentration in the second SiGe mixed crystal layer.

    摘要翻译： 在沟槽中通过外延生长法形成第一p型SiGe混晶层，形成第二p型SiGe混晶层。 在第二SiGe混晶层上形成第三p型SiGe混晶层。 从沟槽底部开始的第一SiGe混合晶体层的最上表面的高度低于沟槽的深度，硅衬底的表面是标准的。 从沟槽底部开始的第二SiGe混合晶体层的最上表面的高度高于沟槽的深度，硅衬底的表面是标准的。 第一和第三SiGe混晶层中的Ge浓度低于第二SiGe混晶层中的Ge浓度。

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    8.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20100015774A1

    公开(公告)日：2010-01-21

    申请号：US12564313

    申请日：2009-09-22

    申请人： Yosuke SHIMAMUNE ,  Masahiro Fukuda ,  Young Suk Kim ,  Akira Katakami ,  Akiyoshi Hatada ,  Naoyoshi Tamura ,  Hiroyuki Ohta

    发明人： Yosuke SHIMAMUNE ,  Masahiro Fukuda ,  Young Suk Kim ,  Akira Katakami ,  Akiyoshi Hatada ,  Naoyoshi Tamura ,  Hiroyuki Ohta

    IPC分类号： H01L21/336

    CPC分类号： H01L29/7848 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833

    摘要： A first p-type SiGe mixed crystal layer is formed by an epitaxial growth method in a trench, and a second p-type SiGe mixed crystal layer is formed. On the second SiGe mixed crystal layer, a third p-type SiGe mixed crystal layer is formed. The height of an uppermost surface of the first SiGe mixed crystal layer from the bottom of the trench is lower than the depth of the trench with the surface of the silicon substrate being the standard. The height of an uppermost surface of the second SiGe mixed crystal layer from the bottom of the trench is higher than the depth of the trench with the surface of the silicon substrate being the standard. Ge concentrations in the first and third SiGe mixed crystal layers are lower than a Ge concentration in the second SiGe mixed crystal layer.

    摘要翻译： 在沟槽中通过外延生长法形成第一p型SiGe混晶层，形成第二p型SiGe混晶层。 在第二SiGe混晶层上形成第三p型SiGe混晶层。 从沟槽底部开始的第一SiGe混合晶体层的最上表面的高度低于沟槽的深度，硅衬底的表面是标准的。 从沟槽底部开始的第二SiGe混合晶体层的最上表面的高度高于沟槽的深度，硅衬底的表面是标准的。 第一和第三SiGe混晶层中的Ge浓度低于第二SiGe混晶层中的Ge浓度。

    Semiconductor integrated circuit and fabrication process thereof
    10.
    发明授权
    Semiconductor integrated circuit and fabrication process thereof 有权
    半导体集成电路及其制造工艺

    公开(公告)号：US07378305B2

    公开(公告)日：2008-05-27

    申请号：US11132325

    申请日：2005-05-19

    申请人： Akiyoshi Hatada ,  Akira Katakami ,  Naoyoshi Tamura ,  Yosuke Shimamune ,  Masashi Shima ,  Hiroyuki Ohta

    发明人： Akiyoshi Hatada ,  Akira Katakami ,  Naoyoshi Tamura ,  Yosuke Shimamune ,  Masashi Shima ,  Hiroyuki Ohta

    IPC分类号： H01L21/00 ,  H01L21/84

    CPC分类号： H01L29/6656 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823835 ,  H01L21/823842 ,  H01L21/823864 ,  H01L29/6653 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7848 ,  Y10S438/933

    摘要： A semiconductor integrated circuit device includes an n-channel MOS transistor formed on a first device region of a silicon substrate and a p-channel MOS transistor formed on a second device region of the silicon substrate, wherein the n-channel MOS transistor includes a first gate electrode carrying a pair of first sidewall insulation films formed on respective sidewall surfaces thereof, the p-channel MOS transistor includes a second gate electrode carrying a pair of second sidewall insulation films formed on respective sidewall surfaces thereof, first and second SiGe mixed crystal regions being formed in the second device region epitaxially so as to fill first and second trenches formed at respective, outer sides of the second sidewall insulation films so as to be included in source and drain diffusions of the p-channel MOS transistor, a distance between n-type source and drain diffusion region in the first device region being larger than a distance between the p-type source and drain diffusion regions in the second device region.

    摘要翻译： 半导体集成电路器件包括形成在硅衬底的第一器件区上的n沟道MOS晶体管和形成在硅衬底的第二器件区上的p沟道MOS晶体管，其中n沟道MOS晶体管包括第一 所述p沟道MOS晶体管包括：第二栅极，其在其各个侧壁表面上形成有一对第二侧壁绝缘膜，第一和第二SiGe混合晶体区域 在第二器件区域外延形成，以便填充形成在第二侧壁绝缘膜的相应的外侧的第一和第二沟槽，以便包含在p沟道MOS晶体管的源极和漏极扩散中，n 第一器件区域中的源极和漏极扩散区域大于p型源极和栅极之间的距离 n个扩散区域。