High-side driver circuit
    4.
    发明授权
    High-side driver circuit 有权
    高端驱动电路

    公开(公告)号:US08581638B2

    公开(公告)日:2013-11-12

    申请号:US13596113

    申请日:2012-08-28

    IPC分类号: H03B1/00

    摘要: The present invention provides a high-side driver circuit including a power transistor, the first transistor, the second transistor, the second capacitor, the second diode, a start-up circuit. The start-up circuit is coupled between a resistor and the second capacitor to complete a gate driving circuit. And, the aforementioned resistor can either be the gate resistance of the power transistor or an external resistor. The design of start-up circuit enables the functionality of the bootstrap capacitor of being charged to a designate voltage level. Thus, the depletion-mode transistor can be controlled to turn on/off without a floating voltage source or a negative voltage source.

    摘要翻译: 本发明提供一种包括功率晶体管,第一晶体管,第二晶体管,第二电容器,第二二极管,启动电路的高侧驱动电路。 启动电路耦合在电阻器和第二电容器之间以完成栅极驱动电路。 而且,上述电阻可以是功率晶体管的栅极电阻或外部电阻。 启动电路的设计使得自举电容器的功能被充电到指定的电压电平。 因此,耗尽型晶体管可以被控制为在没有浮动电压源或负电压源的情况下导通/截止。

    Current limit circuit apparatus
    5.
    发明授权
    Current limit circuit apparatus 有权
    限流电路装置

    公开(公告)号:US08736349B2

    公开(公告)日:2014-05-27

    申请号:US13596104

    申请日:2012-08-28

    IPC分类号: H03K17/687

    CPC分类号: H03K17/163

    摘要: The present invention provides a current limit circuit apparatus, coupled with the gate of a GaN transistor. The current limit circuit comprises a diode, a first transistor, a second transistor, a first resistor, a second resistor, a third resistor and a fourth resistor. The source and the drain of the first transistor couple with the diode. The source of the second transistor couples with the gate of the first transistor. The source of the first transistor couples with the first transistor. The source of the second transistor couples with the second resistor. The third resistor couples with the fourth resistor and the gate of the first transistor. The first transistor turned off and the gate current is limited. When the current of the gate of the GaN transistor exceeds the predetermined value, the breakdown voltage is increased by limiting the gate current.

    摘要翻译: 本发明提供一种与GaN晶体管的栅极耦合的限流电路装置。 电流限制电路包括二极管,第一晶体管,第二晶体管,第一电阻器,第二电阻器,第三电阻器和第四电阻器。 第一晶体管的源极和漏极与二极管耦合。 第二晶体管的源极与第一晶体管的栅极耦合。 第一晶体管的源极与第一晶体管耦合。 第二晶体管的源极与第二电阻耦合。 第三电阻器与第四电阻器和第一晶体管的栅极耦合。 第一晶体管截止,栅极电流受限。 当GaN晶体管的栅极的电流超过预定值时,通过限制栅极电流来增加击穿电压。

    Method for forming T-shaped gate structure
    6.
    发明授权
    Method for forming T-shaped gate structure 有权
    形成T型门结构的方法

    公开(公告)号:US08435875B1

    公开(公告)日:2013-05-07

    申请号:US13489476

    申请日:2012-06-06

    IPC分类号: H01L21/336

    摘要: A method for forming a T-shaped gate is provided. The method includes providing a substrate. Then, a photoresist structure is formed over the substrate. The photoresist structure includes two development rates. Next, a mask with an opening is formed over the photoresist structure to pattern the photoresist structure. An angle exposure is applied to the photoresist structure, and the exposed photoresist structure is developed to form a T-shaped notch. A width of the T-shaped notch is gradually reduced from a top portion thereof to a bottom portion to expose a surface of the substrate. Then, a gate metal is deposited in the T-shaped notch. Thereafter, the patterned photoresist structure is removed to form the T-shaped gate.

    摘要翻译: 提供一种形成T形门的方法。 该方法包括提供基板。 然后,在衬底上形成光致抗蚀剂结构。 光致抗蚀剂结构包括两个显影速率。 接下来,在光致抗蚀剂结构上形成具有开口的掩模以对光致抗蚀剂结构进行图案化。 对光致抗蚀剂结构施加角度曝光,并且曝光的光致抗蚀剂结构被显影以形成T形凹口。 T形凹口的宽度从其顶部逐渐减小到底部以露出基底的表面。 然后,栅极金属沉积在T形凹口中。 此后,去除图案化的光致抗蚀剂结构以形成T形门。