摘要:
A clock signal supplying method for shift registers includes following steps: receiving a clock signal; and transmitting the clock signal to two first stage signal transmission paths simultaneously, the first stage signal transmission paths determined by a first control signal whether to be conducted, and further conducted at different time.
摘要:
In a liquid crystal display, a flat display and a gate driving method thereof, the flat display comprises first and second pixel rows, first to third gate lines and a gate driving circuit. The first gate line is for determining whether to turn on a portion of pixels in the first pixel row, the second gate line is for determining whether to turn on another portion of pixels in the first pixel row, and the third gate line is for determining whether to turn on a portion of the pixels in the second pixel row. The gate driving circuit is for providing first to third gate driving pulses to the first to third gate lines. The first and second gate driving pulses do not overlap with each other, and the third gate driving pulse partially overlaps with one of the first and second gate driving pulses.
摘要:
A shift register circuit includes a plurality of shift registers. Each of the shift registers is configured for outputting a corresponding start-pulse signal and a corresponding driving-pulse signal. Each of the shift registers includes a pull-up circuit, a first driving circuit, a second driving circuit and a discharging circuit. The pull-up circuit is configured for charging a first node. The first driving circuit is configured for generating the corresponding start-pulse signal, and the second driving circuit is configured for generating the corresponding driving-pulse signal. The discharging circuit firstly discharges the first node before discharging an output terminal of the second driving circuit.
摘要:
The present invention discloses a method for fast detection of node mergers and simplification of a circuit. The steps of the method include: (a) a circuit with a large amount of nodes is provided; (b) a target node is selected for computing mandatory assignments (MAs) of the stuck-at 0 and stuck-at 1 fault tests on the target node respectively by a computer; (c) the MAs of the stuck-at 0 and stuck-at 1 fault tests of the target node are utilized to find substitute nodes; (d) the substitute node that is closest to primary inputs is used to replace the target node; and (e) the steps (b)˜(d) are repeated for removing the replaceable nodes and simplifying the circuit.
摘要:
A PFM control circuit generates a pulse control signal for controlling a switching regulator to convert an input voltage into an output voltage. The pulse control signal has a plurality of switch cycles, each of which consists of an ON-time and an OFF-time. The ON-time is applied to turn on a switching circuit of the switching regulator while the OFF-time is applied to turn off the switching circuit. A current detection signal is representative of a current flowing through an inductive device of the switching regulator. The ON-time is prolonged in accordance with an increase of a maximum of the current detection signal. A voltage detection signal is representative of the output voltage. The OFF-time is prolonged in accordance with a reduction of a falling rate of the voltage detection signal.
摘要:
A synchronous switching voltage converter has a first switch, a second switch, and an inductor, coupled together to a switch node. A reverse current preventing circuit has a fixed reference current source, a correcting circuit, a variable reference current generating circuit, and a comparing circuit. Based on a comparison between an inductor current and the fixed reference current source, the correcting circuit generates a correcting signal. The variable reference current generating circuit generates a variable reference current signal, which is adjusted in accordance with the correcting signal. Based on a comparison between the inductor current and the variable reference current signal, the comparing circuit applies a preventing signal to the second switch so as to turn off the second switch.
摘要:
Being applied to a multi-channel switching voltage converter, an oscillating signal generation circuit includes a rectangular wave oscillator, two frequency dividing units, and four oscillators. The rectangular wave oscillator generates a pair of fundamental rectangular waves having an identical fundamental frequency but 180 degrees out of phase with respect to each other. In response to the pair of fundamental rectangular waves, the two frequency dividing units generate two pairs of auxiliary rectangular waves, each pair having an identical auxiliary frequency but 180 degrees out of phase with respect to each other. The auxiliary frequency is equal to a half of the fundamental frequency. In response to the two pairs of auxiliary rectangular waves, the four oscillators generate four oscillating signals wherein each valley of the oscillating signals is triggered by an edge of the auxiliary rectangular waves.
摘要:
A first to an n-th current sources supply a first to an n-th charging currents, respectively. A sequence control circuit allows an x-th charging current of the first to the n-th charging currents to charge a capacitor for generating an x-th soft-start signal. The variable x is an integer and satisfies an inequality of n≧x≧1. Before a y-th charging current is allowed to charge the capacitor for generating a y-th soft-start signal, the sequence control circuit stops charging the capacitor by the x-th charging current and discharges the capacitor toward a ground potential. The variable y is an integer different from the variable x and satisfies an inequality of n≧y≧1.
摘要:
A linear voltage regulator has a regulating transistor with a first channel electrode receiving an input voltage source and a second electrode providing an output voltage. A control electrode of the regulating transistor is controlled by an error amplifying circuit based on comparison between a feedback signal of the output voltage and a reference voltage. An event detecting circuit is coupled to the input voltage source for detecting occurrence of a transient in the input voltage source. In response to the detected transient event, an enable controlling circuit generates an enable signal for determining an effective operation time of a voltage clamping circuit. During such effective operation time, a potential difference between the first channel electrode and the control electrode is limited within a predetermined clamp voltage for preventing the regulating transistor from being dramatically changed in operation.