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公开(公告)号:US20090209050A1
公开(公告)日:2009-08-20
申请号:US12032973
申请日:2008-02-18
申请人: Yung-Hung Wang , Yu-Jen Wang , Mark Juang , Chia-Shiung Tsai
发明人: Yung-Hung Wang , Yu-Jen Wang , Mark Juang , Chia-Shiung Tsai
IPC分类号: H01L21/00
CPC分类号: H01L27/228 , G11C11/161 , G11C11/1657 , G11C11/1659 , H01L43/08 , H01L43/12
摘要: A method of forming an integrated circuit includes forming magnetic tunnel junction (MTJ) layers; etching the MTJ layers to form a MTJ cell; and forming a dielectric capping layer on sidewalls of the MTJ cell, wherein the step of forming the dielectric capping layer is in-situ performed with the step of etching the MTJ layers.
摘要翻译: 形成集成电路的方法包括形成磁隧道结(MTJ)层; 蚀刻MTJ层以形成MTJ电池; 以及在MTJ电池的侧壁上形成电介质覆盖层,其中形成电介质覆盖层的步骤是用蚀刻MTJ层的步骤进行的。
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公开(公告)号:US07723128B2
公开(公告)日:2010-05-25
申请号:US12032973
申请日:2008-02-18
申请人: Yung-Hung Wang , Yu-Jen Wang , Mark Juang , Chia-Shiung Tsai
发明人: Yung-Hung Wang , Yu-Jen Wang , Mark Juang , Chia-Shiung Tsai
IPC分类号: H01L21/00
CPC分类号: H01L27/228 , G11C11/161 , G11C11/1657 , G11C11/1659 , H01L43/08 , H01L43/12
摘要: A method of forming an integrated circuit includes forming magnetic tunnel junction (MTJ) layers; etching the MTJ layers to form a MTJ cell; and forming a dielectric capping layer on sidewalls of the MTJ cell, wherein the step of forming the dielectric capping layer is in-situ performed with the step of etching the MTJ layers.
摘要翻译: 形成集成电路的方法包括形成磁隧道结(MTJ)层; 蚀刻MTJ层以形成MTJ电池; 以及在MTJ电池的侧壁上形成电介质覆盖层,其中形成电介质覆盖层的步骤是用蚀刻MTJ层的步骤进行的。
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公开(公告)号:US08143683B2
公开(公告)日:2012-03-27
申请号:US12756743
申请日:2010-04-08
申请人: Yung-Hung Wang , Yu-Jen Wang , Mark Juang , Chia-Shiung Tsai
发明人: Yung-Hung Wang , Yu-Jen Wang , Mark Juang , Chia-Shiung Tsai
IPC分类号: H01L29/82
CPC分类号: H01L27/228 , G11C11/161 , G11C11/1657 , G11C11/1659 , H01L43/08 , H01L43/12
摘要: A method of forming an integrated circuit includes forming magnetic tunnel junction (MTJ) layers; etching the MTJ layers to form a MTJ cell; and forming a dielectric capping layer on sidewalls of the MTJ cell, wherein the step of forming the dielectric capping layer is in-situ performed with the step of etching the MTJ layers.
摘要翻译: 形成集成电路的方法包括形成磁隧道结(MTJ)层; 蚀刻MTJ层以形成MTJ电池; 以及在MTJ电池的侧壁上形成电介质覆盖层,其中形成电介质覆盖层的步骤是用蚀刻MTJ层的步骤进行的。
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公开(公告)号:US20100193891A1
公开(公告)日:2010-08-05
申请号:US12756743
申请日:2010-04-08
申请人: Yung-Hung Wang , Yu-Jen Wang , Mark Juang , Chia-Shiung Tsai
发明人: Yung-Hung Wang , Yu-Jen Wang , Mark Juang , Chia-Shiung Tsai
IPC分类号: H01L29/82
CPC分类号: H01L27/228 , G11C11/161 , G11C11/1657 , G11C11/1659 , H01L43/08 , H01L43/12
摘要: A method of forming an integrated circuit includes forming magnetic tunnel junction (MTJ) layers; etching the MTJ layers to form a MTJ cell; and forming a dielectric capping layer on sidewalls of the MTJ cell, wherein the step of forming the dielectric capping layer is in-situ performed with the step of etching the MTJ layers.
摘要翻译: 形成集成电路的方法包括形成磁隧道结(MTJ)层; 蚀刻MTJ层以形成MTJ电池; 以及在MTJ电池的侧壁上形成电介质覆盖层,其中形成电介质覆盖层的步骤是用蚀刻MTJ层的步骤进行的。
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