MRAM cell structure
    5.
    发明授权
    MRAM cell structure 有权
    MRAM单元结构

    公开(公告)号:US08080471B2

    公开(公告)日:2011-12-20

    申请号:US12754451

    申请日:2010-04-05

    IPC分类号: H01L21/4763

    摘要: Disclosed herein is an improved memory device, and related methods of manufacturing, wherein the area occupied by a conventional landing pad is significantly reduced to around 50% to 10% of the area occupied by conventional landing pads. This is accomplished by removing the landing pad from the cell structure, and instead forming a conductive via structure that provides the electrical connection from the memory stack or device in the structure to an under-metal layer. By forming only this via structure, rather than separate vias formed on either side of a landing pad, the overall width occupied by the connective via structure from the memory stack to an under-metal layer is substantially reduced, and thus the via structure and under-metal layer may be formed closer to the memory stack (or conductors associated with the stack) so as to reduce the overall width of the cell structure.

    摘要翻译: 这里公开了一种改进的存储器件和相关的制造方法,其中传统的着陆焊盘占据的面积显着地减少到传统的着陆焊盘占据的面积的大约50%到10%。 这是通过从电池结构中去除着陆焊盘而实现的,而是形成导电通孔结构,其提供从结构中的存储器堆或器件到下金属层的电连接。 通过仅形成该通孔结构,而不是形成在着陆焊盘的任一侧上的分离的通孔,结构通孔结构从存储器堆叠到下金属层占据的总宽度大大减小,因此通孔结构和下面 金属层可以形成为更靠近存储器堆叠(或与堆叠相关联的导体),以便减小电池结构的整体宽度。

    MRAM cell structure
    7.
    发明申请
    MRAM cell structure 有权
    MRAM单元结构

    公开(公告)号:US20120170358A1

    公开(公告)日:2012-07-05

    申请号:US13308065

    申请日:2011-11-30

    摘要: Disclosed herein is an improved memory device, and related methods of manufacturing, wherein the area occupied by a conventional landing pad is significantly reduced to around 50% to 10% of the area occupied by conventional landing pads. This is accomplished by removing the landing pad from the cell structure, and instead forming a conductive via structure that provides the electrical connection from the memory stack or device in the structure to an under-metal layer. By forming only this via structure, rather than separate vias formed on either side of a landing pad, the overall width occupied by the connective via structure from the memory stack to an under-metal layer is substantially reduced, and thus the via structure and under-metal layer may be formed closer to the memory stack (or conductors associated with the stack) so as to reduce the overall width of the cell structure.

    摘要翻译: 这里公开了一种改进的存储器件和相关的制造方法,其中传统的着陆焊盘占据的面积显着地减少到传统的着陆焊盘占据的面积的大约50%到10%。 这是通过从电池结构中移除着陆焊盘而实现的,而是形成导电通孔结构,其提供从结构中的存储器堆或器件到下金属层的电连接。 通过仅形成该通孔结构,而不是形成在着陆焊盘的任一侧上的分离的通孔,结构通孔结构从存储器堆叠到下金属层占据的总宽度大大减小,因此通孔结构和下面 金属层可以形成为更靠近存储器堆叠(或与堆叠相关联的导体),以便减小电池结构的整体宽度。

    MRAM cell structure
    8.
    发明授权
    MRAM cell structure 有权
    MRAM单元结构

    公开(公告)号:US07692230B2

    公开(公告)日:2010-04-06

    申请号:US11674581

    申请日:2007-02-13

    IPC分类号: H01L27/108

    摘要: Disclosed herein is an improved memory device wherein the area occupied by a conventional landing pad is significantly reduced to around 50% to 10% of the area occupied by conventional landing pads. This is accomplished by removing the landing pad from the cell structure, and instead forming a conductive via structure that provides the electrical connection from the memory stack or device in the structure to an under-metal layer. By forming only this via structure, rather than separate vias formed on either side of a landing pad, the overall width occupied by the connective via structure from the memory stack to an under-metal layer is substantially reduced, and thus the via structure and under-metal layer may be formed closer to the memory stack (or conductors associated with the stack) so as to reduce the overall width of the cell structure.

    摘要翻译: 这里公开了一种改进的存储装置,其中由常规着陆垫占据的面积显着地减小到常规着陆垫占据的面积的大约50%至10%。 这是通过从电池结构中移除着陆焊盘而实现的,而是形成导电通孔结构,其提供从结构中的存储器堆或器件到下金属层的电连接。 通过仅形成该通孔结构,而不是形成在着陆焊盘的任一侧上的分离的通孔,结构通孔结构从存储器堆叠到下金属层占据的总宽度大大减小,因此通孔结构和下面 金属层可以形成为更靠近存储器堆叠(或与堆叠相关联的导体),以便减小电池结构的整体宽度。

    MRAM cell structure
    10.
    发明申请

    公开(公告)号:US20110143514A1

    公开(公告)日:2011-06-16

    申请号:US12754451

    申请日:2010-04-05

    IPC分类号: H01L21/28

    摘要: Disclosed herein is an improved memory device, and related methods of manufacturing, wherein the area occupied by a conventional landing pad is significantly reduced to around 50% to 10% of the area occupied by conventional landing pads. This is accomplished by removing the landing pad from the cell structure, and instead forming a conductive via structure that provides the electrical connection from the memory stack or device in the structure to an under-metal layer. By forming only this via structure, rather than separate vias formed on either side of a landing pad, the overall width occupied by the connective via structure from the memory stack to an under-metal layer is substantially reduced, and thus the via structure and under-metal layer may be formed closer to the memory stack (or conductors associated with the stack) so as to reduce the overall width of the cell structure.