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1.发明申请High voltage operating field effect transistor, and bias circuit therefor and high voltage circuit thereof 有权高电压工作场效应晶体管及其偏置电路及其高电压电路公开(公告)号：US20090014816A1
公开(公告)日：2009-01-15
申请号：US12283638
申请日：2008-09-12
IPC分类号： H01L29/78
CPC分类号： H01L29/4238
摘要： A high voltage operating field effect transistor has a substrate and a semiconductor channel formation region disposed in a surface of the substrate. A source region and a drain region are spaced apart from each other with the semiconductor channel formation region disposed between the source region and the drain region. A gate insulating film region is disposed on the semiconductor channel formation region. A resistive gate region is disposed on the gate insulating film region. A source side electrode is disposed on a source region side of the resistive gate region and is operative to receive a signal electric potential. A drain side electrode is disposed on a drain region side of the resistive gate region and is operative to receive a bias electric potential an absolute value of which is equal to or larger than that of a specified electric potential and which changes according to an increase or decrease in a drain electric potential.
摘要翻译： 高电压工作场效应晶体管具有衬底和设置在衬底的表面中的半导体沟道形成区域。 源极区域和漏极区域彼此间隔开，半导体沟道形成区域设置在源极区域和漏极区域之间。 栅极绝缘膜区域设置在半导体沟道形成区域上。 电阻栅极区域设置在栅极绝缘膜区域上。 源极电极设置在电阻栅极区域的源极区域侧并且可操作以接收信号电位。 漏极侧电极设置在电阻栅极区域的漏极侧，并且可操作以接收其绝对值等于或大于指定电位的绝对值的偏置电位，并且其根据增加或 降低漏极电位。
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公开(公告)号：US07190032B2
公开(公告)日：2007-03-13
申请号：US11121319
申请日：2005-05-03
IPC分类号： H01L29/76
CPC分类号： H01L29/78615 , H01L21/84 , H01L27/1203
摘要： An insulated gate transistor has a semiconductor thin film having a first main surface and a second main surface, a first gate insulating film formed on the first main surface of the semiconductor thin film, a first conductive gate formed on the first gate insulating film, first and second confronting semiconductor regions of a first conductivity type insulated from the first conductive gate and disposed in contact with the semiconductor thin film, and a third semiconductor region of a second conductivity type opposite to the first conductivity type disposed in contact with the semiconductor thin film. A gate threshold voltage of the first conductive gate is controlled by a forward bias of the third semiconductor region with respect to one of the first and second semiconductor regions.
摘要翻译： 绝缘栅晶体管具有具有第一主表面和第二主表面的半导体薄膜，形成在半导体薄膜的第一主表面上的第一栅极绝缘膜，形成在第一栅极绝缘膜上的第一导电栅极，第一栅极绝缘膜 以及与第一导电栅绝缘并与半导体薄膜接触的第一导电类型的第二面对半导体区域和与半导体薄膜接触设置的与第一导电类型相反的第二导电类型的第三半导体区域 。 第一导电栅极的栅极阈值电压由第三半导体区域相对于第一和第二半导体区域之一的正向偏压来控制。
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公开(公告)号：US06949777B2
公开(公告)日：2005-09-27
申请号：US10410240
申请日：2003-04-09
IPC分类号： H01L27/08 , H01L21/8234 , H01L21/8238 , H01L21/84 , H01L27/088 , H01L27/092 , H01L27/12 , H01L29/786 , H01L29/76
CPC分类号： H01L29/78615 , H01L21/84 , H01L27/1203
摘要： An insulated gate transistor is comprised of a semiconductor thin film, a first gate insulating film formed on a main surface of the semiconductor thin film, a first conductive gate formed on the first gate insulating film, first and second confronting semiconductor regions of a first conductivity type insulated from the first conductive gate and disposed in contact with the semiconductor thin film, and a third semiconductor region of a second conductivity type opposite to the first conductivity type and disposed in contact with the semiconductor thin film. The insulated gate transistor is controlled by injecting carriers of the second conductivity type into the semiconductor thin film from the third semiconductor region, and thereafter applying a first electric potential to the first conductive gate to form a channel of the first conductivity type on a portion of the semiconductor thin film disposed between the first semiconductor region and the second semiconductor region.
摘要翻译： 绝缘栅极晶体管由半导体薄膜，形成在半导体薄膜的主表面上的第一栅极绝缘膜，形成在第一栅极绝缘膜上的第一导电栅极，第一和第二面对半导体区域构成，第一导电性 与第一导电栅极绝缘并与半导体薄膜接触并且与第一导电类型相反的第二导电类型的第三半导体区域并与半导体薄膜接触。 通过将第二导电类型的载流子从第三半导体区域注入到半导体薄膜中，然后将第一电位施加到第一导电栅极以在第一导电栅极的一部分上形成第一导电类型的沟道来控制绝缘栅晶体管 所述半导体薄膜设置在所述第一半导体区域和所述第二半导体区域之间。
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公开(公告)号：US20050194618A1
公开(公告)日：2005-09-08
申请号：US11121319
申请日：2005-05-03
IPC分类号： H01L27/08 , H01L21/8234 , H01L21/8238 , H01L21/84 , H01L27/088 , H01L27/092 , H01L27/12 , H01L29/786 , H01L27/148
CPC分类号： H01L29/78615 , H01L21/84 , H01L27/1203
摘要： Submitted herewith is a check in the amount of $650.00 to cover the additional fee for thirteen (13) claims in excess of twenty total. Should the check prove insufficient for any reason or should an additional fee be due, authorization is hereby given to charge any such deficiency or additional fee to our Deposit Account No. 01-0268.
摘要翻译： 提交的是支票$ 650.00，以支付超过二十个十三（13）个索赔的额外费用。 如果支票由于任何原因证明不足，或者应该支付额外费用，则授权我们向我们的存款帐户号01-0268收取任何此类不足或额外费用。
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5.发明授权High voltage operating field effect transistor, bias circuit therefor and high voltage circuit thereof 有权高电压工作场效应晶体管，其偏置电路及其高电压电路公开(公告)号：US07545018B2
公开(公告)日：2009-06-09
申请号：US11063388
申请日：2005-02-22
IPC分类号： H01L29/00
CPC分类号： H01L27/0629 , H01L27/092 , H01L27/1203 , H01L29/7831 , H01L29/7838 , H01L29/78645 , H01L29/78654
摘要： A high voltage operating field effect transistor has a substrate, a source region and a drain region which are spaced apart from each other in a surface of the substrate, a semiconductor channel formation region disposed in the surface of the substrate between the source region and the drain region, a gate region disposed above the channel formation region, and a gate insulating film region disposed between the channel formation region and the gate region. At least one of a signal electric potential and a signal current is supplied to the source region, and a bias electric potential having an absolute value equal to or larger than a first constant electric potential which changes according to an increase or decrease in a drain electric potential is supplied to the gate region. One end of a rectifying device is connected to the gate region, and a second constant electric potential is supplied to the other end of the rectifying device.
摘要翻译： 高电压工作场效应晶体管具有在基板的表面上彼此间隔开的基板，源极区域和漏极区域，设置在基板的表面中的源极区域与源极区域之间的半导体沟道形成区域， 漏极区域，设置在沟道形成区域上方的栅极区域和设置在沟道形成区域和栅极区域之间的栅极绝缘膜区域。 将信号电位和信号电流中的至少一个提供给源极区域，并且具有绝对值等于或大于根据漏极电流的增减的第一恒定电位变化的偏置电位 电位被提供给栅极区域。 整流装置的一端与栅极区域连接，第二恒定电位被提供给整流装置的另一端。
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6.发明申请High voltage operating field effect transistor, bias circuit therefor and high voltage circuit thereof 有权高电压工作场效应晶体管，其偏置电路及其高电压电路公开(公告)号：US20090014765A1
公开(公告)日：2009-01-15
申请号：US12283639
申请日：2008-09-12
CPC分类号： H01L27/0629 , H01L27/092 , H01L27/1203 , H01L29/7831 , H01L29/7838 , H01L29/78645 , H01L29/78654
摘要： A high voltage operating field effect transistor has a source region and a drain region spaced apart from each other in a surface of a substrate. The source region is operative to receive at least one of a signal electric potential and a signal current. A semiconductor channel formation region is disposed in the surface of the substrate between the source region and the drain region. A gate region is disposed above the channel formation region and is operative to receive a bias electric potential having an absolute value equal to or larger than a first constant electric potential which changes according to an increase or decrease in a drain electric potential. A gate insulating film region is disposed between the channel formation region and the gate region.
摘要翻译： 高电压工作场效应晶体管具有在衬底的表面中彼此间隔开的源极区和漏极区。 源区域可操作以接收信号电位和信号电流中的至少一个。 半导体沟道形成区域设置在源极区域和漏极区域之间的衬底的表面中。 栅极区域设置在沟道形成区域上方，并且可操作以接收具有等于或大于根据漏极电位的增加或减小而改变的第一恒定电位的绝对值的偏置电位。 栅极绝缘膜区域设置在沟道形成区域和栅极区域之间。
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7.发明授权Thin film memory, array, and operation method and manufacture method therefor 有权薄膜记忆体，阵列及其操作方法及制造方法公开(公告)号：US07211867B2
公开(公告)日：2007-05-01
申请号：US10879938
申请日：2004-06-28
IPC分类号： H01L27/01
CPC分类号： H01L27/1203 , H01L21/84 , H01L27/10802 , H01L27/10844 , Y10S257/908
摘要： A memory cell which is formed on a fully depleted SOI or other semiconductor thin film and which operates at low voltage without needing a conventional large capacitor is provided as well as a memory cell array. The semiconductor thin film is sandwiched between first and second semiconductor regions which face each other across the semiconductor thin film and which have a first conductivity type. A third semiconductor region having the opposite conductivity type is provided in an extended portion of the semiconductor thin film. From the third semiconductor region, carriers of the opposite conductivity type are supplied to and accumulated in the semiconductor thin film portion to change the gate threshold voltage of a first conductivity type channel that is induced by a first conductive gate voltage in the semiconductor thin film between the first and second semiconductor regions through an insulating film.
摘要翻译： 提供了形成在完全耗尽的SOI或其他半导体薄膜上并且在低电压下工作而不需要常规的大电容器的存储单元以及存储单元阵列。 半导体薄膜被夹在半导体薄膜之间并且具有第一导电类型的第一和第二半导体区域之间。 具有相反导电类型的第三半导体区域设置在半导体薄膜的延伸部分中。 从第三半导体区域，将相反导电类型的载流子提供给并累积在半导体薄膜部分中，以改变由半导体薄膜中的第一导电栅极电压感应的第一导电类型沟道的栅极阈值电压 通过绝缘膜的第一和第二半导体区域。
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8.发明申请High voltage operating field effect transistor, bias circuit therefor and high voltage circuit thereof 有权高电压工作场效应晶体管，其偏置电路及其高电压电路公开(公告)号：US20050184349A1
公开(公告)日：2005-08-25
申请号：US11063388
申请日：2005-02-22
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8234 , H01L21/8238 , H01L27/06 , H01L27/08 , H01L27/092 , H01L27/12 , H01L29/76 , H01L29/78 , H01L29/786
CPC分类号： H01L27/0629 , H01L27/092 , H01L27/1203 , H01L29/7831 , H01L29/7838 , H01L29/78645 , H01L29/78654
摘要： A high voltage operating field effect transistor is formed in an IC or LSI by utilizing a constituent portion of a transistor or a process technique for a standard power supply voltage of the IC or LSI. In order to increase an operating voltage of a field effect transistor, measures are taken in which a gate is divided into division gates, and electric potentials which are closer to a drain electric potential and which change according to increase or decrease in the drain electric potential are supplied to the division gates nearer a drain, respectively.
摘要翻译： 通过利用晶体管的组成部分或IC或LSI的标准电源电压的处理技术，在IC或LSI中形成高电压工作场效应晶体管。 为了提高场效应晶体管的工作电压，采取将栅极分割成分割栅极的电位和更接近漏极电位并根据漏极电位的增加或减少而变化的电位的措施 分别被提供给更靠近排水沟的分隔门。
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9.发明申请Thin film memory, array, and operation method and manufacture method therefor 有权薄膜记忆体，阵列及其操作方法及制造方法公开(公告)号：US20050001269A1
公开(公告)日：2005-01-06
申请号：US10879938
申请日：2004-06-28
IPC分类号： G11C16/04 , H01L21/8242 , H01L27/108 , H01L29/792
CPC分类号： H01L27/1203 , H01L21/84 , H01L27/10802 , H01L27/10844 , Y10S257/908
摘要： A memory cell which is formed on a fully depleted SOI or other semiconductor thin film and which operates at low voltage without needing a conventional large capacitor is provided as well as a memory cell array. The semiconductor thin film is sandwiched between first and second semiconductor regions which face each other across the semiconductor thin film and which have a first conductivity type. A third semiconductor region having the opposite conductivity type is provided in an extended portion of the semiconductor thin film. From the third semiconductor region, carriers of the opposite conductivity type are supplied to and accumulated in the semiconductor thin film portion to change the gate threshold voltage of a first conductivity type channel that is induced by a first conductive gate voltage in the semiconductor thin film between the first and second semiconductor regions through an insulating film.
摘要翻译： 提供了形成在完全耗尽的SOI或其他半导体薄膜上并且在低电压下工作而不需要常规的大电容器的存储单元以及存储单元阵列。 半导体薄膜被夹在半导体薄膜之间并且具有第一导电类型的第一和第二半导体区域之间。 具有相反导电类型的第三半导体区域设置在半导体薄膜的延伸部分中。 从第三半导体区域，将相反导电类型的载流子提供给并累积在半导体薄膜部分中，以改变由半导体薄膜中的第一导电栅极电压感应的第一导电类型沟道的栅极阈值电压 通过绝缘膜的第一和第二半导体区域。
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10.发明授权High voltage operating field effect transistor, and bias circuit therefor and high voltage circuit thereof 有权高电压工作场效应晶体管及其偏置电路及其高电压电路公开(公告)号：US07432568B2
公开(公告)日：2008-10-07
申请号：US11063468
申请日：2005-02-22
IPC分类号： H01L29/76
CPC分类号： H01L29/4238
摘要： A high voltage operating field effect transistor has a substrate, a semiconductor channel formation region disposed in a surface of the substrate, a source region and a drain region which are spaced apart from each other with the semiconductor channel formation region disposed between the source region and the drain region, a gate insulating film region disposed on the semiconductor channel formation region, a resistive gate region disposed on the gate insulating film region, a source side electrode disposed on a source region end portion side of the resistive gate region, and a drain side electrode disposed on a drain region end portion side of the resistive gate region. A signal electric potential is supplied to the source side electrode, and a bias electric potential an absolute value of which is equal to or larger than that of a specified electric potential and which changes according to an increase or decrease in a drain electric potential is supplied to the drain side electrode.
摘要翻译： 高电压工作场效应晶体管具有衬底，设置在衬底的表面中的半导体沟道形成区域，源极区域和漏极区域，其中半导体沟道形成区域设置在源极区域和源极区域之间， 漏极区域，设置在半导体沟道形成区域上的栅极绝缘膜区域，设置在栅极绝缘膜区域上的电阻栅极区域，设置在电阻栅极区域的源极区域端部侧的源极侧电极，以及漏极区域 设置在电阻栅极区域的漏区端部侧的侧面电极。 信号电位被提供给源极电极，并且提供绝对值等于或大于指定电位并且根据漏极电位的增加或减小而变化的偏置电位 到漏极侧电极。
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