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公开(公告)号：US08008760B2
公开(公告)日：2011-08-30
申请号：US12370927
申请日：2009-02-13
IPC分类号： H01L23/02
CPC分类号： H01L25/0655 , B81B7/0054 , B81C1/00238 , H01L21/568 , H01L21/6835 , H01L23/5389 , H01L24/19 , H01L24/82 , H01L25/16 , H01L2224/04105 , H01L2224/12105 , H01L2224/24137 , H01L2224/92144 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/10329 , H01L2924/12044 , H01L2924/14 , H01L2924/1461 , H01L2924/15311 , H01L2924/15331 , H01L2924/30105 , H01L2924/3511 , H01L2924/00
摘要： An integrated semiconductor device includes a plurality of semiconductor elements having different integrated element circuits or different sizes; an insulating material arranged between the semiconductor elements; an organic insulating film arranged entirely on the semiconductor elements and the insulating material; a fine thin-layer wiring that arranged on the organic insulating film and connects the semiconductor elements; a first input/output electrode arranged on an area of the insulating material; and a first bump electrode formed on the first input/output electrode.
摘要翻译： 集成半导体器件包括具有不同集成元件电路或不同尺寸的多个半导体元件; 布置在所述半导体元件之间的绝缘材料; 完全设置在半导体元件和绝缘材料上的有机绝缘膜; 布置在有机绝缘膜上并连接半导体元件的精细薄层布线; 布置在所述绝缘材料的区域上的第一输入/输出电极; 以及形成在所述第一输入/输出电极上的第一凸块电极。
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公开(公告)号：US20090050988A1
公开(公告)日：2009-02-26
申请号：US12195587
申请日：2008-08-21
申请人： Kazuhiro Suzuki , Michihiko Nishigaki , Yutaka Onozuka , Hiroshi Yamada , Kazuhiko Itaya , Hideyuki Funaki
发明人： Kazuhiro Suzuki , Michihiko Nishigaki , Yutaka Onozuka , Hiroshi Yamada , Kazuhiko Itaya , Hideyuki Funaki
CPC分类号： B81C1/00269 , B81C2203/0145
摘要： A MEMS apparatus includes a MEMS unit formed on a semiconductor substrate and a cover provided with a pore and serving to seal the MEMS unit. The pore is sealed with a sealing material shaped in a sphere or a hemisphere.
摘要翻译： MEMS器件包括形成在半导体衬底上的MEMS单元和设置有孔并用于密封MEMS单元的盖。 孔用密封材料密封，形状为球形或半球形。
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公开(公告)号：US20080318356A1
公开(公告)日：2008-12-25
申请号：US12200177
申请日：2008-08-28
IPC分类号： H01L21/58
CPC分类号： B81C1/0023 , B81C1/00246 , B81C2201/019 , B81C2203/0771 , H01L24/19 , H01L24/24 , H01L24/96 , H01L2224/04105 , H01L2224/12105 , H01L2224/24137 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01041 , H01L2924/01042 , H01L2924/01047 , H01L2924/01057 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10253 , H01L2924/10329 , H01L2924/1461 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/351 , H01L2924/3511 , H01L2924/00
摘要： It is made possible to provide a highly integrated, thin apparatus can be obtained, even if the apparatus contains MEMS devices and semiconductor devices. A semiconductor apparatus includes: a first chip comprising a MEMS device formed therein; a second chip comprising a semiconductor device formed therein; and an adhesive layer bonding a side face of the first chip to a side face of the second chip, and having a lower Young's modulus than the material of the first and second chips.
摘要翻译： 即使该装置包含MEMS器件和半导体器件，也可以获得高集成度的薄的器件。 一种半导体装置包括：第一芯片，其包括形成在其中的MEMS器件; 包括其中形成的半导体器件的第二芯片; 以及将第一芯片的侧面接合到第二芯片的侧面并且具有比第一芯片和第二芯片的材料更低的杨氏模量的粘合剂层。
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公开(公告)号：US07906823B2
公开(公告)日：2011-03-15
申请号：US12195587
申请日：2008-08-21
申请人： Kazuhiro Suzuki , Michihiko Nishigaki , Yutaka Onozuka , Hiroshi Yamada , Kazuhiko Itaya , Hideyuki Funaki
发明人： Kazuhiro Suzuki , Michihiko Nishigaki , Yutaka Onozuka , Hiroshi Yamada , Kazuhiko Itaya , Hideyuki Funaki
IPC分类号： H01L29/84
CPC分类号： B81C1/00269 , B81C2203/0145
摘要： A MEMS apparatus includes a MEMS unit formed on a semiconductor substrate and a cover provided with a pore and serving to seal the MEMS unit. The pore is sealed with a sealing material shaped in a sphere or a hemisphere.
摘要翻译： MEMS器件包括形成在半导体衬底上的MEMS单元和设置有孔并用于密封MEMS单元的盖。 孔用密封材料密封，形状为球形或半球形。
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公开(公告)号：US07875481B2
公开(公告)日：2011-01-25
申请号：US12200177
申请日：2008-08-28
IPC分类号： H01L21/00
CPC分类号： B81C1/0023 , B81C1/00246 , B81C2201/019 , B81C2203/0771 , H01L24/19 , H01L24/24 , H01L24/96 , H01L2224/04105 , H01L2224/12105 , H01L2224/24137 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01041 , H01L2924/01042 , H01L2924/01047 , H01L2924/01057 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10253 , H01L2924/10329 , H01L2924/1461 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/351 , H01L2924/3511 , H01L2924/00
摘要： It is made possible to provide a highly integrated, thin apparatus can be obtained, even if the apparatus contains MEMS devices and semiconductor devices. A semiconductor apparatus includes: a first chip comprising a MEMS device formed therein; a second chip comprising a semiconductor device formed therein; and an adhesive layer bonding a side face of the first chip to a side face of the second chip, and having a lower Young's modulus than the material of the first and second chips.
摘要翻译： 即使该装置包含MEMS器件和半导体器件，也可以获得高度集成的薄型器件。 一种半导体装置包括：第一芯片，其包括形成在其中的MEMS器件; 包括其中形成的半导体器件的第二芯片; 以及将第一芯片的侧面接合到第二芯片的侧面并且具有比第一芯片和第二芯片的材料更低的杨氏模量的粘合剂层。
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公开(公告)号：US20070273018A1
公开(公告)日：2007-11-29
申请号：US11678996
申请日：2007-02-26
CPC分类号： B81C1/0023 , B81C1/00246 , B81C2201/019 , B81C2203/0771 , H01L24/19 , H01L24/24 , H01L24/96 , H01L2224/04105 , H01L2224/12105 , H01L2224/24137 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01041 , H01L2924/01042 , H01L2924/01047 , H01L2924/01057 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10253 , H01L2924/10329 , H01L2924/1461 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/351 , H01L2924/3511 , H01L2924/00
摘要： It is made possible to provide a highly integrated, thin apparatus can be obtained, even if the apparatus contains MEMS devices and semiconductor devices. A semiconductor apparatus includes: a first chip comprising a MEMS device formed therein; a second chip comprising a semiconductor device formed therein; and an adhesive layer bonding a side face of the first chip to a side face of the second chip, and having a lower Young's modulus than the material of the first and second chips.
摘要翻译： 即使该装置包含MEMS器件和半导体器件，也可以获得高度集成的薄型器件。 一种半导体装置包括：第一芯片，其包括形成在其中的MEMS器件; 包括其中形成的半导体器件的第二芯片; 以及将第一芯片的侧面接合到第二芯片的侧面并且具有比第一芯片和第二芯片的材料更低的杨氏模量的粘合剂层。
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公开(公告)号：US09284186B2
公开(公告)日：2016-03-15
申请号：US13625249
申请日：2012-09-24
申请人： Hiroshi Yamada , Hideyuki Funaki , Kazuhiro Suzuki , Kazuhiko Itaya , Armon Mahajerin , Kevin Limkrailassiri , Liwei Lin
发明人： Hiroshi Yamada , Hideyuki Funaki , Kazuhiro Suzuki , Kazuhiko Itaya , Armon Mahajerin , Kevin Limkrailassiri , Liwei Lin
IPC分类号： B81C1/00
CPC分类号： B81C1/00182
摘要： After a TEOS oxide film is formed on the surface of a semiconductor device, a PSG film and an SiN film, which have air permeability, are formed on the surface of the TEOS oxide film. Thereafter, a Poly-Si film is formed thereon. A sacrifice layer is removed by a gaseous HF that passes through the PSG film, the SiN film, and the Poly-Si film, and then, the uppermost layer is covered with a Poly-Si/SiC film. A chip scale package having a thin-film hollow-seal structure can be realized on the semiconductor element.
摘要翻译： 在半导体器件的表面上形成TEOS氧化物膜之后，在TEOS氧化物膜的表面上形成具有透气性的PSG膜和SiN膜。 此后，在其上形成多晶硅膜。 通过通过PSG膜，SiN膜和Poly-Si膜的气态HF除去牺牲层，然后用Poly-Si / SiC膜覆盖最上层。 可以在半导体元件上实现具有薄膜中空密封结构的芯片级封装。
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公开(公告)号：US20140084392A1
公开(公告)日：2014-03-27
申请号：US13625249
申请日：2012-09-24
申请人： Hiroshi Yamada , Hideyuki Funaki , Kazuhiro Suzuki , Kazuhiko Itaya , Armon Mahajerin , Kevin Limkrailassiri , Liwei Lin
发明人： Hiroshi Yamada , Hideyuki Funaki , Kazuhiro Suzuki , Kazuhiko Itaya , Armon Mahajerin , Kevin Limkrailassiri , Liwei Lin
CPC分类号： B81C1/00182
摘要： After a TEOS oxide film is formed on the surface of a semiconductor device, a PSG film and an SiN film, which have air permeability, are formed on the surface of the TEOS oxide film. Thereafter, a Poly-Si film is formed thereon. A sacrifice layer is removed by a gaseous HF that passes through the PSG film, the SiN film, and the Poly-Si film, and then, the uppermost layer is covered with a Poly-Si/SiC film. A chip scale package having a thin-film hollow-seal structure can be realized on the semiconductor element.
摘要翻译： 在半导体器件的表面上形成TEOS氧化物膜之后，在TEOS氧化物膜的表面上形成具有透气性的PSG膜和SiN膜。 此后，在其上形成多晶硅膜。 通过通过PSG膜，SiN膜和Poly-Si膜的气态HF除去牺牲层，然后用Poly-Si / SiC膜覆盖最上层。 可以在半导体元件上实现具有薄膜中空密封结构的芯片级封装。
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9.发明授权公开(公告)号：US07893525B2
公开(公告)日：2011-02-22
申请号：US12350727
申请日：2009-01-08
申请人： Atsuko Iida , Yutaka Onozuka , Kazuhiko Itaya
发明人： Atsuko Iida , Yutaka Onozuka , Kazuhiko Itaya
IPC分类号： H01L21/98
CPC分类号： B81C1/00253 , B81C1/00238 , H01L21/568 , H01L23/295 , H01L23/3135 , H01L24/19 , H01L24/96 , H01L2224/04105 , H01L2224/24137 , H01L2224/24195 , H01L2924/10253 , H01L2924/1461 , H01L2924/15788 , H01L2924/18162 , H01L2924/19105 , H01L2924/3511 , H01L2924/00
摘要： It is made possible to restrict warpage at the time of resin cure and achieve a smaller thickness. A semiconductor device includes: a first chip including a MEMS device and a first pad formed on an upper face of the MEMS device, the first pad being electrically connected to the MEMS device; a second chip including a semiconductor device and a second pad formed on an upper face of the semiconductor device, the second pad being electrically connected to the semiconductor device; and an adhesive portion having a stacked structure, and bonding a side face of the first chip and a side face of the second chip, the stacked structure including a first adhesive film formed by adding a first material constant modifier to a first resin, and a second adhesive film formed by adding a second material constant modifier to a second resin.
摘要翻译： 可以在树脂固化时限制翘曲并实现更小的厚度。 半导体器件包括：第一芯片，其包括MEMS器件和形成在MEMS器件的上表面上的第一焊盘，第一焊盘电连接到MEMS器件; 包括半导体器件的第二芯片和形成在所述半导体器件的上表面上的第二焊盘，所述第二焊盘电连接到所述半导体器件; 以及具有堆叠结构的粘合部分，并且将第一芯片的侧面和第二芯片的侧面接合，所述堆叠结构包括通过将第一材料常数改性剂添加到第一树脂而形成的第一粘合膜，以及 通过将第二材料常数改性剂加入到第二树脂中形成的第二粘合剂膜。
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公开(公告)号：US20090179317A1
公开(公告)日：2009-07-16
申请号：US12350727
申请日：2009-01-08
申请人： Atsuko Iida , Yutaka Onozuka , Kazuhiko Itaya
发明人： Atsuko Iida , Yutaka Onozuka , Kazuhiko Itaya
CPC分类号： B81C1/00253 , B81C1/00238 , H01L21/568 , H01L23/295 , H01L23/3135 , H01L24/19 , H01L24/96 , H01L2224/04105 , H01L2224/24137 , H01L2224/24195 , H01L2924/10253 , H01L2924/1461 , H01L2924/15788 , H01L2924/18162 , H01L2924/19105 , H01L2924/3511 , H01L2924/00
摘要： It is made possible to restrict warpage at the time of resin cure and achieve a smaller thickness. A semiconductor device includes: a first chip including a MEMS device and a first pad formed on an upper face of the MEMS device, the first pad being electrically connected to the MEMS device; a second chip including a semiconductor device and a second pad formed on an upper face of the semiconductor device, the second pad being electrically connected to the semiconductor device; and an adhesive portion having a stacked structure, and bonding a side face of the first chip and a side face of the second chip, the stacked structure including a first adhesive film formed by adding a first material constant modifier to a first resin, and a second adhesive film formed by adding a second material constant modifier to a second resin.
摘要翻译： 可以在树脂固化时限制翘曲并实现更小的厚度。 半导体器件包括：第一芯片，其包括MEMS器件和形成在MEMS器件的上表面上的第一焊盘，第一焊盘电连接到MEMS器件; 包括半导体器件的第二芯片和形成在所述半导体器件的上表面上的第二焊盘，所述第二焊盘电连接到所述半导体器件; 以及具有堆叠结构的粘合部分，并且将第一芯片的侧面和第二芯片的侧面接合，所述堆叠结构包括通过将第一材料常数改性剂添加到第一树脂而形成的第一粘合膜，以及 通过将第二材料常数改性剂加入到第二树脂中形成的第二粘合剂膜。
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