-
1.发明授权Maintaining integrity of preloaded content in non-volatile memory during surface mounting 有权在表面安装期间保持非易失性存储器中预加载内容的完整性公开(公告)号：US08179717B2
公开(公告)日：2012-05-15
申请号：US12569869
申请日：2009-09-29
申请人： Zac Shepard , Xiaoyu Yang , Albert Meeks , Qing Li , Enosh Levi , Kim Le , Raz Dan , Brian Murphy
发明人： Zac Shepard , Xiaoyu Yang , Albert Meeks , Qing Li , Enosh Levi , Kim Le , Raz Dan , Brian Murphy
CPC分类号： G11C11/5621 , H01L21/563 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/45 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48227 , H01L2224/73204 , H01L2225/06562 , H01L2924/01013 , H01L2924/01077 , H01L2924/01079 , H01L2924/014 , H01L2924/07802 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A non-volatile memory chip package is prepared for surface mounting to a substrate in a solder reflow process by programming erased blocks to higher threshold voltage levels, to improve data retention for blocks which are preloaded with content, such as by an electronic device manufacturer. Following the surface mounting, the previously-erased blocks are returned to the erased state. The threshold voltage of storage elements of the preloaded blocks can change during the surface mounting process due to a global charge effect phenomenon. The effect is most prominent for higher state storage elements which are surrounded by erased blocks, in a chip for which the wafer backside was thinned and polished. The erased blocks can be programmed using a single program pulse without performing a verify operation, as a wide threshold voltage distribution is acceptable.
摘要翻译： 通过将擦除的块编程为更高的阈值电压电平来准备用于在焊料回流过程中表面安装到衬底的非易失性存储器芯片封装，以改善例如由电子器件制造商预装载内容的块的数据保留。 在表面安装之后，先前擦除的块返回到擦除状态。 由于全局充电效应现象，预载块的存储元件的阈值电压可能在表面贴装过程中发生变化。 对于被擦除块包围的较高状态存储元件，晶片背面被薄化和抛光的芯片中的效果最为突出。 擦除的块可以使用单个编程脉冲编程，而不执行验证操作，因为宽的阈值电压分布是可接受的。
-
2.发明申请MAINTAINING INTEGRITY OF PRELOADED CONTENT IN NON-VOLATILE MEMORY DURING SURFACE MOUNTING 有权在表面安装期间保持非易失性存储器中预测内容的完整性公开(公告)号：US20110075482A1
公开(公告)日：2011-03-31
申请号：US12569869
申请日：2009-09-29
申请人： Zac Shepard , Xiaoyu Yang , Albert Meeks , Qing Li , Enosh Levi , Kim Le , Raz Dan , Brian Murphy
发明人： Zac Shepard , Xiaoyu Yang , Albert Meeks , Qing Li , Enosh Levi , Kim Le , Raz Dan , Brian Murphy
CPC分类号： G11C11/5621 , H01L21/563 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/45 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48227 , H01L2224/73204 , H01L2225/06562 , H01L2924/01013 , H01L2924/01077 , H01L2924/01079 , H01L2924/014 , H01L2924/07802 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A non-volatile memory chip package is prepared for surface mounting to a substrate in a solder reflow process by programming erased blocks to higher threshold voltage levels, to improve data retention for blocks which are preloaded with content, such as by an electronic device manufacturer. Following the surface mounting, the previously-erased blocks are returned to the erased state. The threshold voltage of storage elements of the preloaded blocks can change during the surface mounting process due to a global charge effect phenomenon. The effect is most prominent for higher state storage elements which are surrounded by erased blocks, in a chip for which the wafer backside was thinned and polished. The erased blocks can be programmed using a single program pulse without performing a verify operation, as a wide threshold voltage distribution is acceptable.
摘要翻译： 通过将擦除的块编程为更高的阈值电压电平来准备用于在焊料回流过程中表面安装到衬底的非易失性存储器芯片封装，以改善例如由电子器件制造商预装载内容的块的数据保留。 在表面安装之后，先前擦除的块返回到擦除状态。 由于全局充电效应现象，预载块的存储元件的阈值电压可能在表面贴装过程中发生变化。 对于被擦除块包围的较高状态存储元件，晶片背面被薄化和抛光的芯片中的效果最为突出。 擦除的块可以使用单个编程脉冲编程，而不执行验证操作，因为宽的阈值电压分布是可接受的。
-
3.发明申请公开(公告)号：US20130279248A1
公开(公告)日：2013-10-24
申请号：US13453921
申请日：2012-04-23
IPC分类号： G11C16/04
CPC分类号： G11C11/5628 , G11C16/0483 , G11C16/3418 , G11C16/349 , G11C2211/5641
摘要： In a nonvolatile memory that stores data in two or more different data storage formats, such as binary and MLC, a separation scheme is used to distribute blocks containing data in one data storage format (e.g. binary) so that they are separated by at least some minimum number of blocks using another data storage format (e.g. MLC).
摘要翻译： 在将数据存储在诸如二进制和MLC之类的两种或多种不同数据存储格式的非易失性存储器中，分离方案用于分发包含一种数据存储格式（例如二进制）的数据的块，使得它们被至少一些 使用其他数据存储格式的最小块数（例如MLC）。
-
4.发明授权公开(公告)号：US08995183B2
公开(公告)日：2015-03-31
申请号：US13453921
申请日：2012-04-23
CPC分类号： G11C11/5628 , G11C16/0483 , G11C16/3418 , G11C16/349 , G11C2211/5641
摘要： In a nonvolatile memory that stores data in two or more different data storage formats, such as binary and MLC, a separation scheme is used to distribute blocks containing data in one data storage format (e.g. binary) so that they are separated by at least some minimum number of blocks using another data storage format (e.g. MLC).
摘要翻译： 在将数据存储在诸如二进制和MLC之类的两种或多种不同数据存储格式的非易失性存储器中，分离方案用于分发包含一种数据存储格式（例如二进制）的数据的块，使得它们被至少一些 使用其他数据存储格式的最小块数（例如MLC）。
-
公开(公告)号：US20130282958A1
公开(公告)日：2013-10-24
申请号：US13453898
申请日：2012-04-23
IPC分类号： G06F12/00
CPC分类号： G06F12/0238 , G06F12/0246 , G11C5/005 , G11C11/5628 , G11C16/10 , G11C16/349
摘要： In a nonvolatile memory array, blocks that contain only obsolete data are modified by adding charge to their cells, increasing the charge level from the programmed charge levels that represented obsolete data to elevated charge levels. The increase in overall charge in such blocks lessens the tendency of such blocks to impact data retention in neighboring blocks.
摘要翻译： 在非易失性存储器阵列中，仅包含过时数据的块通过向其单元添加电荷来修改，从将代表过时数据的程序化电荷电平增加到升高的电荷电平。 这些块中的总体电荷的增加减少了这种块在相邻块中影响数据保留的趋势。
-
公开(公告)号：US08732391B2
公开(公告)日：2014-05-20
申请号：US13453898
申请日：2012-04-23
CPC分类号： G06F12/0238 , G06F12/0246 , G11C5/005 , G11C11/5628 , G11C16/10 , G11C16/349
摘要： In a nonvolatile memory array, blocks that contain only obsolete data are modified by adding charge to their cells, increasing the charge level from the programmed charge levels that represented obsolete data to elevated charge levels. The increase in overall charge in such blocks lessens the tendency of such blocks to impact data retention in neighboring blocks.
摘要翻译： 在非易失性存储器阵列中，仅包含过时数据的块通过向其单元添加电荷来修改，从将代表过时数据的程序化电荷电平增加到升高的电荷电平。 这些块中的总体电荷的增加减少了这种块在相邻块中影响数据保留的趋势。
-
-
-
-
-
搜索结果
6 条记录 (耗时 0.027 秒)
