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公开(公告)号:US20130148824A1
公开(公告)日:2013-06-13
申请号:US13666151
申请日:2012-11-01
发明人: Don Hyoung Lee , Dong Ju Lee , Tae Hwan Park , Dae Sung Kim , Jeong Hwan Hwang , Yong Yeon Kim
IPC分类号: H03G3/20
CPC分类号: H03G3/3005 , H03G3/3089 , H04R2420/01 , H04S2400/09 , H04S2400/13
摘要: Disclosed is an auto volume control method and system for mixing of sound sources. The control method and system mixes the sound sources by controlling signals of the sound sources automatically inputted by a simple control method, such that the signals from a plurality of sound sources are mixed to prevent an overflow phenomenon of the sound sources from occurring.
摘要翻译: 公开了一种用于混合声源的自动音量控制方法和系统。 控制方法和系统通过控制通过简单控制方法自动输入的声源的信号来混合声源,使得来自多个声源的信号被混合以防止发生声源的溢出现象。
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公开(公告)号:US20120143431A1
公开(公告)日:2012-06-07
申请号:US13173461
申请日:2011-06-30
申请人: Sang Ki Kim , Suk Young Rho , Don Hyoung Lee , Jeong Hwan Hwang , Jeong Yeol Kim , Seong Il Kim
发明人: Sang Ki Kim , Suk Young Rho , Don Hyoung Lee , Jeong Hwan Hwang , Jeong Yeol Kim , Seong Il Kim
IPC分类号: G06F7/00
CPC分类号: G05B23/0216
摘要: The present invention provides a diagnostic apparatus using a microphone. More specifically, the diagnostic apparatus utilizes a first microphone, a second microphone, a first unit, a controller and second unit. The first microphone is positioned within an engine compartment and the second microphone is positioned within an interior of a vehicle to receive the noise. The second unit records the noise inputted through the first microphone or the second microphone or both and the controller analyzes and diagnoses a vehicle utilizing the noise recorded by the first unit to determine if a failure in the vehicle has occurred. When a vehicle failure is detected by the controller, the second unit then notifies a user of the location of a failed part in the vehicle.
摘要翻译: 本发明提供一种使用麦克风的诊断装置。 更具体地,诊断装置利用第一麦克风,第二麦克风,第一单元,控制器和第二单元。 第一麦克风位于发动机舱内,第二麦克风位于车辆的内部以接收噪音。 第二单元记录通过第一麦克风或第二麦克风或两者输入的噪声,并且控制器利用由第一单元记录的噪声来分析和诊断车辆,以确定车辆是否发生故障。 当控制器检测到车辆故障时,第二单元然后向用户通知车辆中故障部件的位置。
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公开(公告)号:US07840080B1
公开(公告)日:2010-11-23
申请号:US09657573
申请日:2000-09-08
申请人: Young Su Lee
发明人: Young Su Lee
IPC分类号: G06K9/46
CPC分类号: H04N19/43 , H04N19/436 , H04N19/523
摘要: An adaptable motion estimator architecture for low bit rate image communication 1) to be compatible with image characteristic and bit rate with a reduced hardware size and 2) to optimize performance of the motion estimator by selectively applying a search method suitable for a low bit rate image characteristic and an encoder performance.The motion estimator multiplexes a previous search window memory data from DRAM and a current macro block data for finding motion vectors to conform to each data processing elements (PE0-PE8) and comparatively detecting MAE (Mean Absolute Error) of each motion vector with a previous frame data and a current frame data to find a motion vector having a least MAE.The motion estimator may be applied to an image phone which requires high encoding efficiency due to small hardware and may be applied to all video encoders conforming to H.261/H.263 and MPEG.
摘要翻译: 用于低比特率图像通信的适应性运动估计器架构1)与降低的硬件尺寸的图像特性和比特率兼容,以及2)通过选择性地应用适合于低比特率图像的搜索方法来优化运动估计器的性能 特性和编码器性能。 运动估计器将来自DRAM的先前搜索窗口存储器数据和用于找到运动矢量的当前宏块数据多路复用以符合每个数据处理元件(PE0-PE8),并且比较地检测每个运动矢量的MAE(平均绝对误差) 帧数据和当前帧数据以找到具有最小MAE的运动矢量。 运动估计器可以应用于由于小硬件而需要高编码效率的图像电话,并且可以应用于符合H.261 / H.263和MPEG的所有视频编码器。
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公开(公告)号:US07526763B2
公开(公告)日:2009-04-28
申请号:US10947944
申请日:2004-09-23
申请人: Nam-Hee Kim
发明人: Nam-Hee Kim
IPC分类号: G06F9/44
CPC分类号: H04L41/0843 , H04L41/0806 , H04L67/06 , H04L67/34 , H04N7/147
摘要: Disclosed is a method for initializing an Internet videophone terminal. In accordance with the method, the Internet videophone terminal is initialized using an initial configuration file therefor based on a specific data format, such that an initial setup process between a service provider and an Internet videophone terminal user can be simplified.
摘要翻译: 公开了一种用于初始化互联网视频电话终端的方法。 根据该方法,可以使用基于特定数据格式的初始配置文件来初始化互联网视频电话终端,从而可以简化服务提供商和互联网可视电话终端用户之间的初始设置过程。
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公开(公告)号:US20070133339A1
公开(公告)日:2007-06-14
申请号:US11626446
申请日:2007-01-24
申请人: Kyung Jeong
发明人: Kyung Jeong
IPC分类号: G11C8/00
CPC分类号: G11C7/1066 , G11C7/1072 , G11C7/1093 , G11C7/22 , G11C7/222 , G11C11/4076 , G11C11/4096
摘要: Disclosed is a data interface device for accessing a memory that operates in synchronization with a clock. A board clock and selective data capturing are used to improve an operating rate of a memory interface and to match a point of time that data outputted from the memory is inputted to a memory controller with a internal clock produced by the memory controller, or to match a point of time that data is outputted from the memory controller with the board clock. The board clock is used to synchronize a point of time that the memory inputs or outputs the data. The internal clock is passed through a sequential path of an output pad of the memory controller, the memory, and an input pad of the memory controller and then re-inputted into the memory controller thereby the feedback clock is generated. The selective data capturing uses a register part for storing data inputted into the memory controller. The register part for storing the data is configured by double registers that are operated in an alternative manner according to a correlation between the inputted data and the feedback clock.
摘要翻译: 公开了一种用于访问与时钟同步操作的存储器的数据接口设备。 使用电路板时钟和选择性数据采集来提高存储器接口的工作速率,并且将从存储器输出的数据输入到具有由存储器控制器产生的内部时钟的存储器控制器的时间点匹配,或者匹配 从存储器控制器以板时钟输出数据的时间点。 电路板时钟用于同步存储器输入或输出数据的时间点。 内部时钟通过存储器控制器的输出焊盘,存储器和存储器控制器的输入焊盘的顺序路径,然后被重新输入存储器控制器,从而产生反馈时钟。 选择性数据捕获使用寄存器部分来存储输入到存储器控制器中的数据。 用于存储数据的寄存器部分由根据输入数据和反馈时钟之间的相关性以替代方式操作的双寄存器配置。
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公开(公告)号:USD534512S1
公开(公告)日:2007-01-02
申请号:US29230065
申请日:2005-05-16
申请人: Moo-Je Kim
设计人: Moo-Je Kim
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公开(公告)号:US20060098740A1
公开(公告)日:2006-05-11
申请号:US11138036
申请日:2005-05-26
CPC分类号: H04N19/567 , H04N5/145
摘要: A motion estimation method using adaptive mode decision is disclosed. The method includes a motion vector difference value calculation step of calculating a motion vector difference value using an input motion vector estimation value x component for a current block and an input x offset corresponding to a current SAD. At the MVD Variable Length Coding (VLC) step, the length of a bit string, which is obtained by performing variable-length coding on an MVDx, is calculated. At a motion vector difference value calculation step, a motion vector difference value is calculated using an input motion vector estimation value y component for a current block and an input y offset corresponding to the current SAD. At an MVD VLC step, the length of a bit string, which is obtained by performing variable-length coding on an MVDy, is calculated. Thereafter, the amount of motion vector coding is produced by adding the MVDx and the MVDy. The amount of texture coding of a current block or a macro block is estimated using SAD values and quantization coefficients of previous macro blocks. A SAD correction coefficient is produced using the amount of motion vector coding and the texture vector coding amount. Finally, the SAD values are multiplied by the SAD correction coefficient, thus correcting the SAD values.
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公开(公告)号:US20120051429A1
公开(公告)日:2012-03-01
申请号:US12957934
申请日:2010-12-01
申请人: Sang Ki Kim , Suk Young Roh , Don Hyoung Lee , Jeong Hwan Hwang , Jung-Yang Bae
发明人: Sang Ki Kim , Suk Young Roh , Don Hyoung Lee , Jeong Hwan Hwang , Jung-Yang Bae
IPC分类号: H04N7/12
CPC分类号: H04N7/0127 , G06T3/4007
摘要: Provided is a system for generating an interpolated frame, which includes an image decoding module configured to decode a first frame from an original image information, the first frame being divided into unit images, and an interpolated frame generating module configured to extract a motion information of each of the unit images between the first frame and the second frame, the motion information being written in a second frame of the original image information, and generate the interpolated frame that is to be inserted between the first frame and the second frame by using the first frame and the motion information of each of the unit images.
摘要翻译: 提供了一种用于生成内插帧的系统,其包括图像解码模块,该图像解码模块被配置为从原始图像信息中解码第一帧,将第一帧分割成单位图像,并且内插帧生成模块被配置为提取 第一帧和第二帧之间的单位图像中的每一个,运动信息被写入原始图像信息的第二帧中,并且通过使用第一帧和第二帧之间的内插帧生成插入到第一帧和第二帧之间的内插帧 第一帧和每个单位图像的运动信息。
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公开(公告)号:US20100209071A1
公开(公告)日:2010-08-19
申请号:US12187352
申请日:2008-08-06
申请人: Tae Hun CHO
发明人: Tae Hun CHO
IPC分类号: H04N5/91
CPC分类号: G11B27/034 , G11B27/105
摘要: An apparatus and method for generating still cut frames from video frames that are executed consecutively includes a storage unit for temporarily storing specific ones of the executed video frames in real-time, a display unit for displaying the video frames, and a controller for controlling the storage unit and the display unit in response to an external input signal. When a still cut command signal is input as the external input signal, the controller controls the video frames, are temporarily stored in the storage unit, to be decided and the decided video frames to be displayed through the display unit. When a signal selecting a specific one of the displayed frames is input, the controller generates the selected frame as a still cut frame.
摘要翻译: 一种用于从连续执行的视频帧产生静止帧的装置和方法,包括用于实时临时存储所执行的视频帧的特定的存储单元,用于显示视频帧的显示单元和用于控制视频帧的控制器 存储单元和显示单元响应于外部输入信号。 当输入静止切换命令信号作为外部输入信号时,控制器控制视频帧,临时存储在存储单元中,并且通过显示单元显示决定的视频帧。 当输入选择所显示的帧中的特定一个信号的信号时,控制器将所选择的帧作为静止帧。
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公开(公告)号:US07676643B2
公开(公告)日:2010-03-09
申请号:US11626446
申请日:2007-01-24
申请人: Kyung Ah Jeong
发明人: Kyung Ah Jeong
IPC分类号: G06F12/00
CPC分类号: G11C7/1066 , G11C7/1072 , G11C7/1093 , G11C7/22 , G11C7/222 , G11C11/4076 , G11C11/4096
摘要: The data interface device accesses a memory operating in synchronization with a clock. A board clock and selective data capturing improve the operating rate of a memory interface and time-synchronize data flow from memory to memory controller with a internal clock produced by the memory controller; or time-synchronize data flow from the memory controller with the board clock. The internal clock is passed through a sequential path of an output pad of the memory controller, the memory, and an input pad of the memory controller and then re-inputted into the memory controller thereby the feedback clock is generated. The selective data capturing uses a register part for storing data inputted into the memory controller. The register part for storing the data is configured by double registers that are operated in an alternative manner according to a correlation between the inputted data and the feedback clock.
摘要翻译: 数据接口设备访问与时钟同步操作的存储器。 电路板时钟和选择性数据采集通过存储器控制器产生的内部时钟提高存储器接口的工作速率和时间同步从存储器到存储器控制器的数据流; 或者将来自存储器控制器的数据流与时钟同步。 内部时钟通过存储器控制器的输出焊盘,存储器和存储器控制器的输入焊盘的顺序路径,然后被重新输入存储器控制器,从而产生反馈时钟。 选择性数据捕获使用寄存器部分来存储输入到存储器控制器中的数据。 用于存储数据的寄存器部分由根据输入数据和反馈时钟之间的相关性以替代方式操作的双寄存器配置。
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