摘要:
There is provided a transceiver comprising a first node for receiving a received signal and transmitting a transmitted signal; a receiver, connected between a first voltage and the first node, for processing the received signal; a transmitter, connected between a second voltage and the first node, for generating the transmitted signal; and a DC voltage controller for selecting a DC component of a voltage of the first node to at least one of: selectively activate at least one of the transmitter and the receiver; and selectively substantially deactivate at least one of the transmitter and receiver.
摘要:
A method for generating at least one error checking code includes creating a modified input data word, including (k+m) bits, by combining an input data word, having n-bits, with at least a previously calculated at least one error checking code, including in-bits, where n≦k, and calculating a first m-bit error checking code from at least a first selected portion of the modified input data word.
摘要:
Apparatus for producing a signal, comprising a capacitor; a first current source for one of charging and discharging the capacitor over a first time period; a second current source for one of discharging and charging the capacitor over a first portion of a second time period; a detector for detecting when the voltage across the capacitor is substantially a first voltage and controlling the second current source for a second portion of the second time period to substantially maintain the voltage across the capacitor; and an apparatus output for indicating when the voltage across the capacitor is one of above and below the first voltage.
摘要:
Embodiments of the invention consist in a method of carrier synchronization, comprising determining a frequency offset estimate from a rate of change of a phase difference between a local oscillator signal and a carrier signal of a received signal; and adjusting a frequency of the local oscillator signal by the frequency offset estimate.
摘要:
Embodiments of the present invention relate to a data processing system comprising a first arithmetic unit comprising at least one finite field multiplier and at least one finite field adder for selectively performing at least two finite field arithmetic calculations; the data processing system comprising means to use a previous finite field arithmetic calculation result in a current finite field arithmetic calculation to determine at least part of a polynomial.
摘要:
Embodiments of the present invention provide a current mode logic circuit, comprising first and second differential switching stages, each stage arranged being arranged to receive a plurality of clock signals, such that the first and second differential switching stages respond to a combination of the plurality of clock signals.
摘要:
Embodiments of the present invention relate to a data processing system comprising a first arithmetic unit comprising at least one finite field multiplier and at least one finite field adder for selectively performing at least two finite field arithmetic calculations; the data processing system comprising means to use a previous finite field arithmetic calculation result in a current finite field arithmetic calculation to determine at least part of a polynomial.
摘要:
Embodiments of the invention consist in a method of carrier synchronization, comprising determining a frequency offset estimate from a rate of change of a phase difference between a local oscillator signal and a carrier signal of a received signal; and adjusting a frequency of the local oscillator signal by the frequency offset estimate.
摘要:
Embodiments of the present invention relates to an integrated mixer. A problem with producing low power consumption mixers is that they require a relatively high operating voltage due to the number of layers of transistor between the power rails. Accordingly, an embodiment of the present invention provides a mixer comprising first and second double balanced mixers having first and second anti-phase differential RF and LO input signals; the first double balanced mixer having a first set of four active devices each arranged to mix selected pairs of the input signals and to combine the mixed signals via first and second output nodes to produce a first portion of differential intermediate frequency output signals; the second double balanced mixer having a second set of four active devices each arranged to mix selected pairs of the input signals and to combine the mixed signals via the first and second output nodes to produce a second portion of the differential intermediate frequency output signals; the first and second portions of the output signals being combined at the first and second output nodes to produce the differential output signals.
摘要:
Apparatus for producing a signal, comprising a capacitor; a first current source for one of charging and discharging the capacitor over a first time period; a second current source for one of discharging and charging the capacitor over a first portion of a second time period; a detector for detecting when the voltage across the capacitor is substantially a first voltage and controlling the second current source for a second portion of the second time period to substantially maintain the voltage across the capacitor; and an apparatus output for indicating when the voltage across the capacitor is one of above and below the first voltage.