-
公开(公告)号：US09910822B2
公开(公告)日：2018-03-06
申请号：US14762040
申请日：2014-01-21
申请人： Commissariat a l'energie atomique et aux energies alternatives , STmicroelectronics (Canada), Inc.
IPC分类号： H04L12/933 , H04L12/24 , H04L12/801 , H04L12/911 , G06F15/78
CPC分类号： G06F15/7825 , H04L41/0816 , H04L47/39 , H04L47/828 , H04L49/109
摘要： A network interface for a first network on chip resource capable of interfacing a data processing unit in the first resource with the network, the network interface including an output communication controller including a mechanism detecting an indicator marking an end of communication between the first resource and at least one second resource with which a communication link is set up, and a mechanism outputting a signal indicating closure of the link to be sent to the second resource, after detection of an end of communication indicator.
-
2.发明授权Interference cancellation and improved signal-to-noise ratio circuits, systems, and methods 有权干扰消除和改进的信噪比电路，系统和方法公开(公告)号：US09450624B2
公开(公告)日：2016-09-20
申请号：US14578119
申请日：2014-12-19
IPC分类号： H04B1/10 , H04L25/03 , H04L27/233
CPC分类号： H04B1/10 , H04L25/0328 , H04L27/233
摘要： Interference cancellation for wideband and narrowband communications systems is provided without apriori knowledge of statistical information about an interfering signal. In one embodiment a demodulator circuit can operate in an environment where a “no lock” situation would normally occur to remove the interference and acquire signals in low signal-to-noise ratio conditions and high signal-to-interference ration conditions. In other embodiments, performance is improved by introducing statistics of the interfering signal, and these statistics regarding the communications channel and interference properties (i.e., characteristics of the interfering signal) can be adaptive or “learned” in other embodiments.
摘要翻译： 提供宽带和窄带通信系统的干扰消除，而无需关于干扰信号的统计信息的知识。 在一个实施例中，解调器电路可以在通常发生“无锁定”情况的环境中操作，以消除干扰并获取低信噪比条件和高信噪比条件下的信号。 在其他实施例中，通过引入干扰信号的统计来提高性能，并且关于通信信道和干扰特性（即干扰信号的特性）的这些统计信息在其他实施例中可以是自适应的或“学习的”。
-
公开(公告)号：US09172939B2
公开(公告)日：2015-10-27
申请号：US13341001
申请日：2011-12-30
CPC分类号： H04N13/111 , H04N13/128 , H04N2013/0081
摘要： A system and method for adjusting the perceived depth of stereoscopic images are provided. The system includes a disparity estimator, a disparity processor and a warping engine. The disparity estimator is configured to receive a stereoscopic image, to estimate disparities in the stereoscopic image, and to generate an estimator signal comprising the estimated disparities. The disparity processor is configured to receive the estimator signal from the disparity estimator and a depth control signal that is generated based on a user input. The disparity processor is also configured to generate a processor signal based on the estimator signal and the depth control signal. The warping engine is configured to receive the processor signal and to generate an adjusted stereoscopic image by warping the processor signal based on a model.
摘要翻译： 提供了一种用于调整立体图像感知深度的系统和方法。 该系统包括视差估计器，视差处理器和翘曲引擎。 视差估计器被配置为接收立体图像，以估计立体图像中的不均匀性，并且生成包括估计的差异的估计器信号。 视差处理器被配置为从视差估计器接收估计器信号和基于用户输入生成的深度控制信号。 视差处理器还被配置为基于估计器信号和深度控制信号产生处理器信号。 翘曲引擎被配置为接收处理器信号并且通过基于模型翘曲处理器信号来生成调整的立体图像。
-
4.发明授权公开(公告)号：US09019344B2
公开(公告)日：2015-04-28
申请号：US13556969
申请日：2012-07-24
CPC分类号： H04N13/128 , G06T3/0093 , G06T5/005 , G06T2207/10012 , H04N13/111 , H04N13/122 , H04N13/139 , H04N2013/0081
摘要： A system for adjusting the perceived depth of 3D content in response to a viewer input control signal. The system comprises: 1) a content source providing an input left stereoscopic image and an input right stereoscopic image; 2) a disparity estimator to receive the input left and right stereoscopic images, detect disparities between the input left and right stereoscopic images, and generate a disparities array; and 3) processing circuitry to fill in occlusion areas associated with the disparities array and apply a scale factor to the detected disparities to thereby generate a scaled disparities array. The system further comprises a warping engine to receive the scaled disparities array and generate an output left stereoscopic image and an output right stereoscopic image. The output left and right stereoscopic images have a different perceived depth than the input left and right stereoscopic images.
摘要翻译： 一种用于响应于观看者输入控制信号来调整3D内容感知深度的系统。 该系统包括：1）提供输入左立体图像和输入右立体图像的内容源; 2）视差估计器，用于接收输入的左和右立体图像，检测输入的左和右立体图像之间的差异，并产生差异阵列; 以及3）处理电路以填充与所述差异阵列相关联的遮挡区域，并将比例因子应用于检测到的差异，从而生成缩放的差异阵列。 系统还包括翘曲引擎，用于接收缩放的差异阵列并产生输出左立体图像和输出右立体图像。 输出的左和右立体图像具有与输入的左和右立体图像不同的感知深度。
-
5.发明授权公开(公告)号：US08818045B2
公开(公告)日：2014-08-26
申请号：US13340287
申请日：2011-12-29
IPC分类号： G06K9/00
CPC分类号： H04N19/523 , G06T7/254 , G06T2207/10016 , G06T2207/20016 , G06T2207/20224 , H04N19/51
摘要： Display 105 is capable of rendering, or otherwise displaying, one or more of a standard definition (SD) image, a two-dimensional (2D), a three-dimensional image (3D) and a high definition (HD) image 110.
摘要翻译： 显示器105能够渲染或以其他方式显示标准清晰度（SD）图像，二维（2D），三维图像（3D）和高清晰度（HD）图像110中的一个或多个。
-
公开(公告)号：US20140077845A1
公开(公告)日：2014-03-20
申请号：US14078190
申请日：2013-11-12
发明人： Anton Pelteshki , Hock Khor
IPC分类号： H03K3/01
CPC分类号： H03K3/01 , H03F3/45179 , H03F3/45183 , H03F2203/45394 , H03F2203/45712 , H04L25/0266 , H04L25/0276 , H04L25/0282
摘要： A driver circuit includes a differential input, a differential output, a bias node, a first T-coil having a first node coupled to the negative output node and a second node coupled to a source of supply voltage, a second T-coil having a first node coupled to the positive output node and a second node coupled to the source of supply voltage, a first transistor having a current path coupled between the center tap of the first T-coil and a first intermediate node, a second transistor having a current path coupled between the center tap of the second T-coil and a second intermediate node, a third transistor having a current path coupled between the first intermediate node and ground, and a fourth transistor having a current path coupled between the second intermediate node and ground.
摘要翻译： 驱动器电路包括差分输入，差分输出，偏置节点，具有耦合到负输出节点的第一节点的第一T形线圈和耦合到电源电压源的第二节点，第二T形线圈具有 耦合到正输出节点的第一节点和耦合到电源电压源的第二节点，具有耦合在第一T形线圈的中心抽头和第一中间节点之间的电流通路的第一晶体管，具有电流 耦合在第二T形线圈的中心抽头和第二中间节点之间的路径，具有耦合在第一中间节点和地之间的电流路径的第三晶体管，以及连接在第二中间节点和地之间的电流路径的第四晶体管 。
-
公开(公告)号：US20130002311A1
公开(公告)日：2013-01-03
申请号：US13333729
申请日：2011-12-21
申请人： Anton Pelteshki , Hock Khor
发明人： Anton Pelteshki , Hock Khor
IPC分类号： H03K3/00
CPC分类号： H03K3/01 , H03F3/45179 , H03F3/45183 , H03F2203/45394 , H03F2203/45712 , H04L25/0266 , H04L25/0276 , H04L25/0282
摘要： A driver circuit includes a differential input, a differential output, a bias node, a first T-coil having a first node coupled to the negative output node and a second node coupled to a source of supply voltage, a second T-coil having a first node coupled to the positive output node and a second node coupled to the source of supply voltage, a first transistor having a current path coupled between the center tap of the first T-coil and a first intermediate node, a second transistor having a current path coupled between the center tap of the second T-coil and a second intermediate node, a third transistor having a current path coupled between the first intermediate node and ground, and a fourth transistor having a current path coupled between the second intermediate node and ground.
摘要翻译： 驱动器电路包括差分输入，差分输出，偏置节点，具有耦合到负输出节点的第一节点的第一T形线圈和耦合到电源电压源的第二节点，第二T形线圈具有 耦合到正输出节点的第一节点和耦合到电源电压源的第二节点，具有耦合在第一T形线圈的中心抽头和第一中间节点之间的电流通路的第一晶体管，具有电流 耦合在第二T形线圈的中心抽头和第二中间节点之间的路径，具有耦合在第一中间节点和地之间的电流路径的第三晶体管，以及连接在第二中间节点和地之间的电流路径的第四晶体管 。
-
8.发明申请INTERFERENCE CANCELLATION AND IMPROVED SIGNAL-TO-NOISE RATIO CIRCUITS, SYSTEMS, AND METHODS 审中-公开干扰消除和改进的信号噪声比率电路，系统和方法公开(公告)号：US20120170691A1
公开(公告)日：2012-07-05
申请号：US13298254
申请日：2011-11-16
IPC分类号： H04L27/06
CPC分类号： H04B1/10 , H04L25/0328 , H04L27/233
摘要： Interference cancellation for wideband and narrowband communications systems is provided without apriori knowledge of statistical information about an interfering signal. In one embodiment a demodulator circuit can operate in an environment where a “no lock” situation would normally occur to remove the interference and acquire signals in low signal-to-noise ratio (SNR) conditions and high signal-to-interference ration (SIR) conditions. In other embodiments, performance is improved by introducing statistics of the interfering signal, and these statistics regarding the communications channel and interference properties (i.e., characteristics of the interfering signal) can be adaptive or “learned” in other embodiments.
摘要翻译： 提供宽带和窄带通信系统的干扰消除，而无需关于干扰信号的统计信息的知识。 在一个实施例中，解调器电路可以在通常发生“无锁定”情况以消除干扰并获取低信噪比（SNR）条件和高信号与干扰比（SIR）的信号的环境中工作 ） 条件。 在其他实施例中，通过引入干扰信号的统计来提高性能，并且关于通信信道和干扰特性（即干扰信号的特性）的这些统计信息在其他实施例中可以是自适应的或“学习的”。
-
公开(公告)号：US20120139771A1
公开(公告)日：2012-06-07
申请号：US13166117
申请日：2011-06-22
IPC分类号： H03M1/12
CPC分类号： H03M1/468
摘要： A differential successive approximation analog to digital converter including: a comparator; a first plurality of capacitors coupled between a corresponding plurality of first switches and a first input of the comparator, at least one of the first capacitors being arranged to receive a first component of a differential input signal; and a second plurality of capacitors coupled between a corresponding plurality of second switches and a second input of the comparator, at least one of the second capacitors being arranged to receive a second component of the differential input signal, wherein each of the first and second plurality of switches are each adapted to independently couple the corresponding capacitor to a selected one of: a first supply voltage level; a second supply voltage level; and a third supply voltage level; and control circuitry adapted to sample the differential input voltage during a sample phase, and to control the first and second switches to couple each capacitor of the first and second plurality of capacitors to the third supply voltage level at the start of a voltage conversion phase.
摘要翻译： 一种差分逐次逼近模数转换器，包括：比较器; 耦合在对应的多个第一开关和比较器的第一输入之间的第一多个电容器，所述第一电容器中的至少一个被布置为接收差分输入信号的第一分量; 以及耦合在相应的多个第二开关和所述比较器的第二输入之间的第二多个电容器，所述第二电容器中的至少一个布置成接收所述差分输入信号的第二分量，其中所述第一和第二多个 的开关各自适于独立地将相应的电容器耦合到所选择的一个：第一电源电压电平; 第二电源电压; 和第三电源电压电平; 以及控制电路，其适于在采样阶段期间对差分输入电压进行采样，并且控制第一和第二开关以在电压转换阶段开始时将第一和第二多个电容器的每个电容器耦合到第三电源电压电平。
-
公开(公告)号：US07470559B2
公开(公告)日：2008-12-30
申请号：US11297973
申请日：2005-12-08
申请人： Sébastien Jouan , Michel Marty
发明人： Sébastien Jouan , Michel Marty
IPC分类号： H01L21/00
CPC分类号： H01L31/1804 , H01L31/02327 , H01L31/105 , H01L31/1085 , Y02E10/547 , Y02P70/521
摘要： A method for forming a buried mirror in a semiconductor component includes the steps of forming a structure comprising a semiconductor layer laid on an insulating layer covering a substrate; forming one or several openings in the semiconductor layer emerging at the surface of the insulating layer; eliminating a portion of the insulating layer, whereby a recess is formed; forming a second thin insulating layer against the wall of the recess; and forming a metal layer in the recess against the second insulating layer.
摘要翻译： 在半导体部件中形成掩模反射镜的方法包括以下步骤：形成包括覆盖在基板上的绝缘层上的半导体层的结构; 在半导体层中形成在绝缘层的表面出现的一个或几个开口; 消除绝缘层的一部分，由此形成凹部; 在所述凹部的壁上形成第二薄绝缘层; 以及在所述凹部中在所述第二绝缘层上形成金属层。
-
-
-
-
-
-
-
-
-
搜索结果
31 条记录 (耗时 0.02 秒)
