Analog-to-digital converter with a balanced output
    1.
    发明授权
    Analog-to-digital converter with a balanced output 有权
    具有平衡输出的模数转换器

    公开(公告)号:US07928884B2

    公开(公告)日:2011-04-19

    申请号:US12409256

    申请日:2009-03-23

    CPC classification number: H04L25/4908 H03M5/04

    Abstract: An Analog-to-Digital Converter (ADC) includes analog to digital conversion circuitry configured to receive an analog signal and output a digital representation of the analog signal on a plurality of data lines; a balancing circuit configured to encode the digital representation of the analog signal on the data lines such that a total number of 1's and 0's transmitted on any given data line is the same.

    Abstract translation: 模数转换器(ADC)包括被配置为接收模拟信号并在多条数据线上输出模拟信号的数字表示的模数转换电路; 平衡电路,被配置为对数据线上的模拟信号的数字表示进行编码,使得在任何给定数据线上发送的总数为1和0是相同的。

    Electric Current Measurement
    2.
    发明申请
    Electric Current Measurement 失效
    电流测量

    公开(公告)号:US20110279133A1

    公开(公告)日:2011-11-17

    申请号:US12781316

    申请日:2010-05-17

    CPC classification number: G01R19/0092

    Abstract: A method for measuring electric current applied to a load includes: with a sensor element having an inaccuracy, measuring an electric current supplied to a load to produce a measurement of the electric current; with the sensor element, measuring the electric current with an added perturbation current; and using measurements of the electric current taken with and without the perturbation current to refine the measurement of the electric current.

    Abstract translation: 用于测量施加到负载的电流的方法包括:具有不准确性的传感器元件,测量供给到负载的电流以产生电流的测量; 用传感器元件,用附加的扰动电流测量电流; 并且使用具有和不具有扰动电流的电流的测量来精细化电流的测量。

    Current mode pipelined analog-to-digital converter
    3.
    发明授权
    Current mode pipelined analog-to-digital converter 有权
    电流模式流水线模数转换器

    公开(公告)号:US07839318B2

    公开(公告)日:2010-11-23

    申请号:US11941672

    申请日:2007-11-16

    CPC classification number: H03M1/168

    Abstract: A pipelined analog-to-digital converter includes a plurality of stages each including a sample-and-hold circuit configured to output an analog signal having a current and a current mode analog-to-digital converter configured to compare the current of the analog signal output by the sample-and-hold circuit to current generated by a plurality of current sources and output a digital representation of the analog signal.

    Abstract translation: 流水线模数转换器包括多个级,每个级包括采样和保持电路,其被配置为输出具有电流模式模拟数字转换器的模拟信号,该模拟信号被配置为比较模拟信号的电流 由采样保持电路输出到由多个电流源产生的电流,并输出模拟信号的数字表示。

    Track and Hold Circuit
    4.
    发明申请
    Track and Hold Circuit 失效
    跟踪和保持电路

    公开(公告)号:US20120188110A1

    公开(公告)日:2012-07-26

    申请号:US13010140

    申请日:2011-01-20

    Inventor: Tracy Johancsik

    CPC classification number: G11C27/02

    Abstract: A track and hold circuit includes an input, a first output configured to produce a first output signal, and a second output configured to produce a second output signal while the track and hold circuit is in a first mode. While the track and hold circuit is in a second mode, the second output signal is combined with the first output signal and output on the first output.

    Abstract translation: 轨道和保持电路包括输入,被配置为产生第一输出信号的第一输出和被配置成在轨道和保持电路处于第一模式时产生第二输出信号的第二输出。 当轨道和保持电路处于第二模式时,第二输出信号与第一输出信号组合并在第一输出上输出。

    Methods and systems for calibrating a pipelined analog-to-digital converter
    5.
    发明授权
    Methods and systems for calibrating a pipelined analog-to-digital converter 有权
    用于校准流水线模数转换器的方法和系统

    公开(公告)号:US07898452B2

    公开(公告)日:2011-03-01

    申请号:US12623815

    申请日:2009-11-23

    CPC classification number: H03M1/1038 H03M1/1061 H03M1/168

    Abstract: This method increases accuracy of a pipelined analog-to-digital converter comprising a plurality of stages, each stage comprising an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC). The method includes calibrating each the ADC starting from a least significant stage until all ADCs have been calibrated using a reference digital-to-analog converter, the reference digital-to-analog converter selectively outputting values at desired trip points for each the ADC; measuring an output of each the DAC using downstream stages of the pipelined analog-to-digital converter to produce output measurements; and using the output measurements to calculate an error-corrected output of the pipelined analog-to-digital converter. The trip points are adjusted by modifying a reference current input to a comparator of each the ADC.

    Abstract translation: 该方法提高了包括多个级的流水线模数转换器的精度,每级包括模数转换器(ADC)和数模转换器(DAC)。 该方法包括从最低有效级开始对每个ADC进行校准,直到使用参考数模转换器校准所有ADC,参考数模转换器选择性地在每个ADC的期望跳变点处输出值; 使用流水线模数转换器的下游级测量每个DAC的输出,以产生输出测量值; 并使用输出测量来计算流水线模数转换器的纠错输出。 通过修改每个ADC的比较器的参考电流输入来调整跳变点。

    TIME-INTERLEAVED SAMPLE-AND-HOLD
    6.
    发明申请
    TIME-INTERLEAVED SAMPLE-AND-HOLD 失效
    时间间隔采样和保持

    公开(公告)号:US20120194223A1

    公开(公告)日:2012-08-02

    申请号:US13015981

    申请日:2011-01-28

    CPC classification number: G11C27/02 G11C7/1042 G11C27/024

    Abstract: A time-interleaved sample-and-hold system includes a first sample-and-hold circuit and a second sample-and-hold circuit. The first sample-and-hold circuit and the second sample-and-hold circuit share a common sampling switch. A method of remediating a timing offset between a first sample-and-hold circuit and a second sample-and-hold circuit in a time-interleaved sample-and-hold system includes switching at least one shunt capacitor disposed between two logic gates in a timing circuit to adjust a delay between a timing signal for a common sampling switch electrically coupled to the first and second sample-and-hold circuits and a timing signal for at least one of the sample-and-hold circuits.

    Abstract translation: 时间交替采样和保持系统包括第一采样保持电路和第二采样保持电路。 第一采样保持电路和第二采样保持电路共用一个公共采样开关。 在时间交织的采样和保持系统中修复第一采样保持电路和第二采样保持电路之间的定时偏移的方法包括:切换至少一个分流电容器,该并联电容器设置在两个逻辑门之间 定时电路,用于调整电耦合到第一和第二采样保持电路的公共采样开关的定时信号与至少一个采样和保持电路的定时信号之间的延迟。

    DIGITAL-TO-ANALOG CONVERTER WITH CODE INDEPENDENT OUTPUT CAPACITANCE
    7.
    发明申请
    DIGITAL-TO-ANALOG CONVERTER WITH CODE INDEPENDENT OUTPUT CAPACITANCE 失效
    具有代码独立输出电容的数字到模拟转换器

    公开(公告)号:US20120032829A1

    公开(公告)日:2012-02-09

    申请号:US12849298

    申请日:2010-08-03

    CPC classification number: H03M1/068 H03M1/74

    Abstract: A Digital-to-Analog Converter (DAC) with code independent output capacitance includes circuitry configured to convert a digital input signal to an analog output signal in a manner such that at least one output terminal of the DAC exhibits a constant capacitance value for up to all received values of the digital input signal. A method for converting a digital signal to an analog signal with a DAC includes converting a digital input signal to an analog output signal in a manner such that at least one output terminal of the DAC exhibits a constant capacitance value for up to all received values of the digital input signal.

    Abstract translation: 具有代码独立输出电容的数模转换器(DAC)包括经配置以将数字输入信号转换为模拟输出信号的电路,其方式使得DAC的至少一个输出端呈现恒定的电容值,直到 所有接收到的数字输入信号值。 一种用DAC将数字信号转换成模拟信号的方法包括将数字输入信号转换为模拟输出信号,使得DAC的至少一个输出端呈现恒定的电容值,直到所有接收的值 数字输入信号。

    Current Mode Analog-to-Digital Converter
    8.
    发明申请
    Current Mode Analog-to-Digital Converter 有权
    电流模式模数转换器

    公开(公告)号:US20100321227A1

    公开(公告)日:2010-12-23

    申请号:US12870146

    申请日:2010-08-27

    CPC classification number: G01R19/257 H03M1/0607 H03M1/0682 H03M1/146 H03M1/366

    Abstract: A current-mode analog-to-digital converter includes: a current input node; a current-mode sample and hold circuit configured to output a steady source of electrical current having an analog value proportional to a sampled analog value of an electrical current at the current input node; and at least one current comparator that compares the electrical current output by the current-mode sample and hold circuit to at least one reference current to produce a digital representation of the sampled analog value of the electrical current at the current input node.

    Abstract translation: 电流模式模数转换器包括:电流输入节点; 电流模式采样和保持电路,被配置为输出具有与当前输入节点处的电流的采样模拟值成比例的模拟值的稳定电流源; 以及至少一个电流比较器,其将由电流模式采样和保持电路输出的电流与至少一个参考电流进行比较,以产生在当前输入节点处的电流的采样模拟值的数字表示。

    Comparator Circuit
    9.
    发明申请
    Comparator Circuit 失效
    比较器电路

    公开(公告)号:US20120133539A1

    公开(公告)日:2012-05-31

    申请号:US12956733

    申请日:2010-11-30

    CPC classification number: H03K5/2472

    Abstract: An analog-to-digital converter includes a comparator configured to receive a first input signal and a second input signal, in which at least one of the input signals is received between two transistors, each of the transistors being in common-gate configuration.

    Abstract translation: 模数转换器包括比较器,被配置为接收第一输入信号和第二输入信号,其中至少一个输入信号被接收在两个晶体管之间,每个晶体管处于共门配置。

    Current mode analog-to-digital converter
    10.
    发明授权
    Current mode analog-to-digital converter 有权
    电流模式模数转换器

    公开(公告)号:US08026838B2

    公开(公告)日:2011-09-27

    申请号:US12870146

    申请日:2010-08-27

    CPC classification number: G01R19/257 H03M1/0607 H03M1/0682 H03M1/146 H03M1/366

    Abstract: A current-mode analog-to-digital converter includes: a current input node; a current-mode sample and hold circuit configured to output a steady source of electrical current having an analog value proportional to a sampled analog value of an electrical current at the current input node; and at least one current comparator that compares the electrical current output by the current-mode sample and hold circuit to at least one reference current to produce a digital representation of the sampled analog value of the electrical current at the current input node.

    Abstract translation: 电流模式模数转换器包括:电流输入节点; 电流模式采样和保持电路,被配置为输出具有与当前输入节点处的电流的采样模拟值成比例的模拟值的稳定电流源; 以及至少一个电流比较器,其将由电流模式采样和保持电路输出的电流与至少一个参考电流进行比较,以产生在当前输入节点处的电流的采样模拟值的数字表示。

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