摘要:
A signal processing circuit includes a plurality of processing-circuit modules and a logic control circuit. The plurality of processing-circuit modules is configured to process an electrical signal. The plurality of processing-circuit modules has at least one processing parameter that is adaptively adjusted based on the electrical signal. The logic control circuit is configured to receive signals from the plurality of processing-circuit modules, validate the processing based on the received signals, and control a storage circuit to sample and store a value of the processing parameter when the processing is validated. Further, the logic control circuit is configured to control the storage circuit to maintain the value of processing parameter when the processing fails validation, and to control the storage circuit to recover the processing parameter in the plurality of processing-circuit modules to the stored value when the plurality of processing-circuit modules is disturbed by a defect.
摘要:
A system and method of establishing write timing in a disk drive using bit patterned media and a magnetic head with read-write offset in which servoing and writing occur on different tracks with timing offsets. Initially, the distance between the servoing and writing tracks is determined for each track/head position in accordance with head geometry and skew angle. The relative timing errors are then measured by iteratively writing data at timing offset increments to determine the optimal timing offset for the servoing/writing track pair, and then writing the offset to sync fields on the servoing tracks of the disk.
摘要:
A disk drive with patterned-media disks has information recorded in the servo sectors that identifies misplacement of the data islands in the data regions between the servo sectors. This misplacement information is read from the servo sectors prior to writing to correct either or both the radial position of the write head and the timing of the write pulses to the data islands. The misplacement information may include radial deviation of the data tracks, circumferential or along-the-track misplacement of the data islands, or the location of defective data islands.
摘要:
A method and device for determining frequency error to extend the pull-in range of a timing recovery circuit for a storage device such as an optical disc drive. A code associated with a storage format of the storage device is detected, and the distance between occurrences of the code is determined. The calculated distance is compared with the expected distance to determine the difference. Based on the difference, the frequency error is determined.
摘要:
A write clock generator for use in writing data to a rotating patterned magnetic media disk is disclosed. The generator includes a magnetic read head for generating a succession of servo signals representative of succession of servo magnetization patterns detected from a corresponding succession of arcuate sectors along a circular data track on the disk. A preamble processor generates a corresponding succession of sector pair signals representative of the lengths of adjacent sectors along the data track on a rolling pair-wise basis. A next sector length predictor processor determines for a succession of pairs of sectors, a length ratio of the lengths of the sectors in the respective pairs of sectors. A clock generator generates a periodic clock for each sector of the succession of sectors, wherein the clock rate associated with a current sector has an associated phase deviation relative to a clock rate associated with a previous sector, which is proportional to the length ratio for the current sector and the previous sector.
摘要:
A system and method of establishing write timing in a disk drive using bit patterned media and a magnetic head with read-write offset in which servoing and writing occur on different tracks with timing offsets. Initially, the distance between the servoing and writing tracks is determined for each track/head position in accordance with head geometry and skew angle. The relative timing errors are then measured by iteratively writing data at timing offset increments to determine the optimal timing offset for the servoing/writing track pair, and then writing the offset to sync fields on the servoing tracks of the disk.
摘要:
A system clock signal generator circuit comprising a first PLL circuit that is frequency and phase locked to a wobble signal; a frequency and phase comparator for comprising a first output signal from the first PLL circuit with a system clock signal as frequency divided by M and for outputting a second output signal based on the differences in frequency and in phase; a PLL filter for providing a predetermined cutoff to the second output signal to output a third output signal; a pulse width modulating circuit for generating a pulse wave, the carrier frequency of which is a second reference clock signal, and for outputting a fourth output signal obtained by modulating the pulse width of the pulse wave by the third output signal; a low pass filter for smoothing the fourth output signal to output a fifth output signal; a VCO circuit the control voltage of which is the fifth output signal; a first frequency divider circuit for frequency dividing an output signal of the VCO circuit by N to output a system clock signal; and a second frequency divider circuit for frequency dividing, by M, and feeding the system clock signal back to the frequency and phase comparator.
摘要:
A write clock generator for use in writing data to a rotating patterned magnetic media disk is disclosed. The generator includes a magnetic read head for generating a succession of servo signals representative of succession of servo magnetization patterns detected from a corresponding succession of arcuate sectors along a circular data track on the disk. A preamble processor generates a corresponding succession of sector pair signals representative of the lengths of adjacent sectors along the data track on a rolling pair-wise basis. A next sector length predictor processor determines for a succession of pairs of sectors, a length ratio of the lengths of the sectors in the respective pairs of sectors. A clock generator generates a periodic clock for each sector of the succession of sectors, wherein the clock rate associated with a current sector has an associated phase deviation relative to a clock rate associated with a previous sector, which is proportional to the length ratio for the current sector and the previous sector.
摘要:
Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a servo address mark count circuit, a user sync mark count circuit, and an offset calculation circuit. The servo address mark count circuit is operable to provide: a first count corresponding to a first servo address mark within a first track of a storage medium, a second count corresponding to a second servo address mark within the first track, a third count corresponding to a third servo address mark within a second track of the storage medium, and a fourth count corresponding to a fourth servo address mark within the second track. The user sync mark count circuit is operable to provide: a fifth count corresponding to a first user sync mark within the first track, and to provide a sixth count corresponding to a second user sync mark within the second track. The offset calculation circuit is operable to calculate an offset between the first track and the second track based at least in part on the first count, the second count, the third count, the fourth count, the fifth count, and the sixth count.
摘要:
A signal processing circuit includes a plurality of processing-circuit modules and a logic control circuit. The plurality of processing-circuit modules is configured to process an electrical signal. The plurality of processing-circuit modules has at least one processing parameter that is adaptively adjusted based on the electrical signal. The logic control circuit is configured to receive signals from the plurality of processing-circuit modules, validate the processing based on the received signals, and control a storage circuit to sample and store a value of the processing parameter when the processing is validated. Further, the logic control circuit is configured to control the storage circuit to maintain the value of processing parameter when the processing fails validation, and to control the storage circuit to recover the processing parameter in the plurality of processing-circuit modules to the stored value when the plurality of processing-circuit modules is disturbed by a defect.