Coherent demodulator preceded by non-coherent demodulator and automatic
frequency control circuit
    2.
    发明授权
    Coherent demodulator preceded by non-coherent demodulator and automatic frequency control circuit 失效
    相干解调器之前是非相干解调器和自动频率控制电路

    公开(公告)号:US5296820A

    公开(公告)日:1994-03-22

    申请号:US935853

    申请日:1992-08-26

    申请人: Hisashi Kawabata

    发明人: Hisashi Kawabata

    摘要: A non-coherent demodulator 1 multiplies a modulated intermediate frequency (IF) signal with a signal from a local oscillator 2 to produce a first pseudo baseband signal having frequency error. The first pseudo baseband signal is supplied to a wide band PLL type demodulator 15. A low-pass filter 26 removes noise component from a first control signal from a loop filter 19 in the wide band PLL type demodulator 15 to produce a second control signal. Multipliers 24 and 25 multiply the first pseudo baseband signal with an output of a voltage-controlled oscillator 27 controlled by the second control signal to produce a second pseudo baseband signal having smaller frequency error. The second pseudo baseband signal is supplied to a narrow band demodulator 14 and converted into a baseband signal.

    摘要翻译: 非相干解调器1将调制中频(IF)信号与来自本地振荡器2的信号相乘,以产生具有频率误差的第一伪基带信号。 第一伪基带信号被提供给宽带PLL型解调器15.低通滤波器26从宽带PLL型解调器15中的来自环路滤波器19的第一控制信号中去除噪声分量,以产生第二控制信号。 乘法器24和25将第一伪基带信号与由第二控制信号控制的压控振荡器27的输出相乘,以产生具有较小频率误差的第二伪基带信号。 第二伪基带信号被提供给窄带解调器14并转换成基带信号。

    Phase locked loop circuit for demodulating suppressed carrier signals
    3.
    发明授权
    Phase locked loop circuit for demodulating suppressed carrier signals 失效
    用于解调抑制载波信号的锁相环电路

    公开(公告)号:US4642573A

    公开(公告)日:1987-02-10

    申请号:US783521

    申请日:1985-10-03

    摘要: A phase locked loop circuit for use in a heterodyne receiver for stably demodulating a carrier-suppressed double-sideband signal such as a 2-phase or 4-phase PSK signal. The phase locked loop circuit comprises a reference oscillator oscillating at a frequency corresponding to an intermediate frequency, and the frequency difference between the reference frequency and the input frequency is detected by a Costas loop, a signal indicative of the frequency difference being fed back to a local oscillator through a loop filter thereby stabilizing the intermediate frequency.

    摘要翻译: 一种用于外差接收机的锁相环电路,用于稳定解调诸如2相或4相PSK信号的载波抑制双边带信号。 锁相环电路包括以对应于中频的频率振荡的参考振荡器,并且通过科斯塔斯回路检测参考频率与输入频率之间的频率差,表示频差的信号被反馈到 本地振荡器通过环路滤波器,从而稳定中频。

    Detectors
    5.
    发明授权
    Detectors 失效
    探测器

    公开(公告)号:US5612976A

    公开(公告)日:1997-03-18

    申请号:US272839

    申请日:1994-07-11

    摘要: A direct conversion Binary FSK radio receiver has an AFC loop comprising an Exclusive-Or phase detector 104 responsive to the I.sub.3 and Q.sub.3 signals. I and Q filters 100, 101 are not identical but have different frequency-phase characteristics such that their phase shifts are identical when the local oscillator 102 is correctly tuned and differ when the local oscillator is off-tune. Detector 104 detects the change of phase and applies a control signal to local oscillator 102 such as to return the local oscillator frequency to the correct value. Alternatively, identical filters may be used in the I and Q channels, circuits having different phase shifts being coupled between the I.sub.3 and Q.sub.3 signals and the inputs of the phase detector 104.

    摘要翻译: 直接转换二进制FSK无线电接收机具有响应于I3和Q3信号的包括异或相位检测器104的AFC回路。 I和Q滤波器100,101不相同但是具有不同的频率相位特性,使得当本地振荡器102被正确调谐时它们的相移是相同的,当本地振荡器是偏振时,它们的相移是不同的。 检测器104检测相位的变化,并将控制信号施加到本地振荡器102,以使本地振荡器频率返回到正确的值。 或者,可以在I和Q通道中使用相同的滤波器,具有不同相移的电路耦合在I3和Q3信号之间以及相位检测器104的输入端。

    BPSK demodulator and FM receiver for digital data pagers
    6.
    发明授权
    BPSK demodulator and FM receiver for digital data pagers 失效
    BPSK解调器和数字数字寻呼机的FM接收机

    公开(公告)号:US4816769A

    公开(公告)日:1989-03-28

    申请号:US3843

    申请日:1987-01-16

    摘要: An FM receiver for the reception of digital data modulated on a Subsidiary Communication Authorization (SCA) subcarrier is provided with automatic tuning capability and a coherent demodulator for minimizing noise, distortion and interference. The FM receiver is tuned automatically to minimize the measured amplitude of noise and distortion at the high frequency end of the spectrum of the FM demodulator output, above the frequencies of the SCA signal. The SCA signal is tuned by a heterodyne circuit including a balanced modulator, a voltage-controlled oscillator (VCO), and a bandpass filter. The VCO is automatically tuned to maximize the measured amplitude of the SCA signal selected by the bandpass filter. For coherent detection of BPSK (Binary-Phase-Shift-Keying), the coherent demodulator is preferably and kind of data-aided Costas loop in which digital logic circuits perform phase shifting, phase detecting, a multiplying functions. The feedback of the phase error signal is preferably inhibited whenever the signal-to-noise ratio falls below the level which ensures phase-lock, for example, by inhibiting feedback whenever the amplitude of the filtered in-phase signal in the Costas loop fails to exceed a predetermined threshold level. Preferably the phase error signal is fed back through an integrating low-pass filter to control the VCO of the heterodyne circuit, and is fed back through a bandpass filter to control the oscillator of the Costas loop.

    摘要翻译: 用于接收在辅助通信授权(SCA)子载波上调制的数字数据的FM接收机具有自动调谐能力和用于最小化噪声,失真和干扰的相干解调器。 自动调谐FM接收机,以便在FM解调器输出频谱的高频端测得的噪声和失真的振幅最小,高于SCA信号的频率。 SCA信号由包括平衡调制器,压控振荡器(VCO)和带通滤波器的外差电路调谐。 自动调谐VCO以最大化由带通滤波器选择的SCA信号的测量幅度。 对于BPSK(二进制相移键控)的相干检测,相干解调器优选地是数字逻辑电路执行相移,相位检测,乘法函数的数据辅助Costas循环。 当信噪比低于确保相位锁定的电平时,优选地抑制相位误差信号的反馈,例如,只要科斯塔斯环路中滤波的同相信号的幅度失败,通过禁止反馈 超过预定阈值水平。 优选地,相位误差信号通过积分低通滤波器反馈以控制外差电路的VCO,并通过带通滤波器反馈以控制科斯塔斯回路的振荡器。

    Automatic gain controlled frequency discriminator for use in a phase
locked loop
    7.
    发明授权
    Automatic gain controlled frequency discriminator for use in a phase locked loop 失效
    用于锁相环的自动增益控制鉴频器

    公开(公告)号:US4510463A

    公开(公告)日:1985-04-09

    申请号:US487778

    申请日:1983-04-22

    IPC分类号: H03D3/22 H03L7/02

    摘要: A frequency discriminator having a wide capture band is shown to comprise, in addition to a conventional phase detector having two channels fed by a signal whose frequency is to be determined (the first one of the channels containing a tuned circuit operative to shift the phase of the signal in accordance with the difference between the frequency of the signal and the center frequency of the tuned circuit and the second one of the channels containing a phase shifter operative to shift the phase of the signal by 90.degree. regardless of the frequency of the signal), a compensating circuit operative substantially to equalize the amplitudes of the signals applied to the phase detector, the compensating circuit including an amplifier in the first one of the channels to amplify the signal out of the tuned circuit, the gain of the amplifier being controlled by a signal indicative of the difference between the amplitudes of the signals fed to the phase detector.

    摘要翻译: 具有宽捕获带的鉴频器除了具有由要被确定频率的信号馈送的两个信道的常规相位检测器之外还包括(第一个信道包含调谐电路,该调谐电路可操作以使 根据信号的频率和调谐电路的中心频率之间的差异以及包含移相器的通道的第二个信号的信号可操作以将信号的相位偏移90°,而不管信号的频率如何 ),补偿电路基本上用于均衡施加到相位检测器的信号的幅度,补偿电路包括在第一通道中的放大器以放大调谐电路中的信号,放大器的增益被控制 通过表示馈送到相位检测器的信号的幅度之间的差异的信号。

    Synchronous detector and methods for synchronous detection
    8.
    发明授权
    Synchronous detector and methods for synchronous detection 失效
    同步检测器和同步检测方法

    公开(公告)号:US5596606A

    公开(公告)日:1997-01-21

    申请号:US223223

    申请日:1994-04-05

    申请人: Leo Montreuil

    发明人: Leo Montreuil

    摘要: A synchronous detector has first and second mixer circuits and a voltage controlled oscillator. The voltage controlled oscillator provides a local oscillator signal directly to the second mixer circuit and indirectly to the first mixer circuit through a phase transformer. The output of the first and second mixer circuits are combined in combiner circuitry to produce a jitter cancelled output signal. The jitter cancelled output signal is filtered in a loop filter and applied to the voltage controlled oscillator to control the frequency and phase of the local oscillator signal. The combiner circuitry includes a summer and a jitter cancellation filter. The jitter cancellation filter is preferably a high pass filter matched to spectrum of the signal detected. The output of the first mixer circuit is passed through the high pass filter into one input of the summer while the output of the second mixer circuit is passed to the second input of the summer. The output of the summer is passed to the loop filter.

    摘要翻译: 同步检测器具有第一和第二混频器电路和压控振荡器。 压控振荡器将本地振荡器信号直接提供给第二混频器电路,并且通过相变器间接地提供给第一混频器电路。 第一和第二混频器电路的输出在组合器电路中组合以产生抖动消除的输出信号。 抖动消除输出信号在环路滤波器中滤波,并施加到压控振荡器以控制本地振荡器信号的频率和相位。 组合器电路包括加法器和抖动消除滤波器。 抖动消除滤波器优选地是与所检测的信号的频谱匹配的高通滤波器。 第一混频器电路的输出通过高通滤波器进入夏季的一个输入端,而第二混频器电路的输出被传递到夏季的第二输入端。 夏季的输出将传递给环路滤波器。

    Synchronous modulator and methods for synchronous modulation
    9.
    发明授权
    Synchronous modulator and methods for synchronous modulation 失效
    同步调制器和同步调制方法

    公开(公告)号:US5592513A

    公开(公告)日:1997-01-07

    申请号:US473949

    申请日:1995-06-07

    申请人: Leo Montreuil

    发明人: Leo Montreuil

    摘要: A synchronous detector has first and second mixer circuits and a voltage controlled oscillator. The voltage controlled oscillator provides a local oscillator signal directly to the second mixer circuit and indirectly to the first mixer circuit through a phase transformer. The output of the first and second mixer circuits are combined in combiner circuitry to produce a jitter cancelled output signal. The jitter cancelled output signal is filtered in a loop filter and applied to the voltage controlled oscillator to control the frequency and phase of the local oscillator signal. The combiner circuitry includes a summer and a jitter cancellation filter. The jitter cancellation filter is preferably a high pass filter matched to spectrum of the signal detected. The output of the first mixer circuit is passed through the high pass filter into one input of the summer while the output of the second mixer circuit is passed to the second input of the summer. The output of the summer is passed to the loop filter.

    摘要翻译: 同步检测器具有第一和第二混频器电路和压控振荡器。 压控振荡器将本地振荡器信号直接提供给第二混频器电路,并且通过相变器间接地提供给第一混频器电路。 第一和第二混频器电路的输出在组合器电路中组合以产生抖动消除的输出信号。 抖动消除输出信号在环路滤波器中滤波,并施加到压控振荡器以控制本地振荡器信号的频率和相位。 组合器电路包括加法器和抖动消除滤波器。 抖动消除滤波器优选地是与所检测的信号的频谱匹配的高通滤波器。 第一混频器电路的输出通过高通滤波器进入夏季的一个输入端,而第二混频器电路的输出被传递到夏季的第二输入端。 夏季的输出将传递给环路滤波器。

    Frequency-agile synchronous demodulator
    10.
    发明授权
    Frequency-agile synchronous demodulator 失效
    频率敏捷同步解调器

    公开(公告)号:US4628270A

    公开(公告)日:1986-12-09

    申请号:US721747

    申请日:1985-04-10

    IPC分类号: H03D1/22 H03D3/02

    CPC分类号: H03D1/2254 H03D2200/0031

    摘要: A frequency-agile synchronous demodulator for demodulating a carrier signal. The carrier signal is decomposed into in-phase and quadrature-phase components. Using the in-phase and quadrature-phase components, a first error signal is produced representing the phase difference between the carrier signal and a local oscillator signal. A reference signal, related to the frequency of the carrier signal by a factor N, is also input to the frequency-agile synchronous demodulator. The local oscillator signal is scaled by the factor N, and compared to the reference frequency signal in a phase detector. The phase detector produces a second error signal representing the phase difference between the reference signal and the local oscillator signal. The first error signal is integrated and summed with the second error signal. The resultant sum signal is integrated and input to the local oscillator for controlling the frequency and phase thereof. Generation of the second error signal ensures that the frequency-agile synchronous demodulator locks to the correct carrier frequency signal, rather than another signal on an adjacent frequency. The first error signal ensures a phase-locked condition.

    摘要翻译: 一种用于解调载波信号的频率敏捷同步解调器。 载波信号被分解为同相和正交相分量。 使用同相和正交相位分量,产生表示载波信号和本地振荡器信号之间的相位差的第一误差信号。 与载波信号的频率相关的参考信号乘以因子N也被输入到频率敏捷同步解调器。 本地振荡器信号按因子N缩放,并与相位检测器中的参考频率信号进行比较。 相位检测器产生表示参考信号和本地振荡器信号之间的相位差的第二误差信号。 第一个误差信号被积分并与第二个误差信号相加。 所得到的和信号被积分并输入到本地振荡器以控制其频率和相位。 第二个误差信号的产生确保频率敏捷同步解调器锁定到正确的载波频率信号,而不是相邻频率上的另一个信号。 第一个错误信号确保了锁相状态。