Integrated circuit device having data signal output at voltage level of the device coupled thereto
    1.
    发明授权
    Integrated circuit device having data signal output at voltage level of the device coupled thereto 有权
    具有在与其耦合的装置的电压电平处输出的数据信号的集成电路装置

    公开(公告)号:US06586967B2

    公开(公告)日:2003-07-01

    申请号:US09996067

    申请日:2001-11-28

    IPC分类号: H03K190175

    摘要: An integrated circuit device 1 such as a current sensor includes a circuit configuration 3 which is driven from supply rails (P1, P2) at a given operational voltage. The integrated circuit device 1 includes control circuitry (R1, T1) responsive to an enabling signal from a micro-controller 2 applied to pin P8 to ensure that data supplied at pin P7 to the micro-controller is at a voltage compatible with a running voltage of the micro-controller 2 that is different from that of the device 1. No pin to receive a rail voltage corresponding to the running voltage for the micro-controller 2 is needed for the integrated circuit device 1.

    摘要翻译: 诸如电流传感器的集成电路装置1包括在给定工作电压下从电源轨(P1,P2)驱动的电路配置3。 集成电路装置1包括响应于施加到引脚P8的微控制器2的使能信号的控制电路(R1,T1),以确保在引脚P7处向微控制器提供的数据处于与运行电压兼容的电压 对于集成电路装置1,不需要与微控制器2的运行电压对应的导轨电压的引脚。

    Programmable termination for integrated circuits
    2.
    发明授权
    Programmable termination for integrated circuits 有权
    集成电路的可编程终端

    公开(公告)号:US06362644B1

    公开(公告)日:2002-03-26

    申请号:US09630090

    申请日:2000-08-01

    IPC分类号: H03K1716

    CPC分类号: H03K19/01837

    摘要: A receiver circuit (16) is programmable to operate with different logic family driver circuits (10). The receiver circuit has two external configuration pins (22,) 24) that are configured to provide the necessary termination for the type of logic family driver circuit used. To terminate the receiver circuit (16) for an ECL application will require first and second configuration pins (22,24) are connected to VCC—2 volts. To terminate the receiver circuit (16) for a CML application will require the first configuration pin (22) and the second configuration pin (24) are connected to VCC. LVDS termination for the receiver circuit (16) requires the first configuration pin (22) and the second configuration pin (24) are connected together. The configuration pins are external to a semiconductor package (14) housing the receiver circuit.

    摘要翻译: 接收器电路(16)可编程为与不同的逻辑系列驱动电路(10)一起工作。 接收器电路具有两个外部配置引脚(22),其被配置为为所使用的逻辑系列驱动器电路的类型提供必要的端接。 为了终止用于ECL应用的接收机电路(16),将需要将第一和第二配置引脚(22,24)连接到VCC-2伏特。 为了终止用于CML应用的接收机电路(16)将需要第一配置引脚(22)和第二配置引脚(24)连接到VCC。 接收器电路(16)的LVDS终端需要第一配置引脚(22)和第二配置引脚(24)连接在一起。 配置引脚位于容纳接收器电路的半导体封装(14)的外部。

    Output buffer with programmable voltage swing
    3.
    发明授权
    Output buffer with programmable voltage swing 有权
    具有可编程电压摆幅的输出缓冲器

    公开(公告)号:US06300802B1

    公开(公告)日:2001-10-09

    申请号:US09253621

    申请日:1999-02-19

    申请人: Kenneth Smetana

    发明人: Kenneth Smetana

    IPC分类号: H03K19086

    CPC分类号: H03K19/01837

    摘要: An integrated circuit device in which the magnitude of the output voltage swings of outputs in a circuit having emitter coupled output transistors is programmable includes a variable bias generator that produces a bias voltage. The bias voltage is connected to the base of a current source transistor in order to program the magnitude of the output voltage swings. An electrical connection area of the integrated circuit device is connected to the bias voltage generator. An external programming circuit can be connected to the electrical connection area in order to set the bias voltage, to thereby program the desired magnitude of the output voltage swings. The external programming circuit typically can be a resistance or an external voltage source. The variable bias generator can be any of a number of circuits that produce a bias voltage that is dependent upon the external programming circuit connected to the electrical connection area, and that produce a default bias voltage if no external programming circuit is connected to the electrical connection area. Another aspect of the invention is a method for programming the magnitude of the output voltage swings in an integrated circuit device having emitter coupled output transistors. The invention provides the ability to program the magnitude of the output voltage swings of the outputs to increase the magnitude of the output voltage swings, or alternatively, to decrease the magnitude of the output voltage swings thereby advantageously saving power and preventing unnecessary heat generation.

    摘要翻译: 一种集成电路装置,其中具有发射极耦合输出晶体管的电路中的输出的输出电压摆幅的大小可编程包括产生偏置电压的可变偏置发生器。 偏置电压连接到电流源晶体管的基极,以便对输出电压摆幅的幅度进行编程。 集成电路装置的电连接区域连接到偏置电压发生器。 外部编程电路可以连接到电连接区域以便设置偏置电压,从而编程输出电压摆幅的期望幅度。 外部编程电路通常可以是电阻或外部电压源。 可变偏置发生器可以是产生取决于连接到电连接区域的外部编程电路的偏置电压的多个电路中的任何一个,并且如果没有外部编程电路连接到电连接,则产生默认偏置电压 区。 本发明的另一方面是一种用于对具有发射极耦合输出晶体管的集成电路器件中的输出电压摆幅的幅度进行编程的方法。 本发明提供了对输出的输出电压摆幅的幅度进行编程以增加输出电压摆幅的幅度的能力,或者替代地,减小输出电压摆幅的大小,从而有利地节省功率并防止不必要的发热。

    Differential logic level translator circuit with dual output logic
levels selectable by power connector options
    4.
    发明授权
    Differential logic level translator circuit with dual output logic levels selectable by power connector options 失效
    具有双输出逻辑电平的差分逻辑电平转换电路,可通过电源连接器选件进行选择

    公开(公告)号:US5428305A

    公开(公告)日:1995-06-27

    申请号:US129939

    申请日:1993-09-30

    IPC分类号: H03K19/018 H03K19/086

    CPC分类号: H03K19/01837 H03K19/01812

    摘要: Switching between two logic circuits that produce outputs at different respective logic levels is accomplished by means of a common input differential switch that has a branch in each logic circuit. A common current source supplies current to the branches within each logic circuit. The current source remains on regardless of which logic level is selected, thereby enhancing switching speed. The logic circuits produce logic outputs at a common output differential switch, which in turn provides a selected output to a single output terminal. The logic circuits are configured so that the output from the circuit corresponding to the selected logic level dominates the output from the other logic circuit at the output differential switch.

    摘要翻译: 通过在每个逻辑电路中具有分支的公共输入差分开关来实现在不同的逻辑电平处产生输出的两个逻辑电路之间的切换。 公共电流源向每个逻辑电路中的分支提供电流。 无论选择哪个逻辑电平,电流源保持不变,从而提高开关速度。 逻辑电路在公共输出差分开关产生逻辑输出,而输入差分开关又向单个输出端提供选定的输出。 逻辑电路被配置为使得来自对应于所选逻辑电平的电路的输出主导来自输出差分开关处的另一个逻辑电路的输出。

    VOLTAGE LEVEL CONVERTING CIRCUIT AND ELECTRONIC DEVICE USING THE SAME
    5.
    发明申请
    VOLTAGE LEVEL CONVERTING CIRCUIT AND ELECTRONIC DEVICE USING THE SAME 审中-公开
    电压电平转换电路和使用该电路的电子设备

    公开(公告)号:US20140062448A1

    公开(公告)日:2014-03-06

    申请号:US13929811

    申请日:2013-06-28

    发明人: CHENG-KUANG MI

    IPC分类号: H02M3/157

    摘要: A circuit for an electronic device translates logic-low and logic-high voltage levels into other voltage levels suitable for digital intercommunication between the host electronic device and external devices, and between different external devices. The circuit comprises a power supply, a processing module, a communicating module, and a voltage converting module. The power supply provides a first voltage, a second voltage, and a pulse voltage with a predetermined duty cycle. The voltage level converting module converts incoming or outgoing logic voltage levels between a first mode and a second or more modes.

    摘要翻译: 用于电子设备的电路将逻辑低电平和逻辑高电压电平转换成适用于主机电子设备和外部设备之间以及不同外部设备之间数字互通的其他电压电平。 电路包括电源,处理模块,通信模块和电压转换模块。 电源提供具有预定占空比的第一电压,第二电压和脉冲电压。 电压电平转换模块在第一模式和第二模式或更多模式之间转换输入或输出逻辑电压电平。

    Symmetrical, Direct Coupled Laser Drivers
    6.
    发明申请
    Symmetrical, Direct Coupled Laser Drivers 有权
    对称,直接耦合激光驱动器

    公开(公告)号:US20120201260A1

    公开(公告)日:2012-08-09

    申请号:US13352011

    申请日:2012-01-17

    IPC分类号: H01S3/10

    摘要: Symmetrical, direct coupled laser drivers for high frequency applications. The laser drivers are in integrated circuit form and use a minimum of relatively small (low valued) external components for driving a laser diode coupled to the laser driver through transmission lines. An optional amplifier may be used to fix the voltage at an internal node at data frequency spectrum to improve circuit performance. Feedback to a bias input may also be used to fix the voltage at the internal node. Programmability and a burst mode capability may be included.

    摘要翻译: 用于高频应用的对称直接耦合激光驱动器。 激光驱动器采用集成电路形式,并且使用至少相对小的(低价值)外部组件来驱动通过传输线耦合到激光驱动器的激光二极管。 可以使用可选的放大器来以数据频谱固定内部节点处的电压,以改善电路性能。 对偏置输入的反馈也可用于固定内部节点的电压。 可以包括可编程性和突发模式能力。

    Driver circuit with low power termination mode
    7.
    发明授权
    Driver circuit with low power termination mode 有权
    低功耗终端模式的驱动电路

    公开(公告)号:US07199604B2

    公开(公告)日:2007-04-03

    申请号:US10811189

    申请日:2004-03-26

    IPC分类号: H03K17/16 H03B1/00

    CPC分类号: H03K19/01837

    摘要: Driver circuits and methods for operating driver circuits in automatic test equipment are provided. The driver circuit includes an output circuit operable in a dynamic mode and in a termination mode, and a mode control circuit for supplying a first current to the output circuit in the dynamic mode and for supplying a second current to the output circuit in the termination mode in response to a mode select signal. The mode control circuit may include a current multiplier and a switching circuit for switching a control current supplied to the current multiplier. In one example, the slew current supplied to the output circuit is controlled in response to the mode select signal.

    摘要翻译: 提供了用于在自动测试设备中操作驱动电路的驱动电路和方法。 驱动器电路包括可在动态模式和终端模式下工作的输出电路和模式控制电路,用于以动态模式向输出电路提供第一电流,并在端接模式下向输出电路提供第二电流 响应于模式选择信号。 模式控制电路可以包括电流倍增器和用于切换提供给当前乘法器的控制电流的开关电路。 在一个示例中,响应于模式选择信号来控制提供给输出电路的转换电流。

    Selectable low-voltage differential signal/current mode logic (LVDS/CML) receiver with the option of AC or DC coupling
    8.
    发明授权
    Selectable low-voltage differential signal/current mode logic (LVDS/CML) receiver with the option of AC or DC coupling 有权
    可选择低电压差分信号/电流模式逻辑(LVDS / CML)接收器,可选择交流或直流耦合

    公开(公告)号:US06462852B1

    公开(公告)日:2002-10-08

    申请号:US09429281

    申请日:1999-10-28

    IPC分类号: H04B1006

    摘要: A selectable receiver includes a first receiver module for receiving first input signal type and a second receiver module, different from the first receiver module, for receiving a second input signal type, both receiver modules coupled to the same receiver inputs. An internal common mode voltage for the first signal type or for the second signal type, is provided by respective common mode voltage networks, to the first or to the second receiver module, to facilitate AC coupling with the appropriate DC common mode voltage required by the signal type. If direct coupled, the internal common mode voltage is effectively swamped out by the common mode voltage of the input signal. The first receiver module or the second receiver module, and the associated first common mode voltage or second common mode voltage, are selected in the receiver based on a control signal. The first receiver module can be a current mode logic (CML) receiver, and the second receiver module can be a low-voltage differential (LVDS) receiver module, e.g., a self-timed interface (STI) receiver module.

    摘要翻译: 可选接收器包括用于接收第一输入信号类型的第一接收器模块和与第一接收器模块不同的第二接收器模块,用于接收第二输入信号类型,两个接收器模块耦合到相同的接收器输入端。 用于第一信号类型或第二信号类型的内部共模电压由相应的共模电压网络提供给第一或第二接收器模块,以便于与所要求的适当DC共模电压的AC耦合 信号类型。 如果直接耦合,则内部共模电压由输入信号的共模电压有效地消除。 基于控制信号在接收机中选择第一接收机模块或第二接收机模块以及相关联的第一共模电压或第二共模电压。 第一接收器模块可以是电流模式逻辑(CML)接收器,并且第二接收器模块可以是低压差分(LVDS)接收器模块,例如自定时接口(STI)接收器模块。

    CURRENT CONTROL OF OUTPUT SWING
    9.
    发明申请
    CURRENT CONTROL OF OUTPUT SWING 无效
    输出电流的当前控制

    公开(公告)号:US20020021148A1

    公开(公告)日:2002-02-21

    申请号:US09268015

    申请日:1999-03-15

    IPC分类号: H03K005/22

    摘要: A variable output voltage swing differential driver including an open-loop current control unit operative to produce a control current, and a voltage output unit receiving the control current and operative to produce a voltage output having a variable output swing. Related apparatus and methods are also disclosed.

    摘要翻译: 一种可变输出电压摆幅差分驱动器,包括可操作以产生控制电流的开环电流控制单元,以及接收控制电流并用于产生具有可变输出摆幅的电压输出的电压输出单元。 还公开了相关的装置和方法。

    Driver circuits for automatic digital testing apparatus
    10.
    发明授权
    Driver circuits for automatic digital testing apparatus 失效
    自动数字测试仪的驱动电路

    公开(公告)号:US4339673A

    公开(公告)日:1982-07-13

    申请号:US129637

    申请日:1980-03-12

    申请人: Graham A. Perry

    发明人: Graham A. Perry

    摘要: A driver circuit for use in testing either ECL (emitter-coupled logic) or TTL (transistor-transistor logic) devices. The circuit has a pair of variable reference voltages (V.sub.H,V.sub.L) for determining the logic levels 0 and 1. The circuit also has two termination networks (8,9) for ECL and TTL, which are selectively connected to the output of the driver circuit according to the value of one of the reference voltages (V.sub.L). Preferably the circuit is formed as a hybrid network in which transistors from the same semiconductor slice are mounted on the same ceramic substrate.

    摘要翻译: 用于测试ECL(发射极耦合逻辑)或TTL(晶体管 - 晶体管逻辑)器件的驱动器电路。 该电路具有用于确定逻辑电平0和1的一对可变参考电压(VH,VL)。该电路还具有用于ECL和TTL的两个终端网络(8,9),其被选择性地连接到驱动器的输出 电路根据参考电压(VL)之一的值。 优选地,电路形成为混合网络,其中来自相同半导体片的晶体管安装在相同的陶瓷衬底上。