摘要:
A MIMO transceiver has a plurality of analog processing subsystems that each includes at least one antenna, a duplexer, at least one power amplifier, at least one mixer, an interface connectable to a baseband processing subsystem, and the MIMO transceiver has one or more analog radio frequency processing chips. Each analog processing subsystem of the plurality of analog processing subsystems is on a single one of the analog radio frequency processing chips, and each analog radio frequency processing chip comprises a metallization on at least one side of the chip and wherein the metallization comprises integration of the at least one antenna.
摘要:
An analog processing subsystem is disclosed. Said subsystem comprising at least one antenna (202,302), a duplexer (202a,302a), at least one power amplifier (203a,203b), at least one mixer (204a,204b, 304a, 304b) and an interface connectable to a baseband processing subsystem. The at least one mixer (204a,204b,304a,304b) is adapted to down-convert and inphase/quadrature—IQ—demodulate a received analog radio frequency signal, received by the at least one antenna (202,302), to provide a received analog baseband signal and to IQ-modulate and up-convert a transmit analog baseband signal, to be transmitted by the at least one antenna (202, 302), to provide a transmit analog radio frequency signal. The analog processing subsystem is comprised on a single analog radio frequency processing chip (201,301) comprising a metallization on at least one side of the chip for integration of the at least one antenna (202,302).
摘要:
A hybrid polar I-Q transmitter comprises an I-Q quantization circuit configured to receive an in-phase signal and a quadrature signal forming a first I-Q data pair, and generate a quantized in-phase signal and a quantized quadrature signal forming a second I-Q data pair, respectively, based on a resolution information of a digital-to-analog converter (DAC). Each of the first and second I-Q data pairs corresponds to a point in an I-Q constellation diagram comprising an I axis and a Q axis that are orthogonal to one another. The transmitter further comprises a quantization reduction circuit configured to determine a first rotation angle and a second rotation angle of the I-axis and Q-axis, respectively, based on the first I-Q data pair and the second I-Q data pair, and use the determined first rotation angle and the second rotation angle for generating an RF output signal.
摘要:
A direct conversion receiver device may receive I and Q signals. The direct conversion receiver device may include a blind IQ balance circuit configured to balance the I and Q signals without a pilot signal, and a mixer coupled to the blind IQ balance circuit and configured to generate I and Q baseband signals using an operational frequency, the operational frequency being based upon bandwidth and modulation of the I and Q signals. The blind IQ balance circuit may include a first stage configured to generate an intermediate amplitude balanced Q signal based upon the I and Q signals, and a second stage coupled to the first stage and configured to generate phased balanced I and Q signals based upon the intermediate amplitude balanced Q signal and the I signal.
摘要:
An illustrative adaptive radio communications system comprises a cluster of waveform and application processor entities coupled and a plurality of transceivers. The transceivers convert radio frequency (RF) signals into digital in-phase and quadrature (I/Q) data, which is sent to the waveform processor entities via a network fabric. The waveform processor entities perform low-level waveform processing and the application processor entities perform high-level, distributed signal processing. The system and related methods are capable of processing multiple programmable waveforms of varying complexity.
摘要:
In a receiver circuit, an analog signal processor frequency-converts an input high frequency signal into a baseband signal, and performs low pass filtering at a cutoff frequency below a desired-wave band. An ADC converts an output of the analog signal processor into a digital signal. A digital signal processor compensates an output of the ADC for a signal component in the desired-wave band which has been attenuated by the filtering operation of the analog signal processor.
摘要:
A receiver receiving a Radio Frequency (RF) signal and generating a baseband signal is provided. An RF module receives the RF signal and down convert the RF signal according to a first oscillation frequency to generate an Intermediate Frequency (IF) signal. An IF module is coupled to the RF module and arranged to receive the IF signal and down convert the IF signal according to a second oscillation frequency to generate the baseband signal. A calibration module is coupled to the RF module and arranged to calculate the IF signal according to a third oscillation frequency to detect an I/Q mismatch, and generate an adjustment signal, accordingly, to calibrate the I/O mismatch.
摘要:
In a receiver circuit, an analog signal processor frequency-converts an input high frequency signal into a baseband signal, and performs low pass filtering at a cutoff frequency below a desired-wave band. An ADC converts an output of the analog signal processor into a digital signal. A digital signal processor compensates an output of the ADC for a signal component in the desired-wave band which has been attenuated by the filtering operation of the analog signal processor.
摘要:
The radio receiver includes: a mixer configured to convert a received signal to an IF signal using a local oscillation signal; an IF processing section configured to limit the band of the IF signal; a detection section configured to demodulate the band-limited IF signal; a frequency control section configured to output a frequency control signal corresponding to a desired signal; and a local oscillation section configured to generate the local oscillation signal having a frequency corresponding to the desired signal according to the frequency control signal. The frequency control section outputs as the frequency control signal to change the frequency of the local oscillation signal so that the difference from the frequency corresponding to the desired signal is not more than the frequency of the IF signal, and determines one of the set values with which the corresponding image signal strength is lowest as the frequency control signal.
摘要:
A phase detector includes a decimator to decimate a digitized in-phase signal and a digitized quadrature signal to N times a symbol rate, where N is an integer greater than one. A burst detector to detect bursts in an output of the decimator. A carrier offset block to determine an offset angle based on an output of the burst detector. A rotator to generate a rotated signal by rotating the output of the decimator based on the offset angle determined by the carrier offset block. An equalizer to perform coherent demodulation of the rotated signal.