公开(公告)号：US08355454B2

公开(公告)日：2013-01-15

申请号：US12306775

申请日：2007-07-31

Applicant: Ippei Kanno

Inventor： Ippei Kanno

IPC: H04K1/10

CPC classification number: H04L25/0232 ,  H03G3/3078 ,  H04L25/03159 ,  H04L27/2647 ,  H04L2025/03522

Abstract: A reception device for receiving an OFDM signal whose level is maintained constant by performing an AGC control which adjusts an amplification gain by means of a discrete gain value includes an equalization section operable to execute an equalization process of detecting, respectively, distortions of a plurality of reference subcarriers regularly included in the OFDM signal on which the fast Fourier transform has been performed, and of estimating, by means of an interpolation using the detected distortions, a distortion of the OFDM signal, which distortion is caused by transmission path propagation so as to correct the estimated distortion of the OFDM signal, and the equalization section corrects, by using the AGC control signal, an estimated error of the distortion of the OFDM signal, which distortion is caused by a discrete amplification gain variation of the OFDM signal.

Abstract translation: 一种用于通过执行通过离散增益值调节放大增益的AGC控制来接收其电平保持恒定的OFDM信号的接收装置，包括：均衡部分，用于执行均衡处理，分别检测多个 在已经执行快速傅里叶变换的OFDM信号中规则地包括的参考子载波，以及通过使用检测到的失真的内插来估计OFDM信号的失真，该失真是由传输路径传播引起的，从而 校正OFDM信号的估计失真，并且均衡部分通过使用AGC控制信号来校正由OFDM信号的离散放大增益变化引起的失真的OFDM信号的失真的估计误差。

公开(公告)号：US07991058B2

公开(公告)日：2011-08-02

申请号：US11793527

申请日：2005-12-21

Applicant: Koji Setoh ,  Ippei Kanno ,  Akira Kisoda ,  Daisuke Hayashi ,  Ryosuke Mori ,  Tetsuya Yagi ,  Noritaka Iguchi

Inventor： Koji Setoh ,  Ippei Kanno ,  Akira Kisoda ,  Daisuke Hayashi ,  Ryosuke Mori ,  Tetsuya Yagi ,  Noritaka Iguchi

IPC: H04L27/28

CPC classification number: H04L27/2662 ,  H04L27/2678

Abstract: An OFDM reception device detects a time at which impulse noise occurs in a received OFDM signal, and specifies a start position candidate period that does not have intersymbol interference and is estimated to have a guard interval signal in a symbol. When setting a FFT window of an effective symbol length in a symbol duration of each symbol, if the impulse noise occurrence time is included in the symbol, the OFDM reception device determines a start position of the FFT window within a range of the start position candidate period so as to exclude the impulse noise occurrence time as much as possible.

Abstract translation: OFDM接收装置检测接收的OFDM信号中出现脉冲噪声的时间，并指定不具有码间干扰的开始位置候补周期，并且估计出具有符号中的保护间隔信号。 当在每个符号的符号持续时间中设置有效符号长度的FFT窗口时，如果脉冲噪声发生时间包括在符号中，则OFDM接收装置在开始位置候选的范围内确定FFT窗口的开始位置 以便尽可能地排除脉冲噪声发生时间。

公开(公告)号：US07142616B2

公开(公告)日：2006-11-28

申请号：US10104481

申请日：2002-03-25

Applicant: Mikihiro Ouchi ,  Ippei Kanno ,  Hisaya Kato

Inventor： Mikihiro Ouchi ,  Ippei Kanno ,  Hisaya Kato

IPC: H03K9/00

CPC classification number: H04L27/2647 ,  H04L27/38

Abstract: An OFDM baseband signal that has undergone a synchronization carrier modulation or a differential carrier modulation is inputted to a complex signal converter for nonlinear distortion equalization so as to be converted according to the N-th order function conversion characteristics (N>1). Then, nonlinear distortion in the OFDM baseband signal is compensated for. At this time, the following is used as a conversion equation: y(n)=x(n)+Σam(n)xm(n)(m>1) wherein the values of the input signal, the output signal and the coefficient for m-th order distortion equalization at time n are, respectively, x(n), y(n) and am(n).

Abstract translation: 已经经历了同步载波调制或差分载波调制的OFDM基带信号被输入到用于非线性失真均衡的复信号转换器，以便根据N阶函数转换特性（N> 1）进行转换。 然后，补偿OFDM基带信号中的非线性失真。 此时，将以下内容用作转换公式：<？in-line-formula description =“In-line formula”end =“lead”？> y（n）= x（n）+ Sigmaa （n）x（n）（m> 1）<？in-line-formula description =“In-line Formulas”end =“tail”？>其中， 时间n的输入信号，输出信号和m阶失真均衡的系数分别为x（n），y（n）和m（n）。

公开(公告)号：US20050249316A1

公开(公告)日：2005-11-10

申请号：US10524203

申请日：2004-06-14

Applicant: Hiroaki Ozeki ,  Yuichi Watanabe ,  Ippei Kanno ,  Yasuo Oba ,  Takeo Yasuho

Inventor： Hiroaki Ozeki ,  Yuichi Watanabe ,  Ippei Kanno ,  Yasuo Oba ,  Takeo Yasuho

IPC: H04B1/26 ,  H04J11/00 ,  H04L27/26 ,  H04L27/22

CPC classification number: H04L27/2647 ,  H03J1/0041 ,  H04N5/4401 ,  H04N21/41407 ,  H04N21/4305 ,  H04N21/4382 ,  H04N21/4436

Abstract: A digital signal receiver includes a reference signal generator for generating a first reference signal, a base band transform circuit for converting a first high-frequency signal with digital modulation into a base band signal with using the first reference signal, a frequency divider to divide the first reference signal, a frequency multiplier to multiply a frequency of a signal output from the frequency divider, and a digital demodulator to demodulate a signal output from the base band transform circuit with using the signal output from the frequency multiplier as a reference signal. The digital signal receiver consumes a small power since a small current flows in the frequency multiplier.

Abstract translation: 数字信号接收机包括用于产生第一参考信号的参考信号发生器，用于使用第一参考信号将具有数字调制的第一高频信号转换成基带信号的基带变换电路，分频器 第一参考信号，乘法器，用于乘以从分频器输出的信号的频率和数字解调器，以使用从倍频器输出的信号作为参考信号来解调从基带变换电路输出的信号。 数字信号接收器消耗小功率，因为​​小的电流在倍频器中流动。

公开(公告)号：US5535220A

公开(公告)日：1996-07-09

申请号：US182830

申请日：1994-01-19

Applicant: Ippei Kanno ,  Seiji Sakashita ,  Hiroaki Ozeki ,  Daisuke Hayashi ,  Todd S. Bowser

Inventor： Ippei Kanno ,  Seiji Sakashita ,  Hiroaki Ozeki ,  Daisuke Hayashi ,  Todd S. Bowser

IPC: H03M13/23 ,  H03M13/27 ,  H03M13/33 ,  H04L1/00 ,  H04L7/04 ,  H04L27/00 ,  H04L27/18 ,  G06F11/00

CPC classification number: H04L1/0071 ,  H03M13/271 ,  H03M13/276 ,  H03M13/33 ,  H04L1/0042 ,  H04L1/0054 ,  H04L7/048

Abstract: A forward error correcting transmitter and receiver for preventing the erroneous detection of synchronization is provided in a system in which synchronization of an interleaver circuit and a deinterleaver circuit, to be inserted between a convolutional encoder and a Viterbi decoder, is obtained from a synchronization detecting circuit of the Viterbi decoder. A LFSR (Linear Feedback Shift Register) is used as a row-direction address counter during writing and an up/down counter is used as a column-direction address counter during reading, during the interleaver circuit. In the deinterleaver circuit, an up/down counter is used as the column-direction address counter during writing, and an LFSR is used as the row-direction address counter during reading.

Abstract translation: 在从同步检测电路获得插入卷积编码器和维特比译码器之间的交错器电路和去交织器电路的同步的系统中，提供了用于防止同步错误检测的前向纠错发送器和接收器 的维特比解码器。 在写入期间，LFSR（线性反馈移位寄存器）用作行方向地址计数器，并且在交织器电路期间，在读取期间将升/降计数器用作列方向地址计数器。 在去交错电路中，在写入期间使用升/减计数器作为列方向地址计数器，在读取期间使用LFSR作为行方向地址计数器。

公开(公告)号：US5134707A

公开(公告)日：1992-07-28

申请号：US600988

申请日：1990-10-23

Applicant: Seiji Sakashita ,  Hiroaki Ozeki ,  Ippei Kanno

Inventor： Seiji Sakashita ,  Hiroaki Ozeki ,  Ippei Kanno

IPC: H03D3/24 ,  H04B1/16

CPC classification number: H03D3/244 ,  H03D3/242 ,  H04B1/1638

Abstract: Radio waves used in broadcasting and communications making use of broadcasting satellite and communication satellite are FM signals, and the frequency shift and exclusive bandwidth vary depending on the modulation signal. The satellite broadcasting receiver is designed to control the frequency shift so that the amplitude of the demodulation signal is constant, thereby making the bandwidth of the intermediate frequency filter, so as to be capable of receiving using just one filter. At this time, the frequency shift can be controlled continuously, from large to small one, in a predetermined exclusive bandwidth. When further expanding the frequency shift, since the exclusive bandwidth is extended, the noise electric power is increased and the receiving sensitivity is lowered as compared with the exclusive machine. Accordingly, when expanding the frequency shift, the noise bandwidth is narrowed in the PLL demodulator, thereby enhancing the receiving sensitivity.

公开(公告)号：US5014349A

公开(公告)日：1991-05-07

申请号：US397451

申请日：1989-08-14

Applicant: Kazuhiko Kubo ,  Akira Usui ,  Seiji Sakashita ,  Hiroaki Ozeki ,  Ippei Kanno

Inventor： Kazuhiko Kubo ,  Akira Usui ,  Seiji Sakashita ,  Hiroaki Ozeki ,  Ippei Kanno

IPC: H04B1/26 ,  H03D7/16 ,  H03J5/24 ,  H04N7/20

CPC classification number: H03D7/161 ,  H03J5/242 ,  H04N7/20

Abstract: The invention relates to a television receiving tuner for receiving television signals of VHF band/UHF band, a CATV signal, and a satellite television broadcasting signal. As a circuit for receiving the television signals of the VHF band/UHF band and the CATV signal as a first input signal, there is provided a double super type tuner of the up/down converter system including a first local oscillator (6) and a first mixer (5) which construct an up converter and a second local oscillator (10) and a second mixer (9) which construct a down converter. When the satellite television broadcasting signal as a second input signal is received, the first local oscillator (6) and the first mixer (5) in the up converter section are switched by switching circuits (12, 13) and used as a down converter. At least the first local oscillator (6) and the first mixer (5) are commonly used both for reception of the television signals of the VHF band/UHF band and the CATV signal and for reception of the satellite television broadcasting signal, thereby accomplishing the simplification of the construction and the low costs.

Abstract translation: PCT No.PCT / JP88 / 01313 Sec。 371日期1989年8月14日 102（e）日期1989年8月14日PCT提交1988年12月23日PCT公布。 出版物WO89 / 06072 日期：1989年6月29日。本发明涉及一种用于接收VHF频带/ UHF频带的电视信号，CATV信号和卫星电视广播信号的电视接收调谐器。 作为用于接收VHF频带/ UHF频带的电视信号和CATV信号作为第一输入信号的电路，提供了一种上/下变换器系统的双超型调谐器，包括第一本地振荡器（6）和 第一混频器（5），其构造升压转换器和构成下变频器的第二本地振荡器（10）和第二混频器（9）。 当接收到作为第二输入信号的卫星电视广播信号时，上变频器部分中的第一本地振荡器（6）和第一混频器（5）由开关电路（12,13）切换并用作下变频器。 至少第一本地振荡器（6）和第一混频器（5）通常用于接收VHF频带/ UHF频带的电视信号和CATV信号，并且用于接收卫星电视广播信号，从而完成 简化施工和低成本。

公开(公告)号：US07865218B2

公开(公告)日：2011-01-04

申请号：US10588270

申请日：2005-12-02

Applicant: Noritaka Iguchi ,  Ryosuke Mori ,  Tetsuya Yagi ,  Koji Setoh ,  Daisuke Hayashi ,  Ippei Kanno

Inventor： Noritaka Iguchi ,  Ryosuke Mori ,  Tetsuya Yagi ,  Koji Setoh ,  Daisuke Hayashi ,  Ippei Kanno

IPC: H04B1/38

CPC classification number: H04L1/0057 ,  H04L1/0045 ,  H04L1/0064 ,  H04N5/4401 ,  H04N21/4382 ,  H04N21/4436 ,  H04N21/64315 ,  H04W52/0229 ,  H04W52/0274 ,  Y02D70/142 ,  Y02D70/144 ,  Y02D70/168

Abstract: A receiving device performs reception in a service period of a broadcast signal and switches to a power saving mode in a non-service period. The service period is composed of a first period during which an application data table of an MPE-FEC frame is transmitted and a second period, following the first period, during which an RS data table of the MPE-FEC frame is transmitted. An error correction unit 12 performs one of error correction that uses the whole RS data table according to MPE-FEC, and erasure correction that uses a same number of parity bytes as bytes having bit errors. When the bit errors are corrected by the error correction unit 12 performing erasure correction, a power control unit 30 switches a receiving circuit to a power saving mode before the second period ends.

Abstract translation: 接收装置在广播信号的服务期间进行接收，并在非服务期间切换到省电模式。 服务周期由发送MPE-FEC帧的应用数据表的第一周期和在第一周期之后的第二周期组成，在该周期期间发送MPE-FEC帧的RS数据表。 错误校正单元12执行根据MPE-FEC使用整个RS数据表的纠错中的一种，以及使用与具有位错误的字节相同数量的奇偶校验字节的擦除校正。 当错误校正单元12执行擦除校正来校正位错误时，功率控制单元30在第二周期结束之前将接收电路切换到省电模式。

公开(公告)号：US07715886B2

公开(公告)日：2010-05-11

申请号：US11579736

申请日：2005-05-11

Applicant: Ippei Kanno ,  Ryosuke Mori ,  Daisuke Hayashi ,  Kouji Setoh ,  Tetsuya Yagi ,  Noritaka Iguchi

Inventor： Ippei Kanno ,  Ryosuke Mori ,  Daisuke Hayashi ,  Kouji Setoh ,  Tetsuya Yagi ,  Noritaka Iguchi

IPC: H04B7/212 ,  H04B1/16 ,  H04L27/00 ,  H03D3/18

CPC classification number: H04W52/0241 ,  H04B1/1615 ,  Y02D70/168 ,  Y02D70/26 ,  Y02D70/40

Abstract: The present invention aims to provide a reception apparatus that receives and demodulates a signal transmitted by using time-division multiplexing, with reduced power consumption. In detail, a receiving unit including a tuner operates to receive a signal only during a time period for which a desired signal is transmitted. The received signal is converted into digital data, and the digital data is stored into a memory. With the use of the digital data stored in the memory, a PLL performs all of the necessary operations from synchronization establishment to demodulation.

Abstract translation: 本发明旨在提供一种接收装置，其以降低的功耗来接收和解调使用时分多路传输的信号。 详细地说，包括调谐器的接收单元仅在期望的信号被发送的时间周期内接收信号。 接收到的信号被转换为数字数据，数字数据被存储到存储器中。 通过使用存储在存储器中的数字数据，PLL执行从同步建立到解调的所有必要操作。

公开(公告)号：US07098967B2

公开(公告)日：2006-08-29

申请号：US10247749

申请日：2002-09-20

Applicant: Ippei Kanno ,  Hiroaki Ozeki ,  Yasuo Oba ,  Akira Fujishima ,  Mineyuki Iwaida

Inventor： Ippei Kanno ,  Hiroaki Ozeki ,  Yasuo Oba ,  Akira Fujishima ,  Mineyuki Iwaida

IPC: H04N5/455

CPC classification number: H04B1/1027 ,  H03D7/165 ,  H03J1/005 ,  H04N5/4401 ,  H04N5/455

Abstract: Frequency conversion into a first intermediate frequency which is higher than a received frequency band is performed for a received signal by using a mixer and a PLL. Next, an output of the mixer is frequency converted into a second intermediate frequency of a base band by using a quadrature mixer formed by mixers and a phase shifter. At this time, a frequency of the local oscillation signal of a PLL supplied to the quadrature mixer is controlled so as to be switched, depending on a position of the received segment, between a frequency which is higher than the first intermediate frequency and a frequency which is lower than the same.

Abstract translation: 通过使用混频器和PLL对接收信号执行高于接收频带的第一中频的频率转换。 接下来，通过使用由混频器和移相器形成的正交混频器将混频器的输出频率转换为基带的第二中频。 此时，提供给正交混频器的PLL的本地振荡信号的频率被控制，以便根据接收段的位置在高于第一中频的频率和频率之间切换 低于相同。