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    Margin Test Methods and Circuits
    2.
    发明申请
    Margin Test Methods and Circuits 有权

    公开(公告)号：US20210126722A1

    公开(公告)日：2021-04-29

    申请号：US17102779

    申请日：2020-11-24

    Applicant: Rambus Inc.

    Inventor： Andrew Ho ,  Vladimir Stojanovic ,  Bruno W. Garlepp ,  Fred F. Chen

    IPC: H04B17/29 ,  H04L25/03 ,  H04L27/01 ,  H04B17/21 ,  G01R31/317 ,  H04L1/20 ,  H04L1/24 ,  H04L7/033 ,  G06F11/08

    Abstract: Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.

    Selectable-tap Equalizer
    3.
    发明申请
    Selectable-tap Equalizer 审中-公开

    公开(公告)号：US20190342127A1

    公开(公告)日：2019-11-07

    申请号：US16432283

    申请日：2019-06-05

    Applicant: Rambus Inc.

    Inventor： Jared L. Zerbe ,  Vladimir M. Stojanovic ,  Fred F. Chen

    IPC: H04L25/03 ,  H04L7/00 ,  H04L7/033 ,  H04B1/10

    Abstract: A signaling circuit having a selectable-tap equalizer. The signaling circuit includes a buffer, a select circuit and an equalizing circuit. The buffer is used to store a plurality of data values that correspond to data signals transmitted on a signaling path during a first time interval. The select circuit is coupled to the buffer to select a subset of data values from the plurality of data values according to a select value. The equalizing circuit is coupled to receive the subset of data values from the select circuit and is adapted to adjust, according to the subset of data values, a signal level that corresponds to a data signal transmitted on the signaling path during a second time interval.

    High speed signaling system with adaptive transmit pre-emphasis
    4.
    发明授权
    High speed signaling system with adaptive transmit pre-emphasis 有权

    公开(公告)号：US10411923B2

    公开(公告)日：2019-09-10

    申请号：US15616408

    申请日：2017-06-07

    Applicant: Rambus Inc.

    Inventor： Vladimir M. Stojanovic ,  Andrew C. Ho ,  Anthony Bessios ,  Fred F. Chen ,  Elad Alon ,  Mark A. Horowitz

    IPC: H04L25/49 ,  H04L25/02 ,  H04L25/03 ,  H04L25/06 ,  H04B1/04

    Abstract: A high-speed signaling system with adaptive transmit pre-emphasis. A transmit circuit has a plurality of output drivers to output a first signal onto a signal path. A receive circuit is coupled to receive the first signal via the signal path and configured to generate an indication of whether the first signal exceeds a threshold level. A first threshold control circuit is coupled to receive the indication from the receive circuit and configured to adjust the threshold level according to whether the first signal exceeds the threshold level. A drive strength control circuit is coupled to receive the indication from the receive circuit and configured to adjust a drive strength of at least one output driver of the plurality of output drivers according to whether the first signal exceeds the threshold level.

    Selectabe-tap equalizer
    5.
    发明授权
    Selectabe-tap equalizer 有权

    公开(公告)号：US10355888B2

    公开(公告)日：2019-07-16

    申请号：US16126121

    申请日：2018-09-10

    Applicant: Rambus Inc.

    Inventor： Jared L. Zerbe ,  Vladimir M. Stojanovic ,  Fred F. Chen

    IPC: H04L25/03 ,  H04L7/033 ,  H04L7/00 ,  H04B1/10

    Abstract: A signaling circuit having a selectable-tap equalizer. The signaling circuit includes a buffer, a select circuit and an equalizing circuit. The buffer is used to store a plurality of data values that correspond to data signals transmitted on a signaling path during a first time interval. The select circuit is coupled to the buffer to select a subset of data values from the plurality of data values according to a select value. The equalizing circuit is coupled to receive the subset of data values from the select circuit and is adapted to adjust, according to the subset of data values, a signal level that corresponds to a data signal transmitted on the signaling path during a second time interval.

    Selectable-tap equalizer
    8.
    发明授权
    Selectable-tap equalizer 有权

    公开(公告)号：US10103907B2

    公开(公告)日：2018-10-16

    申请号：US15715032

    申请日：2017-09-25

    Applicant: Rambus Inc.

    Inventor： Jared L. Zerbe ,  Vladimir M. Stojanovic ,  Fred F. Chen

    IPC: H04L25/03 ,  H04B1/10 ,  H04L7/033 ,  H04L7/00

    Abstract: A signaling circuit having a selectable-tap equalizer. The signaling circuit includes a buffer, a select circuit and an equalizing circuit. The buffer is used to store a plurality of data values that correspond to data signals transmitted on a signaling path during a first time interval. The select circuit is coupled to the buffer to select a subset of data values from the plurality of data values according to a select value. The equalizing circuit is coupled to receive the subset of data values from the select circuit and is adapted to adjust, according to the subset of data values, a signal level that corresponds to a data signal transmitted on the signaling path during a second time interval.

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