Abstract:
A method for forming an emitter tip for use in a field emission device. An emitter layer is provided over a substrate. The emitter layer is overlaid with a blanket dielectric which is in turn overlaid by a masking layer. In a first etching operation, a masking island and an underlying dielectric island are formed from the masking layer and the blanket dielectric, respectively. These islands serve as a masking structure during subsequent etching processes by which an emitter tip is formed from the emitter layer. Accordingly, a second etching operation is conducted, whereby an etch chemistry which exhibits both isotropic and anisotropic characteristics is used to remove a portion of the emitter layer by undercutting beneath the masking structure. A third etching operation is conducted, wherein the etch chemistry is substantially more anisotropic than the etch chemistry of the second etching operation. The second and third etches mobilize a portion of the masking layer and form an emitter tip from the emitter layer. The emitter tip has a substantially rectilinear vertical profile.
Abstract:
A solid state vacuum device (SSVD) and method for making the same. In one embodiment, the SSVD forms a triode device comprising a substrate having a cavity formed therein. The SSVD further comprises an anode positioned in the cavity of the substrate, a cathode suspended over the cavity of the substrate, and a grid positioned between the cathode and anode. In addition, the SSVD comprises a seal for creating a vacuum environment in the area surrounding the grid, cathode, and anode. Upon applying heat to the cathode, electrons are released from the cathode, passed through the grid, and received by the anode. In response to receiving the electrons, the anode produces a current. The current produced by the anode is controlled by a voltage applied to the grid. Other embodiments of the present invention provide diode, tetrode, pentode, and other higher order device configurations.
Abstract:
A technique for providing a grid for a gate such as utilized in gating a stream of ions or other particles in a spectrometer instrument. The grid of wires may, for example, be a so-called Bradbury-Nielson Gate that consists of a set of two electrically isolated sets of equally spaced wires that lie substantially in the same plane and alternate in potential. The method utilized to provide is to first fabricate a frame of an insulating substrate having a hole and depositing metal film patterns such that conductive portions are formed on either side of the hole. Conductive portions on either side form a series of terminating pads on the portion of the substrate closest to the hole and a bus bar. Grid wires are then formed by stretching a section of wire with desired constant tension across the hole and bonding the ends of the wire to a respective one of the pads on one side and bus bar on the other side. The method provides a rapid, inexpensive way to fabricate such modulating devices.
Abstract:
In a method of manufacturing matrix electron emitter arrays, each array comprising a plurality of scanning lines formed on a glass substrate and arranged in parallel with each other, a plurality of signal lines formed in a direction to cross the scanning lines and arranged in parallel with each other, and field-emission type electron emitters formed in the pixel areas which are arranged at the intersections of the scanning lines and the signal lines, a pulse voltage with a specific polarity and another pulse voltage with the reverse polarity are applied to any two of the scanning lines and current is caused to flow through electron emitters connected in series-via a signal line, thereby subjecting the conductive thin film constituting an electron emitter to a conductive activation process for forming an electron emitting section.
Abstract:
The invention relates to linear beam amplification devices having an electron emitting cathode and an RF modulated grid closely spaced therefrom, and more particularly, to a novel support structure for the grid that accommodates thermal expansion while maintaining an optimum grid-to-cathode spacing.