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公开(公告)号：US11545944B2
公开(公告)日：2023-01-03
申请号：US17151922
申请日：2021-01-19
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Jun Enomoto , Kazuo Watanabe , Satoshi Tanaka , Yusuke Tanaka , Makoto Ito
Abstract: A power amplifier circuit includes a power amplifier including a first transistor having a first terminal connected to a reference potential, a second terminal to which a first current and a radio-frequency signal are input, and a third terminal connected to a first power supply potential via a first inductor; a capacitor connected to the third terminal of the first transistor; a second transistor including a first terminal connected to the capacitor and the reference potential via a second inductor, a second terminal to which a second current is input and is connected to the reference potential, and a third terminal connected to the first power supply potential via a third inductor and outputs signal; and an adjustment circuit that outputs a third current corresponding to the first power supply potential or a second power supply potential to the second terminal of the second transistor.
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公开(公告)号：US11515840B2
公开(公告)日：2022-11-29
申请号：US16897102
申请日：2020-06-09
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Kazuo Watanabe , Satoshi Tanaka , Norio Hayashi , Kazuma Sugiura
Abstract: The present disclosure is to improve the power added efficiency of a power amplifier at high output power. The power amplifier includes: a first capacitor with a radio frequency signal input to one end thereof; a first transistor whose base is connected to the other end of the first capacitor to amplify the radio frequency signal; a bias circuit for supplying bias to the base of the first transistor; and a second capacitor with one end connected to the base of the first transistor and the other end connected to the emitter of the first transistor.
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公开(公告)号：US11323081B2
公开(公告)日：2022-05-03
申请号：US17078876
申请日：2020-10-23
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Arayashiki , Kazuo Watanabe , Satoshi Tanaka
Abstract: A power amplifier circuit includes lower-stage and upper-stage differential amplifying pairs, a combiner, first and second inductors, and first and second capacitors. First and second signals are input into the lower-stage differential amplifying pair. The upper-stage differential amplifying pair outputs first and second amplified signals. The combiner combines the first and second amplified signals. The lower-stage differential amplifying pair includes first and second transistors. A supply voltage is supplied to the collectors of the first and second transistors. The first and second signals are supplied to the bases of the first and second transistors. The upper-stage differential amplifying pair includes third and fourth transistors. A supply voltage is supplied to the collectors of the third and fourth transistors. The emitters of the third and fourth transistors are grounded via the first and second inductors and are connected to the first and second transistors via the first and second capacitors.
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公开(公告)号：US20200076384A1
公开(公告)日：2020-03-05
申请号：US16549057
申请日：2019-08-23
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kazuo Watanabe , Yusuke Tanaka , Satoshi Arayashiki
Abstract: A power amplifier circuit includes a lower transistor having a first terminal, a second terminal connected to ground, and a third terminal, wherein a first power supply voltage is supplied to the first terminal, and an input signal is supplied to the third terminal; a first capacitor; an upper transistor having a first terminal, a second terminal connected to the first terminal of the lower transistor via the first capacitor, and a third terminal, wherein a second power supply voltage is supplied to the first terminal, an amplified signal is outputted to an output terminal from the first terminal, and a driving voltage is supplied to the third terminal; a first inductor that connects the second terminal of the upper transistor to ground; a voltage regulator circuit; and at least one termination circuit that short-circuits an even-order harmonic or odd-order harmonic of the amplified signal to ground potential.
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公开(公告)号：US11469715B2
公开(公告)日：2022-10-11
申请号：US17109389
申请日：2020-12-02
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Jun Enomoto , Kazuo Watanabe , Satoshi Tanaka , Yusuke Tanaka , Makoto Itou
Abstract: A power amplifier circuit includes first and second bias circuits configured to provide first and second biases, respectively, a first transistor having an emitter connected to a reference potential, a base configured to receive the first bias via a first resistor and receive a radio-frequency input signal via a first capacitor, and a collector configured to output an amplified radio-frequency signal, a second transistor having a base connected to the reference potential via a second capacitor and configured to receive the second bias via a second resistor, an emitter configured to receive the radio-frequency signal, and a collector connected to a power supply potential via a third inductor and configured to output a radio-frequency output signal, and an impedance circuit having a first end connected to an output section of the second bias circuit and configured to apply an alternating-current signal to a path extending from the second bias circuit.
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Patent Agency Ranking
公开(公告)号：US10985715B2
公开(公告)日：2021-04-20
申请号：US16549057
申请日：2019-08-23
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kazuo Watanabe , Yusuke Tanaka , Satoshi Arayashiki
Abstract: A power amplifier circuit includes a lower transistor having a first terminal, a second terminal connected to ground, and a third terminal, wherein a first power supply voltage is supplied to the first terminal, and an input signal is supplied to the third terminal; a first capacitor; an upper transistor having a first terminal, a second terminal connected to the first terminal of the lower transistor via the first capacitor, and a third terminal, wherein a second power supply voltage is supplied to the first terminal, an amplified signal is outputted to an output terminal from the first terminal, and a driving voltage is supplied to the third terminal; a first inductor that connects the second terminal of the upper transistor to ground; a voltage regulator circuit; and at least one termination circuit that short-circuits an even-order harmonic or odd-order harmonic of the amplified signal to ground potential.
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公开(公告)号：US10972051B2
公开(公告)日：2021-04-06
申请号：US16538932
申请日：2019-08-13
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Satoshi Arayashiki , Kazuo Watanabe
Abstract: A power amplifier circuit includes a first amplifier that amplifies an input signal and outputs an output signal; a second amplifier that, in accordance with a control signal, amplifies a signal corresponding to the input signal, generates a signal having an opposite phase to that of the output signal, and adds the signal to the output signal; and a control circuit that supplies the control signal to the second amplifier. The control circuit outputs the control signal so that during operation of the power amplifier circuit in a first power mode, a gain of the second amplifier is not less than zero and less than a predetermined level and during operation in a second power mode lower than the first power mode in output power level, a gain of the second amplifier is not less than the predetermined level and less than a gain of the first amplifier.
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公开(公告)号：US10944438B2
公开(公告)日：2021-03-09
申请号：US16285408
申请日：2019-02-26
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kazuo Watanabe , Tetsuaki Adachi , Masahito Numanami , Yasuhisa Yamamoto
Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
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公开(公告)号：US10177724B2
公开(公告)日：2019-01-08
申请号：US15600993
申请日：2017-05-22
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Kazuo Watanabe , Takayuki Tsutsui , Masao Kondo , Satoshi Arayashiki , Fumio Harima , Masatoshi Hase
IPC: H03F3/04 , H03F3/24 , H03F1/02 , H03F1/56 , H03F3/00 , H03F3/195 , H03F3/21 , H04L5/00 , H04L5/14 , H03F1/22 , H04W88/00
Abstract: A power amplifier circuit includes first and second transistors and a first voltage output circuit. A radio frequency signal is input into a base of the first transistor. The first voltage output circuit outputs a first voltage in accordance with a power supply voltage. The first voltage is supplied to a base or a gate of the second transistor. An emitter or a source of the second transistor is connected to a collector of the first transistor. A first amplified signal generated by amplifying the radio frequency signal is output from a collector or a drain of the second transistor.
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公开(公告)号：US10171036B2
公开(公告)日：2019-01-01
申请号：US15656646
申请日：2017-07-21
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Tetsuaki Adachi , Kazuo Watanabe , Masahito Numanami , Yasuhisa Yamamoto
Abstract: Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.
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