公开(公告)号：WO2009142718A3

公开(公告)日：2010-02-18

申请号：PCT/US2009003083

申请日：2009-05-19

Applicant: SILICON LAB INC ,  BEALE RICHARD G ,  KHOURY JOHN M

Inventor： BEALE RICHARD G ,  KHOURY JOHN M

IPC: H03F3/217

CPC classification number: H03F3/217 ,  H03F3/2173

Abstract: Methods and systems are disclosed for predictive feedback compensation (PFC) circuitry for suppressing distortions caused by supply voltage variations and output amplitude switching non-idealities in pulse width modulated (PWM) switching amplifiers by pre-compensating the PWM input based upon the supply voltage or output pulse amplitude. Output amplitude errors associated with previous PWM output signals are used to predict output amplitude errors expected for future PWM output signals. These predicted output amplitude errors are then used to adjust the pulse widths for the future PWM output signals. Closed loop width adjustment can also be applied by providing timing feedback signals associated with the pre-compensation of the PWM input signals. Traditional feedback techniques can also be used in conjunction with the predictive feedback compensation (PFC) circuitry.

Abstract translation: 公开了用于通过基于电源电压预补偿PWM输入来抑制由脉冲宽度调制（PWM）开关放大器中的电源电压变化和输出幅度切换非理想性引起的失真的预测反馈补偿（PFC）电路的方法和系统， 输出脉冲幅度。 与先前PWM输出信号相关的输出幅度误差用于预测未来PWM输出信号预期的输出幅度误差。 这些预测的输出振幅误差然后用于调整未来PWM输出信号的脉冲宽度。 也可以通过提供与PWM输入信号的预补偿相关联的定时反馈信号来应用闭环宽度调整。 传统的反馈技术也可以与预测反馈补偿（PFC）电路结合使用。

公开(公告)号：WO2008039381A3

公开(公告)日：2008-06-19

申请号：PCT/US2007020505

申请日：2007-09-21

Applicant: SILICON LAB INC ,  COOLEY DANIEL J ,  RAFI ASLAMALI A

Inventor： COOLEY DANIEL J ,  RAFI ASLAMALI A

IPC: H04B1/16

CPC classification number: H04B1/30 ,  H03D7/14 ,  H03D2200/0086

Abstract: A technique includes providing a plurality of local oscillator signals such that each of the local oscillator signals has a different phase. The technique includes providing scaling units to scale the input signal pursuant to different scaling factors to generate scaled input signals. The scaling factors are selected on a periodic function of the phases. The technique also includes providing mixing circuits to mix the local oscillator signals with the scaled input signals to generate mixed signals and providing an adder to combine the mixed signals to generate an output signal.

Abstract translation: 一种技术包括提供多个本地振荡器信号，使得每个本地振荡器信号具有不同的相位。 该技术包括提供缩放单元以根据不同的缩放因子缩放输入信号以产生缩放的输入信号。 在相位的周期函数上选择缩放因子。 该技术还包括提供混合电路以将本地振荡器信号与缩放的输入信号混合以产生混合信号并提供加法器来组合混合信号以产生输出信号。

公开(公告)号：WO2007041554A3

公开(公告)日：2007-12-13

申请号：PCT/US2006038571

申请日：2006-09-29

Applicant: SILICON LAB INC ,  FOSLER ROSS MARTIN

Inventor： FOSLER ROSS MARTIN

IPC: H03M1/12

CPC classification number: H02M3/337 ,  H02M3/33515 ,  H02M3/33569 ,  H02M3/33592 ,  Y02B70/1475

Abstract: A system for analyzing the operation of a switching power converter includes a digital controller for receiving an analog signal representing the output DC voltage of the power converter for comparison to a desired output voltage level and generating switching control signals to control the operation of the power supply to regulate the output DC voltage to said output voltage level. At least one portion of a control loop within the digital controller may he switched into the control loop in a first mode of operation and out of the control loop in a second mode of operation. A microcontroller emulates the operation of the at least one portion of the control loop during the second mode of operation.

Abstract translation: 一种用于分析开关功率变换器的操作的系统包括：数字控制器，用于接收表示功率变换器的输出DC电压的模拟信号，用于与期望的输出电压电平进行比较，并产生开关控制信号以控制电源的操作 以将输出DC电压调节到所述输出电压电平。 数字控制器内的控制回路的至少一部分可以在第一操作模式下切换到控制回路中并且在第二操作模式下切换到控制回路外。 微控制器在第二操作模式期间模拟控制回路的至少一部分的操作。

公开(公告)号：WO2006004973A3

公开(公告)日：2006-12-28

申请号：PCT/US2005023407

申请日：2005-06-29

Applicant: SILICON LAB INC ,  FERNALD KENNETH W ,  ALFANO E DONALD

Inventor： FERNALD KENNETH W ,  ALFANO E DONALD

IPC: G06F1/26

CPC classification number: G06F1/3203

Abstract: A microcontroller unit (MCU) is disclosed with a stand-alone Real Time Clock (RTC). The MCU includes a processing circuit for receiving digital information and processing said received digital information. A primary clock circuit provides the timing for the processing circuit. A power control circuit controls the power to the processing circuit and the primary clock circuit to control the operation thereof to operate in at least a full power mode drawing a full power level from a supply voltage input and a reduced power mode drawing less than the full power level from the supply voltage input. A stand-alone RTC circuit is also provided, the stand­alone RTC circuit including an RTC clock circuit operating independent of the primary clock circuit. A timer clocked by the RTC clock circuit is operable to increment a stored time value for output therefrom, the RTC clock circuit having a defined time base. An input/output (I/O) device provides access by the processing circuit to the results output by the timer. A power management circuitry manages the power to the stand-alone RTC circuit, such that the RTC clock circuit, the timer, and the I/O device operate regardless of the power mode of operation of the processing circuitry and the primary clock circuit.

Abstract translation: 公开了具有独立实时时钟（RTC）的微控制器单元（MCU）。 MCU包括用于接收数字信息并处理所接收的数字信息的处理电路。 主时钟电路为处理电路提供定时。 电源控制电路控制处理电路和主时钟电路的电源，以控制其操作至少在全功率模式下工作，从供电电压输入和低功耗模式绘制小于全功率模式 功率电平由电源电压输入。 还提供独立的RTC电路，独立的RTC电路包括独立于主时钟电路工作的RTC时钟电路。 由RTC时钟电路计时钟的定时器可操作地增加存储的时间值以便从其输出，RTC时钟电路具有确定的时基。 输入/输出（I / O）设备提供处理电路对定时器输出的结果的访问。 电源管理电路管理独立RTC电路的电源，使得RTC时钟电路，定时器和I / O设备无论处理电路和主时钟电路的功率工作模式如何都工作。

公开(公告)号：WO2006015015A2

公开(公告)日：2006-02-09

申请号：PCT/US2005026586

申请日：2005-07-27

Applicant: SILICON LAB INC ,  LEUNG KA Y ,  LEUNG KAFAI ,  XAIO JINWEN ,  WEI CHIA-LING ,  STORVIK ALVIN C ,  SAHU BIRANCHINATH ,  ALFANO DONALD

Inventor： LEUNG KA Y ,  LEUNG KAFAI ,  XAIO JINWEN ,  WEI CHIA-LING ,  STORVIK ALVIN C ,  SAHU BIRANCHINATH ,  ALFANO DONALD

IPC: H02M1/00

CPC classification number: H02M3/33515 ,  H02M3/157 ,  H02M2001/0012 ,  H02M2001/007

Abstract: A digital controller (408, 412, 416) for controlling the operation of a DC-DC switching converter is disclosed. A digital feedback control system is provided for receiving an analog input voltage (406) representing the output of the switching converter and digitally processing the analog input voltage by comparing it to a reference voltage and then determining analog drive signals to control the operation of the switching converter (402) to provide a regulated output. The digital feedback control system (408, 412, 416) operates in accordance with predetermined operating parametrics. The digital feedback control system (408, 412, 416) also has monitoring inputs and control inputs. A microcontroller (442) monitors the operation of the digital feedback control system and is able to change the operating parametrics under certain predetermined conditions.

Abstract translation: 公开了用于控制DC-DC开关转换器的操作的数字控制器（408,412,416）。 提供数字反馈控制系统，用于接收表示开关转换器的输出的模拟输入电压（406），并通过将模拟输入电压与参考电压进行比较来数字处理模拟输入电压，然后确定模拟驱动信号以控制开关的操作 转换器（402）提供经调节的输出。 数字反馈控制系统（408,412,416）根据预定的操作参数进行操作。 数字反馈控制系统（408,412,416）也具有监控输入和控制输入。 微控制器（442）监视数字反馈控制系统的操作并且能够在某些预定条件下改变操作参数。

公开(公告)号：WO2005031965A3

公开(公告)日：2005-08-11

申请号：PCT/US2004031924

申请日：2004-09-23

Applicant: SILICON LAB INC ,  DUPUIS TIMOTHY J ,  PAUL SUSANNE A

Inventor： DUPUIS TIMOTHY J ,  PAUL SUSANNE A

IPC: H03F1/52 ,  H03F3/193 ,  H03F3/21 ,  H03F3/24 ,  H03F3/42 ,  H03F3/68

CPC classification number: H03F1/523 ,  H03F1/52 ,  H03F3/189 ,  H03F3/193 ,  H03F3/211 ,  H03F3/24 ,  H03F3/423

Abstract: A method and apparatus provide techniques for electrically isolating switching devices MI (M l), M2 (M2) in a stacked RF power amplifier, which prevents the switching devices MI (M1), M2 (M2) from being subjected to high breakdown voltages. The isolation provided allows the power amplifier to be implemented on an integrated circuit (Fig. 5).

Abstract translation: 一种方法和装置提供了用于电隔离层叠RF功率放大器中的开关器件MI（M1），M2（M2）的技术，其防止开关器件MI（M1），M2（M2）经受高击穿电压。 所提供的隔离允许在集成电路上实现功率放大器（图5）。

公开(公告)号：WO02056488A3

公开(公告)日：2003-03-06

申请号：PCT/US0200895

申请日：2002-01-10

Applicant: SILICON LAB INC

Inventor： VISHAKHADATTA G DIWAKAR ,  SCOTT JEFFREY W ,  TUTTLE G TYSON ,  SRINIVASAN VISHNU SHANKAR ,  RAFI ASLAMALI A

IPC: H04B1/28 ,  H04B1/40 ,  H04B15/02 ,  H04B15/04

CPC classification number: H04B1/0003 ,  H04B1/28 ,  H04B1/406 ,  H04B15/02 ,  H04B15/04 ,  H04B2215/064

Abstract: Radio-frequency (RF) apparatus includes receiver analog circuitry that receives an RF signal and provides at least one digital signal to receiver digital circuitry that functions in cooperation with the receiver analog circuitry. The interface between the receiver analog circuitry and the receiver digital circuitry includes configurable signal lines that function as a serial interface, or as a data and clock signal interface, depending on the state of a control signal.

Abstract translation: 射频（RF）设备包括接收模拟电路，其接收RF信号并且向与接收机模拟电路协作起作用的接收机数字电路提供至少一个数字信号。 接收器模拟电路和接收机数字电路之间的接口包括用作串行接口的可配置信号线，或者根据控制信号的状态作为数据和时钟信号接口。

公开(公告)号：WO0205428A2

公开(公告)日：2002-01-17

申请号：PCT/US0121644

申请日：2001-07-10

Applicant: SILICON LAB INC

Inventor： PERROTT MICHAEL H ,  BAIRD REX T

IPC: H03L7/085 ,  H03L7/087 ,  H03L7/091 ,  H03L7/093 ,  H03L7/095 ,  H04L7/00 ,  H04L7/033 ,  H03L

CPC classification number: H04L7/033 ,  H03L7/085 ,  H03L7/087 ,  H03L7/091 ,  H03L7/093 ,  H03L7/095 ,  H04L7/0004

Abstract: In a feedback system such as a PLL, the integrating function associated with a loop filter capacitor is instead implemented digitally and is easily implemented on the same integrated circuit die as the PLL. In a preferred embodiment, an analog phase detector is utilized whose phase error output signal is delta-sigma modulated to encode the magnitude of the phase error using a digital (i.e., discrete-time and discrete-value) signal. This digital phase error signal is "integrated" by a digital integration block including, for example, a digital accumulator, whose output is then converted to an analog signal, optionally combined with a loop feed-forward signal, and then conveyed as a control voltage to the voltage-controlled oscillator. The equivalent "size" of the integrating capacitor function provided by the digital integration block may be varied by increasing or decreasing the bit resolution of circuits within the digital block.

Abstract translation: 在诸如PLL的反馈系统中，与环路滤波电容器相关联的积分功能被数字地实现，并且容易在与PLL相同的集成电路管芯上实现。 在一个优选实施例中，利用模拟相位检测器，其相位误差输出信号被ΔΣ调制以使用数字（即，离散时间和离散值）信号来编码相位误差的量值。 该数字相位误差信号由包括例如数字累加器的数字积分模块“集成”，该数字累加器的输出然后被转换为模拟信号，可选地与环路前馈信号组合，然后作为控制电压 到压控振荡器。 由数字积分模块提供的积分电容器功能的等效“尺寸”可以通过增加或减少数字模块内的电路的位分辨率来改变。

公开(公告)号：WO2009148835A3

公开(公告)日：2010-02-25

申请号：PCT/US2009044759

申请日：2009-05-21

Applicant: SILICON LAB INC ,  ELENES JAVIER

Inventor： ELENES JAVIER

IPC: H04B1/06 ,  H04L27/00

CPC classification number: H04B7/0857 ,  H04B1/1081

Abstract: In one embodiment, the present invention provide a method for detecting signal quality metrics of a constant modulo (CM) signal received in two different signal paths, and combining the signal from the two signal paths based at least in part on the detected first and second signal quality metrics. Such method may be implemented in a radio receiver such as an automobile receiver.

Abstract translation: 在一个实施例中，本发明提供了一种用于检测在两个不同信号路径中接收的恒定模（CM）信号的信号质量度量的方法，并且至少部分地基于所检测的第一和第二信号组合来自两个信号路径的信号 信号质量指标。 这种方法可以在诸如汽车接收机的无线电接收机中实现。

公开(公告)号：WO2009143235A2

公开(公告)日：2009-11-26

申请号：PCT/US2009044661

申请日：2009-05-20

Applicant: SILICON LAB INC ,  HABAN SCOTT ,  HESTER DYLAN ,  SUN RUIFENG

Inventor： HABAN SCOTT ,  HESTER DYLAN ,  SUN RUIFENG

IPC: H04B1/40 ,  H04B1/16

CPC classification number: G06F13/4282

Abstract: A demodulator can include first data and clock pads to couple the demodulator to a host device via a first bus, and second data and clock pads to couple the demodulator to a radio frequency (RF) tuner via a second bus. The device may further include passthrough logic to couple host data and a host clock from the first bus to the second bus and to couple tuner data from the second bus to the first bus during a passthrough mode. During this mode, however, the two buses may remain electrically decoupled. When the passthrough mode is disabled, the RF tuner is thus shielded from noise present on the first bus.

Abstract translation: 解调器可以包括经由第一总线将解调器耦合到主机设备的第一数据和时钟焊盘，以及经由第二总线将解调器耦合到射频（RF）调谐器的第二数据和时钟焊盘。 该设备还可以包括用于将主机数据和主机时钟从第一总线耦合到第二总线的通过逻辑，并且在直通模式期间将调谐器数据从第二总线耦合到第一总线。 然而，在这种模式下，两条总线可能保持电气分离。 当禁用直通模式时，RF调谐器被屏蔽，避免了第一个总线上存在的噪声。