公开(公告)号：WO2013158104A1

公开(公告)日：2013-10-24

申请号：PCT/US2012/034237

申请日：2012-04-19

Applicant: INTEL CORPORATION ,  COWLEY, Nicholas P. ,  ALI, Isaac

Inventor： COWLEY, Nicholas P. ,  ALI, Isaac

IPC: H03M1/12

CPC classification number: H03M1/08 ,  H03M1/00 ,  H03M1/0695 ,  H03M1/1028 ,  H03M1/12 ,  H03M1/1215

Abstract: According to various embodiments, a system, an apparatus and a method are presented that relate to determining and correcting signal imbalances between output samples of an analog-to-digital (A-D) converter array (that may be implemented as part of a wideband ADC). A statistic module and correction module are associated with the A-D converter array. The statistic module is configured to receive digital samples from the plurality of A-D converters, and generate a statistical sample value for each A-D converter using a set of digital samples received therefrom. The correction module is configured to, for at least one of the plurality of A-D converters, determine an offset value by comparing the statistical sample value for the at least one of the plurality of A-D converters with a reference value, and apply the offset value to a digital sample from that at least one A-D converter to generate a corrected digital sample.

Abstract translation: 根据各种实施例，提出了一种涉及确定和校正模数（AD）转换器阵列（可被实现为宽带ADC的一部分）的输出采样之间的信号不平衡的系统，装置和方法， 。 统计模块和校正模块与A-D转换器阵列相关联。 统计模块被配置为从多个A-D转换器接收数字样本，并且使用从其接收的一组数字样本为每个A-D转换器生成统计采样值。 校正模块被配置为，对于多个AD转换器中的至少一个，通过将多个AD转换器中的至少一个AD转换器的统计采样值与参考值进行比较来确定偏移值，并将偏移值应用于 来自该至少一个AD转换器的数字样本以产生经校正的数字样本。

公开(公告)号：WO2013158101A1

公开(公告)日：2013-10-24

申请号：PCT/US2012/034211

申请日：2012-04-19

Applicant: INTEL CORPORATION ,  COWLEY, Nicholas P. ,  ALI, Isaac ,  BARBER, William L.

Inventor： COWLEY, Nicholas P. ,  ALI, Isaac ,  BARBER, William L.

IPC: H03F1/02 ,  H04L25/03

CPC classification number: H03F1/0227 ,  H03F1/3241 ,  H03F3/195 ,  H03F3/245 ,  H03F2200/09 ,  H03F2200/102 ,  H03F2200/333 ,  H03F2200/411 ,  H03F2200/504 ,  H03F2200/541 ,  H03G3/30 ,  H04L25/0264 ,  H04L25/0272 ,  H04L27/361

Abstract: A system for amplifying a signal with active power management according to one embodiment includes a first digital to analog converter (DAC) circuit configured to provide a modulated carrier signal; a amplifier circuit coupled to the first DAC, where the amplifier circuit is configured to amplify the modulated carrier signal; an output stage circuit coupled to the amplifier circuit, where the output stage circuit is configured to provide the amplified signal to a network; a second DAC circuit configured to provide a full wave rectified envelope of the modulated carrier signal; and a switching regulator circuit including a voltage reference input coupled to the second DAC circuit, where the switching regulator circuit is configured to provide a supply voltage to the output stage circuit and the supply voltage is modulated in response to the envelope received at the voltage reference input.

Abstract translation: 根据一个实施例的用于放大具有有功功率管理的信号的系统包括被配置为提供调制载波信号的第一数模转换器（DAC）电路; 耦合到所述第一DAC的放大器电路，其中所述放大器电路被配置为放大所述经调制的载波信号; 耦合到放大器电路的输出级电路，其中输出级电路被配置为向网络提供放大的信号; 第二DAC电路，被配置为提供调制载波信号的全波整流包络; 以及开关调节器电路，其包括耦合到所述第二DAC电路的电压参考输入，其中所述开关调节器电路被配置为向所述输出级电路提供电源电压，并且响应于在所述电压基准处接收到的信封来调制所述电源电压 输入。

公开(公告)号：WO2013130088A1

公开(公告)日：2013-09-06

申请号：PCT/US2012/027343

申请日：2012-03-01

Applicant: INTEL CORPORATION ,  COWLEY, Nicholas, P. ,  TALBOT, Andrew, D. ,  ALI, Isaac ,  PINSON, Keith ,  PERRY, Colin, L. ,  AITKEN, Matthew, T. ,  KAN, Chi Man ,  MUDD, Mark, S. ,  SPINKS, Stephen, J. ,  MARTIN, Alan, J. ,  BARBER, William, L.

Inventor： COWLEY, Nicholas, P. ,  TALBOT, Andrew, D. ,  ALI, Isaac ,  PINSON, Keith ,  PERRY, Colin, L. ,  AITKEN, Matthew, T. ,  KAN, Chi Man ,  MUDD, Mark, S. ,  SPINKS, Stephen, J. ,  MARTIN, Alan, J. ,  BARBER, William, L.

IPC: G05F1/10 ,  G05F1/565

CPC classification number: H02M3/158 ,  H02M2001/0032 ,  H02M2001/0045 ,  Y02B70/16

Abstract: A dual mode voltage regulator according to one embodiment includes a passive regulator circuit, a switching regulator circuit, and a controller circuit configured to determine parameters of an external select input. The controller is configured to selectively couple, on a cold boot up, either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load based on the determination of parameters.

Abstract translation: 根据一个实施例的双模式电压调节器包括无源调节器电路，开关调节器电路和被配置为确定外部选择输入的参数的控制器电路。 控制器被配置为基于参数的确定，在冷启动时选择性地将无源调节器电路或开关调节器电路耦合在输入电压端口和输出负载之间。

公开(公告)号：WO2011084264A1

公开(公告)日：2011-07-14

申请号：PCT/US2010/058223

申请日：2010-11-29

Applicant: INTEL CORPORATION ,  COWLEY, Nicholas P. ,  ARAMBEPOLA, Bernard ,  MARTIN, Alan J. ,  ALI, Isaac

Inventor： COWLEY, Nicholas P. ,  ARAMBEPOLA, Bernard ,  MARTIN, Alan J. ,  ALI, Isaac

IPC: H04N5/44

CPC classification number: H04N21/42615 ,  H04H2201/60 ,  H04N5/50 ,  H04N5/765 ,  H04N21/4263 ,  H04N21/4347 ,  H04N21/4382 ,  H04N21/4383 ,  H04N21/4436

Abstract: Techniques for the reception and processing of wireless signals are disclosed. For instance, an apparatus may include multiple receiving paths, a content stream generation module, and a distribution module. The multiple receiving paths include a first receiving path that generates a first decoded signal from an input RF signal in accordance with a first tuning setting. The content stream generation module has first and second inputs. Based on decoded signals received at the first and second inputs, the content stream generation module may generate first and second content streams, respectively. In situations where both the first and second content streams correspond to the first tuning setting, the distribution module provides the first decoded signal to both the first and second inputs of the content stream generation module. Also, a control module may remove operational power from any of the plurality of receiving paths that are currently being unused.

Abstract translation: 公开了接收和处理无线信号的技术。 例如，设备可以包括多个接收路径，内容流生成模块和分发模块。 多个接收路径包括根据第一调谐设置从输入RF信号产生第一解码信号的第一接收路径。 内容流生成模块具有第一和第二输入。 基于在第一和第二输入处接收到的解码信号，内容流生成模块可以分别生成第一和第二内容流。 在第一和第二内容流都对应于第一调谐设置的情况下，分配模块将第一解码信号提供给内容流生成模块的第一和第二输入。 此外，控制模块可以从当前未被使用的多个接收路径中的任何一个接收路径移除操作功率。

公开(公告)号：WO2016022124A1

公开(公告)日：2016-02-11

申请号：PCT/US2014/050133

申请日：2014-08-07

Applicant: INTEL CORPORATION ,  SARASWAT, Ruchir ,  ZILLMANN, Uwe ,  COWLEY, Nicholas, P. ,  GOLDMAN, Richard, J.

Inventor： SARASWAT, Ruchir ,  ZILLMANN, Uwe ,  COWLEY, Nicholas, P. ,  GOLDMAN, Richard, J.

IPC: H01F17/00 ,  H01F27/28

CPC classification number: H01L23/645 ,  H01F17/0006 ,  H01F27/2804 ,  H01F41/041 ,  H01F2017/002 ,  H01L23/481 ,  H01L23/5227 ,  H01L28/10

Abstract: Described is an apparatus which comprises: a substrate; a plurality of holes formed as vias (e.g., through-silicon-vias (TSVs)) in the substrate; and a metal loop formed in a metal layer positioned above the plurality of holes such that a plane of the metal loop is orthogonal to the plurality of holes.

Abstract translation: 描述了一种装置，其包括：基板; 在衬底中形成为通孔（例如，通过硅通孔（TSV））的多个孔; 以及金属环，其形成在位于所述多个孔的上方的金属层中，使得所述金属环的平面与所述多个孔正交。

公开(公告)号：WO2014110273A1

公开(公告)日：2014-07-17

申请号：PCT/US2014/010895

申请日：2014-01-09

Applicant: INTEL CORPORATION ,  SARASWAT, Ruchir ,  COWLEY, Nicholas, P. ,  ZILLMANN, Uwe

Inventor： SARASWAT, Ruchir ,  COWLEY, Nicholas, P. ,  ZILLMANN, Uwe

IPC: H01Q13/08 ,  H01Q1/38

CPC classification number: H01L21/486 ,  H01L23/481 ,  H01L23/522 ,  H01L23/5225 ,  H01L23/5227 ,  H01L23/66 ,  H01L2924/0002 ,  H01Q1/2283 ,  H01Q21/065 ,  H01L2924/00

Abstract: A patch antenna system comprising: an integrated circuit die having an active side including an active layer, and a backside; a dielectric layer formed on the backside; and a redistribution layer formed on the dielectric layer wherein the redistribution layer forms an array of patches. The patch antenna further comprises a plurality of through-silicon vias (TSV), wherein the TSVs electrically connect the array of patches to the active layer.

Abstract translation: 一种贴片天线系统，包括：集成电路芯片，具有包括有源层的有源侧和背面; 形成在背面的电介质层; 以及形成在所述电介质层上的再分布层，其中所述再分布层形成一组贴片。 贴片天线还包括多个穿硅通孔（TSV），其中TSV将贴片阵列电连接到有源层。

公开(公告)号：WO2012134832A2

公开(公告)日：2012-10-04

申请号：PCT/US2012/029348

申请日：2012-03-16

Applicant: INTEL CORPORATION ,  COWLEY, Nicholas P. ,  ALI, Isaac ,  SPINKS, Stephen J.

Inventor： COWLEY, Nicholas P. ,  ALI, Isaac ,  SPINKS, Stephen J.

IPC: H01F17/04 ,  H01F27/28

CPC classification number: H02M3/1584 ,  H01F17/02 ,  Y10T29/49071

Abstract: An embodiment of the present invention provides an apparatus, comprising a surface mounted device (SMD) inductor, the SMD inductor including at least two counter wound aircoils formed on a same SMD former; wherein the at least two counter wound aircoils are connected to three terminals on the SMD former, wherein a single terminal is connected to a common node of both windings with two independent terminals accessing the other winding node.

Abstract translation: 本发明的一个实施例提供了一种包括表面安装器件（SMD）电感器的器件，该SMD电感器包括形成在同一SMD成形器上的至少两个反绕绕的电极; 其中所述至少两个计数器缠绕的空心体连接到所述SMD形成器上的三个端子，其中单个端子连接到两个绕组的公共节点，其中两个独立的端子接近另一绕组节点。

公开(公告)号：WO2014110314A1

公开(公告)日：2014-07-17

申请号：PCT/US2014/010962

申请日：2014-01-10

Applicant: INTEL CORPORATION ,  COWLEY, Nicholas P. ,  ALI, Isaac ,  SUETINOV, Viatcheslav I. ,  PINSON, Keith

Inventor： COWLEY, Nicholas P. ,  ALI, Isaac ,  SUETINOV, Viatcheslav I. ,  PINSON, Keith

IPC: G06F17/50

CPC classification number: H03M1/183

Abstract: A method and system for implementing a gain control with fine resolution and minimal additional circuitry. The fine digital gain control may be deployed in conjunction with a coarse switched gain at the front end of a sampling receiver. The fine digital gain control mechanism is configured to receive an input signal and moderate gains applied to the received input signal. The output of a low noise amplifier (LNA) is connected to a switched attenuator which provides fine gain stepped gain control. The output of this stage is connected to the switch stage whose output is connected to a charge redistribution successive approximation register digital-to- analog converter (SAR ADC) configured to convert an analog waveform into a digital representation.

Abstract translation: 一种用于实现具有精细分辨率和最小额外电路的增益控制的方法和系统。 精细的数字增益控制可以结合在采样接收器的前端处的粗略的开关增益来部署。 精细数字增益控制机构被配置为接收输入信号并且适中的增益被施加到所接收的输入信号。 低噪声放大器（LNA）的输出连接到提供精细增益阶梯增益控制的开关衰减器。 该级的输出连接到开关级，其输出端连接到配置为将模拟波形转换为数字表示的电荷再分配逐次逼近寄存器数模转换器（SAR ADC）。

公开(公告)号：WO2013165401A1

公开(公告)日：2013-11-07

申请号：PCT/US2012/036014

申请日：2012-05-01

Applicant: INTEL CORPORATION ,  ALI, Isaac ,  COWLEY, Nicholas P.

Inventor： ALI, Isaac ,  COWLEY, Nicholas P.

IPC: G05F1/575 ,  G05F1/10

CPC classification number: H02M3/10 ,  H02M3/157 ,  H02M2001/0025 ,  H02M2003/1566

Abstract: Generally, this disclosure describes an apparatus, systems and methods for adaptively controlling a voltage regulator. The apparatus may include a differencing circuit configured to generate an error signal based on a difference between a reference voltage and the output voltage of the voltage regulator; a proportional control circuit coupled to the differencing circuit, the proportional control circuit configured to generate a control signal proportional to the error signal; a derivative control circuit coupled to the differencing circuit, the derivative control circuit configured to generate a control signal based on the derivative of the error signal; a summer circuit coupled to the proportional control circuit and the derivative control circuit, the summer circuit configured to sum the proportional control signal and the derivative control signal; a PWM signal generator circuit coupled to the summer circuit, the PWM generator circuit configured to adjust the PWM modulation based on the summed control signal; and a state monitor circuit configured to monitor the state of the output voltage and perform a gain adjustment on the proportional control signal and the derivative control signal based on the monitored state.

Abstract translation: 通常，本公开描述了用于自适应地控制电压调节器的装置，系统和方法。 该装置可以包括差分电路，其被配置为基于参考电压和电压调节器的输出电压之间的差产生误差信号; 比例控制电路，其耦合到所述差分电路，所述比例控制电路被配置为产生与所述误差信号成比例的控制信号; 微分控制电路，被配置为基于误差信号的导数产生控制信号;微分控制电路， 夏季电路，其耦合到比例控制电路和微分控制电路，所述加法电路被配置为对比例控制信号和微分控制信号进行求和; PWM信号发生器电路，其耦合到所述加法电路，所述PWM发生器电路被配置为基于所述相加的控制信号调整所述PWM调制; 以及状态监视电路，其被配置为基于所监视的状态来监视所述输出电压的状态并对所述比例控制信号和所述微分控制信号执行增益调整。

公开(公告)号：WO2015099668A1

公开(公告)日：2015-07-02

申请号：PCT/US2013/077559

申请日：2013-12-23

Applicant: INTEL CORPORATION ,  LEE, Kevin, J. ,  SARASWAT, Ruchir ,  ZILLMANN, Uwe ,  COWLEY, Nicholas, P. ,  SCHAEFER, Andre ,  JAIN, Rinkle ,  DROEGE, Guido

Inventor： LEE, Kevin, J. ,  SARASWAT, Ruchir ,  ZILLMANN, Uwe ,  COWLEY, Nicholas, P. ,  SCHAEFER, Andre ,  JAIN, Rinkle ,  DROEGE, Guido

IPC: H01L27/108

CPC classification number: H01L23/5223 ,  H01L21/4846 ,  H01L21/486 ,  H01L21/4875 ,  H01L21/76898 ,  H01L21/8221 ,  H01L23/481 ,  H01L23/492 ,  H01L23/498 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L25/0657 ,  H01L27/0629 ,  H01L28/90 ,  H01L2225/06544 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Techniques are disclosed for forming a through-body-via (TBV) isolated coaxial capacitor in a semiconductor die. In some embodiments, a cylindrical capacitor provided using the disclosed techniques may include, for example, a conductive TBV surrounded by a dielectric material and an outer conductor plate. The TBV and outer plate can be formed, for example, so as to be self-aligned with one another in a coaxial arrangement, in accordance with some embodiments. The disclosed capacitor may extend through the body of a host die such that its terminals are accessible on the upper and/or lower surfaces thereof. Thus, in some cases, the host die can be electrically connected with another die to provide a die stack or other three-dimensional integrated circuit (3D IC), in accordance with some embodiments. In some instances, the disclosed capacitor can be utilized, for example, to provide integrated capacitance in a switched-capacitor voltage regulator (SCVR).

Abstract translation: 公开了用于在半导体管芯中形成通孔通孔（TBV）隔离同轴电容器的技术。 在一些实施例中，使用所公开的技术提供的圆柱形电容器可以包括例如由介电材料和外导体板包围的导电TBV。 根据一些实施例，TBV和外板可以例如形成为以同轴布置彼此自对准。 所公开的电容器可以延伸穿过主模具的主体，使得其端子在其上表面和/或下表面上可接近。 因此，根据一些实施例，在一些情况下，主体管芯可以与另一个管芯电连接以提供管芯堆叠或其他三维集成电路（3D IC）。 在一些情况下，所公开的电容器可用于例如在开关电容器电压调节器（SCVR）中提供集成电容。