公开(公告)号：WO2012166483A3

公开(公告)日：2013-03-07

申请号：PCT/US2012039215

申请日：2012-05-23

Applicant: MICRON TECHNOLOGY INC ,  FREEMAN ERIC H ,  SMITH MICHAEL A

Inventor： FREEMAN ERIC H ,  SMITH MICHAEL A

IPC: H01L21/8247 ,  H01L27/115

CPC classification number: H01L23/528 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/32133 ,  H01L21/32139 ,  H01L21/76838 ,  H01L21/76892 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11575 ,  H01L27/11582 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods for forming semiconductor structures are disclosed, including a method that involves forming sets of conductive material and insulating material, forming a first mask over the sets, forming a first number of contact regions, forming a second mask over a first region of the sets, and removing material from of the sets in a second, exposed region laterally adjacent the first region to form a second number of contact regions. Another method includes forming first and second contact regions on portions of sets of conductive materials and insulating materials, each of the second contact regions more proximal to an underlying substrate than each of the first contact regions. Apparatuses such as memory devices including laterally adjacent first and second regions each including contact regions of a different portion of a plurality of conductive materials and related methods of forming such devices are also disclosed.

Abstract translation: 公开了用于形成半导体结构的方法，包括形成导电材料和绝缘材料组的方法，在组上形成第一掩模，形成第一数量的接触区域，在组的第一区域上形成第二掩模， 以及在与所述第一区域横向相邻的第二暴露区域中从所述组中移除材料以形成第二数量的接触区域。 另一种方法包括在导电材料和绝缘材料组的部分上形成第一和第二接触区域，每个第二接触区域比第一接触区域中的每一个更接近下面的衬底。 还公开了诸如包括横向相邻的第一和第二区域的存储器件的装置，每个区域包括多个导电材料的不同部分的接触区域和形成这种器件的相关方法。

公开(公告)号：WO2012166483A2

公开(公告)日：2012-12-06

申请号：PCT/US2012/039215

申请日：2012-05-23

Applicant: MICRON TECHNOLOGY, INC. ,  FREEMAN, Eric H. ,  SMITH, Michael A.

Inventor： FREEMAN, Eric H. ,  SMITH, Michael A.

IPC: H01L21/8247 ,  H01L27/115

CPC classification number: H01L23/528 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/32133 ,  H01L21/32139 ,  H01L21/76838 ,  H01L21/76892 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11575 ,  H01L27/11582 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods for forming semiconductor structures are disclosed, including a method that involves forming sets of conductive material and insulating material, forming a first mask over the sets, forming a first number of contact regions, forming a second mask over a first region of the sets, and removing material from of the sets in a second, exposed region laterally adjacent the first region to form a second number of contact regions. Another method includes forming first and second contact regions on portions of sets of conductive materials and insulating materials, each of the second contact regions more proximal to an underlying substrate than each of the first contact regions. Apparatuses such as memory devices including laterally adjacent first and second regions each including contact regions of a different portion of a plurality of conductive materials and related methods of forming such devices are also disclosed.

Abstract translation: 公开了用于形成半导体结构的方法，包括形成导电材料和绝缘材料组的方法，在组上形成第一掩模，形成第一数量的接触区域，在组的第一区域上形成第二掩模， 以及在与所述第一区域横向相邻的第二暴露区域中从所述组中移除材料以形成第二数量的接触区域。 另一种方法包括在导电材料和绝缘材料组的部分上形成第一和第二接触区域，每个第二接触区域比第一接触区域中的每一个更接近下面的衬底。 还公开了诸如包括横向相邻的第一和第二区域的存储器件的装置，每个区域包括多个导电材料的不同部分的接触区域和形成这种器件的相关方法。

公开(公告)号：WO2012166451A2

公开(公告)日：2012-12-06

申请号：PCT/US2012/039042

申请日：2012-05-23

Applicant: MICRON TECHNOLOGY, INC. ,  SMITH, Michael A. ,  FREEMAN, Eric H.

Inventor： SMITH, Michael A. ,  FREEMAN, Eric H.

IPC: H01L21/8247 ,  H01L27/115 ,  H01L21/28

CPC classification number: H01L23/5226 ,  H01L21/76805 ,  H01L21/76816 ,  H01L21/76831 ,  H01L21/76877 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11575 ,  H01L27/11582 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Conductive structures include a plurality of conductive steps and a contact extending at least partially therethrough in communication with at least one of the plurality of conductive steps and insulated from at least another one of the conductive steps. Devices may include such conductive structures. Systems may include a semiconductor device and a stair step conductive structure having a plurality of contacts extending through a step of the stair step conductive structure. Methods of forming conductive structures include forming contacts in contact holes formed through at least one conductive step of a conductive structure. Methods of forming electrical connections in stair step conductive structures include forming contacts in contact holes formed through each step of the stair step conductive structure.

Abstract translation: 导电结构包括多个导电台阶和至少部分地穿过其延伸的接触件，与多个导电台阶中的至少一个连通，并与至少另一导电台阶绝缘。 设备可以包括这种导电结构。 系统可以包括半导体器件和楼梯级导电结构，其具有延伸穿过楼梯级导电结构的台阶的多个触点。 形成导电结构的方法包括在通过导电结构的至少一个导电步骤形成的接触孔中形成接触。 在楼梯级导电结构中形成电连接的方法包括在通过楼梯级导电结构的每个步骤形成的接触孔中形成触点。

公开(公告)号：WO2012166451A3

公开(公告)日：2013-02-28

申请号：PCT/US2012039042

申请日：2012-05-23

Applicant: MICRON TECHNOLOGY INC ,  SMITH MICHAEL A ,  FREEMAN ERIC H

Inventor： SMITH MICHAEL A ,  FREEMAN ERIC H

IPC: H01L21/8247 ,  H01L21/28 ,  H01L27/115

CPC classification number: H01L23/5226 ,  H01L21/76805 ,  H01L21/76816 ,  H01L21/76831 ,  H01L21/76877 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11575 ,  H01L27/11582 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Conductive structures include a plurality of conductive steps and a contact extending at least partially therethrough in communication with at least one of the plurality of conductive steps and insulated from at least another one of the conductive steps. Devices may include such conductive structures. Systems may include a semiconductor device and a stair step conductive structure having a plurality of contacts extending through a step of the stair step conductive structure. Methods of forming conductive structures include forming contacts in contact holes formed through at least one conductive step of a conductive structure. Methods of forming electrical connections in stair step conductive structures include forming contacts in contact holes formed through each step of the stair step conductive structure.

Abstract translation: 导电结构包括多个导电台阶和至少部分地穿过其延伸的接触件，与多个导电台阶中的至少一个连通，并与至少另一导电台阶绝缘。 设备可以包括这种导电结构。 系统可以包括半导体器件和楼梯级导电结构，其具有延伸穿过楼梯级导电结构的台阶的多个触点。 形成导电结构的方法包括在通过导电结构的至少一个导电步骤形成的接触孔中形成接触。 在楼梯级导电结构中形成电连接的方法包括在通过楼梯级导电结构的每个步骤形成的接触孔中形成触点。