SEMICONDUCTOR STRUCTURE IMPLEMENTING SACRIFICIAL MATERIAL AND METHODS FOR MAKING AND IMPLEMENTING THE SAME
    1.
    发明申请
    SEMICONDUCTOR STRUCTURE IMPLEMENTING SACRIFICIAL MATERIAL AND METHODS FOR MAKING AND IMPLEMENTING THE SAME 审中-公开
    实施材料的半导体结构及其制造和实施方法

    公开(公告)号:WO2002103791A2

    公开(公告)日:2002-12-27

    申请号:PCT/US2002/009617

    申请日:2002-03-26

    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate having transistor devices and a plurality of copper interconnect metallization lines and conductive vias. The plurality of copper interconnect metallization lines and conductive vias are defined in each of a plurality of interconnect levels of the semiconductor device such that the plurality of copper interconnect metallization lines and conductive vias are isolated from each other by an air dielectric. The semiconductor device further includes a plurality of supporting stubs each of which is configured to form a supporting column that extends through the plurality of interconnect levels of the semiconductor device.

    Abstract translation: 提供半导体器件。 半导体器件包括具有晶体管器件和多个铜互连金属化线和导电通孔的衬底。 多个铜互连金属化线和导电通孔限定在半导体器件的多个互连层中的每一个中,使得多个铜互连金属化线和导电通孔通过空气电介质彼此隔离。 半导体器件还包括多个支撑短截线,每个支撑短截线被配置成形成延伸穿过半导体器件的多个互连级别的支撑柱。

    CMP APPARATUS WITH AN OSCILLATING POLISHING PAD ROTATING IN THE OPPOSITE DIRECTION OF THE WAFER
    2.
    发明申请
    CMP APPARATUS WITH AN OSCILLATING POLISHING PAD ROTATING IN THE OPPOSITE DIRECTION OF THE WAFER 审中-公开
    具有旋转方向的振荡抛光盘的CMP装置

    公开(公告)号:WO0216075A3

    公开(公告)日:2002-08-15

    申请号:PCT/US0122846

    申请日:2001-07-19

    CPC classification number: B24B37/20 B24B53/017 H01L21/30625

    Abstract: A chemical mechanical polishing (CMP) system (200) is provided. A carrier (206) has a top surface and a bottom region. The top surface of the carrier is designed to hold and rotate a wafer (202) having a one or more formed layers to be prepared. A preparation head (208) is also included and is designed to be applied to at least a portion of the wafer (202) that is less than an entire portion of the surface of the wafer (202). Preferably, the preparation head (208) and the carrier (206) are configured to rotate in opposite directions. In addition, the preparation (208) head is further configured to oscillate while linearly moving from one of the direction of a center of the wafer (202) to an edge of the wafer (202) and from the edge of the wafer (202) to the center of the wafer(202). A support head (212) to support the top face of the wafer is also included, as well as a conditioning head (210).

    Abstract translation: 提供化学机械抛光(CMP)系统(200)。 载体(206)具有顶表面和底部区域。 载体的顶表面被设计成保持和旋转具有一个或多个待制备的成形层的晶片(202)。 还包括准备头(208)并被设计成施加到小于晶片(202)的表面的整个部分的至少一部分晶片(202)。 优选地,制备头(208)和载体(206)构造成沿相反方向旋转。 此外,准备(208)头还被配置为在从晶片(202)的中心的方向之一到晶片(202)的边缘和晶片(202)的边缘之间线性移动的同时振荡, 到晶片(202)的中心。 还包括用于支撑晶片顶面的支撑头(212),以及调节头(210)。

    METHOD AND APPARATUS FOR MEASURING FILLM THICKNESS BY MEANS OF COUPLED EDDY SENSORS
    3.
    发明申请
    METHOD AND APPARATUS FOR MEASURING FILLM THICKNESS BY MEANS OF COUPLED EDDY SENSORS 审中-公开
    通过联接EDDY传感器测量薄膜厚度的方法和装置

    公开(公告)号:WO2005066579A1

    公开(公告)日:2005-07-21

    申请号:PCT/US2004/040878

    申请日:2004-12-06

    CPC classification number: G01B7/107 G01B7/105 G01B2210/44

    Abstract: A method for minimizing measuring spot size and noise during film thickness measurement is provided. The method initiates with locating a first eddy current sensor directed toward a first surface associated with a conductive film. The method includes locating . a second eddy current sensor directed toward a second surface associated with the conductive film. The first and second eddy current sensors may share a common axis or be offset from each other. The method further includes alternating power supplied to the first eddy current sensor and the second eddy current sensor. In one aspect of the invention, a delay time is incorporated between switching power between the first eddy current sensor and the second eddy current sensor. The method also includes calculating the film thickness measurement based on a combination of signals from the first eddy current sensor and the second eddy current sensor. An apparatus and a system are also provided.

    Abstract translation: 提供了一种在膜厚测量期间最小化测量点尺寸和噪声的方法。 该方法通过定位朝向与导电膜相关联的第一表面的第一涡流传感器来启动。 该方法包括定位。 指向与导电膜相关联的第二表面的第二涡流传感器。 第一和第二涡流传感器可以共享公共轴线或彼此偏移。 该方法还包括提供给第一涡流传感器和第二涡流传感器的交流电力。 在本发明的一个方面,在第一涡流传感器和第二涡流传感器之间的开关功率之间并入延迟时间。 该方法还包括基于来自第一涡流传感器和第二涡流传感器的信号的组合来计算膜厚度测量。 还提供了一种装置和系统。

    APPARATUS AND METHOD FOR CONTROLLING THE FILM THICKNESS ON A POLISHING PAD
    4.
    发明申请
    APPARATUS AND METHOD FOR CONTROLLING THE FILM THICKNESS ON A POLISHING PAD 审中-公开
    用于控制抛光垫上的薄膜厚度的装置和方法

    公开(公告)号:WO2004113022A1

    公开(公告)日:2004-12-29

    申请号:PCT/US2004/019638

    申请日:2004-06-17

    Abstract: An apparatus for use in a chemical mechanical planarization system (100) is provided. The apparatus includes a fluid displacing device and a fluid delivery device. The fluid displacing device is capable of being positioned at a proximate location over a polishing pad (101), the fluid displacing device configured to displace at least part of a first fluid from a region of the polishing pad (101). The fluid delivery device (103) is capable of replacing the displaced first fluid with a second fluid at the region of the polishing pad, the second fluid being different than the first fluid. A method of controlling properties of a film present over a polishing pad (101) surface is also provided. Further provided is an apparatus that is capable of delivering a fluid over the polishing pad, where the delivery is at a proximate location over the polishing pad surface. The apparatus should further be capable of removing at least part of the fluid from over the polishing pad surface. The removing is configured to occur at a proximate location over the polishing pad surface and adjacent to the delivery of the fluid.

    Abstract translation: 提供了一种用于化学机械平面化系统(100)的设备。 该装置包括流体移位装置和流体输送装置。 流体移动装置能够定位在抛光垫(101)上方的邻近位置处,所述流体移动装置构造成从抛光垫(101)的区域移位至少部分第一流体。 流体输送装置(103)能够在抛光垫区域用第二流体代替置换的第一流体,第二流体不同于第一流体。 还提供了一种控制存在于抛光垫(101)表面上的膜的性质的方法。 还提供了一种能够在抛光垫上输送流体的装置,其中输送位于抛光垫表面上的邻近位置。 该设备还应该能够从抛光垫表面上除去至少部分流体。 移除构造成发生在抛光垫表面上的邻近位置并且与流体的输送相邻。

    END POINT DETECTION SYSTEM FOR CHEMICAL MECHANICAL POLISHING APPLICATIONS
    5.
    发明申请
    END POINT DETECTION SYSTEM FOR CHEMICAL MECHANICAL POLISHING APPLICATIONS 审中-公开
    化学机械抛光应用的端点检测系统

    公开(公告)号:WO2003002301A1

    公开(公告)日:2003-01-09

    申请号:PCT/US2001/020283

    申请日:2001-06-26

    CPC classification number: B24B37/015 H01L22/26 H01L2924/0002 H01L2924/00

    Abstract: Chemical mechanical polishing systems and methods are disclosed. The system includes a polishing pad (304) that is configured to move from a first point to a second point. A carrier (308) is also included and is configured to hold a substrate (301) to be polished over the polishing pad. The carrier is designed to apply the substrate to the polishing pad in a polish location that is between the first point and the second point. A first sensor (310a) is located at the first point and oriented so as to sense an IN temperature of the polishing pad, and a second sensor (310b) is located at the second point and oriented so as to sense an OUT temperature of the polishing pad. The sensing of the IN and OUT temperatures is configured to produce a temperature differential that allows monitoring the process state and the state of the water surface for purposes of switching the process steps while processing wafers by chemical mechanical planarization.

    Abstract translation: 公开了化学机械抛光系统和方法。 该系统包括被配置为从第一点移动到第二点的抛光垫(304)。 还包括载体(308),并且构造成保持待抛光的基底(301)在抛光垫上。 载体被设计成将基底施加到抛光垫在位于第一点和第二点之间的抛光位置。 第一传感器(310a)位于第一点并且被定向成感测抛光垫的IN温度,并且第二传感器(310b)位于第二点并被定向成感测出 抛光垫 IN和OUT温度的检测被配置为产生温度差,允许监测过程状态和水面的状态,以便通过化学机械平面化处理晶片来切换工艺步骤。

    METHOD AND APPARATUS FOR WAFER MECHANICAL STRESS MONITORING AND WAFER THERMAL STRESS MONITORING
    7.
    发明申请
    METHOD AND APPARATUS FOR WAFER MECHANICAL STRESS MONITORING AND WAFER THERMAL STRESS MONITORING 审中-公开
    用于水力机械应力监测和水热应力监测的方法和装置

    公开(公告)号:WO2005035191A1

    公开(公告)日:2005-04-21

    申请号:PCT/US2004/028357

    申请日:2004-08-30

    CPC classification number: B24B37/015 B24B49/16

    Abstract: A chemical mechanical planarization (CMP) system is provided. The CMP system includes a wafer carrier (154) configured to support a wafer (148) during a planarization process, the wafer carrier including a sensor (144) configured to detect a signal indicating a stress being experienced by the wafer during planarization. A computing device (140) in communication with the sensor (144) is included. The computing device (140) is configured to translate the signal to generate a stress map for analysis. A stress relief device responsive to a signal received from the computing device (140) is included. The stress relief device is configured to relieve the stress being experienced by the wafer.

    Abstract translation: 提供化学机械平面化(CMP)系统。 CMP系统包括被配置为在平坦化处理期间支撑晶片(148)的晶片载体(154),所述晶片载体包括传感器(144),其配置成在平坦化期间检测指示由晶片经历的应力的信号。 包括与传感器(144)通信的计算设备(140)。 计算设备(140)被配置为平移信号以生成用于分析的应力图。 包括响应于从计算设备(140)接收的信号的应力消除装置。 应力释放装置被构造成减轻晶片经历的应力。

    SEMICONDUCTOR STRUCTURE IMPLEMENTING SACRIFICIAL MATERIAL AND METHODS FOR MAKING AND IMPLEMENTING THE SAME
    8.
    发明申请
    SEMICONDUCTOR STRUCTURE IMPLEMENTING SACRIFICIAL MATERIAL AND METHODS FOR MAKING AND IMPLEMENTING THE SAME 审中-公开
    实施材料的半导体结构及其制造和实施方法

    公开(公告)号:WO02103791A3

    公开(公告)日:2004-02-19

    申请号:PCT/US0209617

    申请日:2002-03-26

    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate having transistor devices and a plurality of copper interconnect metallization lines and conductive vias. The plurality of copper interconnect metallization lines and conductive vias are defined in each of a plurality of interconnect levels of the semiconductor device such that the plurality of copper interconnect metallization lines and conductive vias are isolated from each other by an air dielectric. The semiconductor device further includes a plurality of supporting stubs each of which is configured to form a supporting column that extends through the plurality of interconnect levels of the semiconductor device.

    Abstract translation: 提供半导体器件。 半导体器件包括具有晶体管器件和多个铜互连金属化线和导电通孔的衬底。 多个铜互连金属化线和导电通孔限定在半导体器件的多个互连层中的每一个中,使得多个铜互连金属化线和导电通孔通过空气电介质彼此隔离。 半导体器件还包括多个支撑短截线,每个支撑短截线被配置成形成延伸穿过半导体器件的多个互连级别的支撑柱。

    DYNAMIC PATTERN GENERATOR WITH CUP-SHAPED STRUCTURE
    9.
    发明申请
    DYNAMIC PATTERN GENERATOR WITH CUP-SHAPED STRUCTURE 审中-公开
    具有杯形结构的动态图案发生器

    公开(公告)号:WO2009061579A1

    公开(公告)日:2009-05-14

    申请号:PCT/US2008/079332

    申请日:2008-10-09

    Abstract: One embodiment relates to a dynamic pattern generator (112) for reflection electron beam lithography which includes conductive pixel pads (902), an insulative border (906) surrounding each conductive pixel pad so as to electrically isolate the conductive pixel pads from each other, and conductive elements (908) coupled to the conductive pixel pads for controllably applying voltages to the conductive pixel pads. The conductive pixel pads are advantageously cup shaped with a bottom portion, a sidewall portion, and an open cavity (904). Another embodiment relates to a pattern generating apparatus which includes a well structure with sidewalls and a cavity configured above each conductive pixel pad (1210). The sidewalls may include alternating layers of conductive (1212, 1214, 1216) and insulative (1202, 1204, 1206) materials. Other embodiments, aspects and feature are also disclosed.

    Abstract translation: 一个实施例涉及用于反射电子束光刻的动态图案发生器(112),其包括导电像素焊盘(902),围绕每个导电像素焊盘的绝缘边界(906),以将导电像素焊盘彼此电隔离;以及 耦合到导电像素焊盘的导电元件(908),用于可控地向导电像素焊盘施加电压。 导电像素焊盘有利地为杯形,其具有底部,侧壁部分和开放空腔(904)。 另一实施例涉及一种图案生成装置,其包括具有侧壁的阱结构和在每个导电像素焊盘(1210)上方配置的空腔。 侧壁可以包括交替的导电层(1212,1214,1216)和绝缘(1202,1204,1206)材料。 还公开了其它实施例,方面和特征。

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