公开(公告)号：WO2010000596A1

公开(公告)日：2010-01-07

申请号：PCT/EP2009/057293

申请日：2009-06-12

Applicant: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES ,  DAVAL, Nicolas ,  KONONCHUK, Oleg ,  GUIOT, Eric ,  AULNETTE, Cécile ,  LALLEMENT, Fabrice ,  FIGUET, Christophe ,  LANDRU, Didier

Inventor： DAVAL, Nicolas ,  KONONCHUK, Oleg ,  GUIOT, Eric ,  AULNETTE, Cécile ,  LALLEMENT, Fabrice ,  FIGUET, Christophe ,  LANDRU, Didier

IPC: H01L21/762

CPC classification number: H01L21/76254 ,  H01L21/2007 ,  H01L21/76256

Abstract: The present invention relates to a process for manufacturing a structure comprising a germanium layer (3) on a support substrate (1), characterised in that it comprises the following steps: (a) formation of an intermediate structure (10) comprising said support substrate (1), a silicon oxide layer (20) and said germanium layer (3), the silicon oxide layer (20) being in direct contact with the germanium layer (3), (b) application to said intermediate structure (10) of a heat treatment, in a neutral or reducing atmosphere, at a defined temperature and for a defined time, to diffuse at least part of the oxygen from the silicon oxide layer (20) through the germanium layer (3).

Abstract translation: 本发明涉及一种用于制造包括在支撑衬底（1）上的锗层（3）的结构的方法，其特征在于包括以下步骤：（a）形成包含所述支撑衬底的中间结构（10） （1），氧化硅层（20）和所述锗层（3），氧化硅层（20）与锗层（3）直接接触，（b）施​​加到所述中间结构（10） 在中性或还原性气氛中，在限定的温度下和在一定时间内进行热处理，以使至少部分氧从氧化硅层（20）扩散通过锗层（3）。

公开(公告)号：WO2012176030A1

公开(公告)日：2012-12-27

申请号：PCT/IB2012/001125

申请日：2012-06-11

Applicant: SOITEC ,  KONONCHUK, Oleg ,  FIGUET, Christophe

Inventor： KONONCHUK, Oleg ,  FIGUET, Christophe

IPC: H01L21/762

CPC classification number: H01L21/76254 ,  H01L21/76259

Abstract: The invention relates to a method for manufacturing a semiconductor device, characterized in that it comprises: a first step (E1) consisting in forming a support substrate (1) comprising a first porous layer (2), a second porous layer (9), with a porosity lower than the porosity of the first layer (2), a second step (E2) consisting in providing a donor substrate (4), comprising, a useful layer (6), a third step (E3) consisting of bonding the support substrate (1) and the donor substrate (4), transferring at least a portion of the useful layer (6) to form a semiconductor device (15), a fourth step (E4) consisting of treating said semiconductor device (15) in such a way as to deform by dilation or contraction at least the first porous layer, said deformation inducing strain in the useful layer (6).

Abstract translation: 本发明涉及一种用于制造半导体器件的方法，其特征在于它包括：第一步骤（E1），包括形成包括第一多孔层（2），第二多孔层（9）的支撑衬底（1） 具有低于第一层（2）的孔隙率的孔隙率，包括提供施主衬底（4）的第二步骤（E2），包括有用层（6），第三步骤（E3），其包括将 支撑基板（1）和供体基板（4），转移有用层（6）的至少一部分以形成半导体器件（15）;第四步骤（E4），其包括将所述半导体器件 这种方式通过至少第一多孔层的膨胀或收缩而变形，所述有用层（6）中的所述变形诱导应变。

公开(公告)号：WO2008090439A1

公开(公告)日：2008-07-31

申请号：PCT/IB2008/000131

申请日：2008-01-16

Applicant: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES ,  REYNAUD, Patrick ,  KONONCHUK, Oleg ,  STINCO, Michael

Inventor： REYNAUD, Patrick ,  KONONCHUK, Oleg ,  STINCO, Michael

IPC: H01L21/762 ,  H01L21/316

CPC classification number: H01L21/31662 ,  H01L21/02032 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/76254 ,  Y10T428/8305

Abstract: The invention relates to a method for manufacturing compound material wafers, in particular, silicon on insulator type wafers, comprising the steps: Providing an initial donor substrate, forming an insulating layer over the initial donor substrate, forming a predetermined splitting area in the initial donor substrate, attaching the initial donor substrate onto a handle substrate and detaching the donor substrate at the predetermined splitting area, thereby transferring a layer of the initial donor substrate onto the handle substrate to form a compound material wafer. In order to be able to reuse the donor substrate more often, the invention proposes to carry out the thermal treatment step to form the insulating layer at a temperature of less than 95O0C, in particular, less than 9000C, preferably at 85O0C. The invention also relates to a silicon on insulator type wafer manufactured according to the inventive method.

Abstract translation: 本发明涉及一种用于制造复合材料晶片，特别是绝缘体上硅晶片的方法，包括以下步骤：提供初始施主衬底，在初始施主衬底上形成绝缘层，在初始施主中形成预定的分裂区域 将初始施主衬底附接到手柄衬底上并在预定的分割区域分离施主衬底，从而将初始施主衬底的一层转移到手柄衬底上以形成复合材料晶片。 为了能够更经常地再次使用施主衬底，本发明提出进行热处理步骤以在小于95℃，特别是小于900℃，优选在85℃的温度下形成绝缘层。 本发明还涉及根据本发明方法制造的绝缘硅绝缘体型晶片。

公开(公告)号：WO2008078132A1

公开(公告)日：2008-07-03

申请号：PCT/IB2006/003957

申请日：2006-12-26

Applicant: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES ,  KONONCHUK, Oleg

Inventor： KONONCHUK, Oleg

IPC: H01L21/322 ,  H01L21/762

CPC classification number: H01L21/76254 ,  H01L21/324

Abstract: The invention relates to a process of treating a structure for electronics or optoelectronics, the structure comprising successively: - a substrate, - a dielectric layer having a thermal conductivity substantially higher than the thermal conductivity of an oxide layer made of an oxide of a semiconductor material, - an oxide layer made of an oxide of the said semiconductor material, - a thin semiconductor layer made of said semiconductor material, characterized in that it comprises a heat treatment of the structure in an inert or reducing atmosphere with a temperature value and a duration chosen for inciting an amount of oxygen of the oxide layer to diffuse through the semiconductor layer so that the thickness of the oxide layer decreases by a determined value. The invention also relates to a process of manufacturing a structure for electronics or optoelectronics comprising the said heat treatment.

Abstract translation: 本发明涉及一种处理电子学或光电子学结构的方法，该结构包括： - 基底， - 具有比由半导体材料的氧化物制成的氧化物层的导热率高的热导率的介电层 ， - 由所述半导体材料的氧化物制成的氧化物层， - 由所述半导体材料制成的薄半导体层，其特征在于，其包括在惰性或还原性气氛中对所述结构进行热处理，所述惰性或还原性气氛具有温度值和持续时间 被选择用于激发氧化物层的氧气扩散通过半导体层，使得氧化物层的厚度减小确定的值。 本发明还涉及制造包括所述热处理的电子或光电子结构的方法。

公开(公告)号：WO2012140483A1

公开(公告)日：2012-10-18

申请号：PCT/IB2012/000689

申请日：2012-04-04

Applicant: SOITEC ,  DELPRAT, Daniel ,  FIGUET, Christophe ,  KONONCHUK, Oleg

Inventor： DELPRAT, Daniel ,  FIGUET, Christophe ,  KONONCHUK, Oleg

IPC: H01L35/26 ,  H01L21/02 ,  H01L35/22

CPC classification number: H01L35/02 ,  H01L35/22 ,  H01L35/26 ,  H01L35/34

Abstract: A quantum well thermoelectric component for use in a thermoelectric device based on the thermoelectric effect, • comprising a stack (1 ) of layers (3, 4) of two materials respectively made on the basis of silicon and silicon-germanium, • the first of said two materials, made on the basis of silicon, defining a barrier semiconductor material and • the second of said two materials, made on the basis of silicon-germanium, defining a conducting semiconductor material, • said barrier semiconductor material having a band gap higher than the band gap of said conducting semiconductor material, wherein • the conducting semiconductor material is an alloy comprising silicon, germanium and at least a lattice matching element, said lattice matching element(s) being present in order to control a lattice parameter mismatch between the barrier layer (3) made of the barrier semiconductor material and the conducting layer (4) made of the conducting semiconductor material.

Abstract translation: 一种用于基于热电效应的热电装置的量子阱热电组件，包括分别基于硅和硅 - 锗制成的两种材料的层（3,4）的叠层（1），第一层 所述两种材料是在硅基的基础上制成的，限定了一种阻挡半导体材料，并且所述两种材料中的第二种是基于硅 - 锗制成的，限定了导电半导体材料，所述阻挡半导体材料具有较高的带隙 所述导电半导体材料是包含硅，锗和至少晶格匹配元素的合金，所述晶格匹配元件存在以控制所述导电半导体材料的晶格参数失配， 由阻挡半导体材料制成的阻挡层（3）和由导电半导体材料制成的导电层（4）。

公开(公告)号：WO2010034696A1

公开(公告)日：2010-04-01

申请号：PCT/EP2009/062219

申请日：2009-09-21

Applicant: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES ,  VEYTIZOU, Christelle ,  GRITTI, Fabrice ,  GUIOT, Eric ,  KONONCHUK, Oleg ,  LANDRU, Didier

Inventor： VEYTIZOU, Christelle ,  GRITTI, Fabrice ,  GUIOT, Eric ,  KONONCHUK, Oleg ,  LANDRU, Didier

IPC: H01L21/762

CPC classification number: H01L21/76254 ,  H01L21/76256 ,  H01L2224/05124 ,  H01L2924/00014

Abstract: The invention relates to a process for treating a semiconductor-on- insulator type structure, successively comprising a support substrate (1 ), an oxide layer (2) and a thin semiconductor layer (3), said process comprising the following steps: (a) formation of a silicon nitride or silicon oxinitride mask (4) on the thin semiconductor layer (3), so as to define so-called exposed areas (3a) at the surface of said layer (3), which are not covered by the mask (40, and which are arranged in a desired pattern, (b) application of a heat treatment in a neutral or controlled reducing atmosphere, and under controlled conditions of temperature and time, so as to induce at least a portion of the oxygen of the oxide layer (2) to diffuse through the thin semiconductor layer (3), thereby resulting in the controlled reduction in the oxide thickness in the areas (2a) of the oxide layer corresponding to said desired pattern. In step (a), the mask (4) is formed so as to be at least partially buried in the thickness of the thin semiconductor layer (3).

Abstract translation: 本发明涉及一种处理半导体绝缘体型结构的方法，其连续包括支撑基板（1），氧化物层（2）和薄半导体层（3），所述方法包括以下步骤：（a ）在薄半导体层（3）上形成氮化硅或氮氧化硅掩模（4），以便在所述层（3）的表面处限定所谓的暴露区域（3a），所述暴露区域不被 掩模（40），其以所需图案布置，（b）在中性或受控还原气氛中以及在受控的温度和时间条件下进行热处理，以便诱导至少一部分氧气 所述氧化物层（2）通过所述薄型半导体层（3）扩散，从而导致与所述期望图案相对应的所述氧化物层的区域（2a）中的氧化物厚度的受控降低，在步骤（a）中， 掩模（4）形成为至少部分地埋在第二部分中 e薄半导体层（3）的厚度。

公开(公告)号：WO2008132564A1

公开(公告)日：2008-11-06

申请号：PCT/IB2008/000141

申请日：2008-01-16

Applicant: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES ,  REYNAUD, Patrick ,  KONONCHUK, Oleg

Inventor： REYNAUD, Patrick ,  KONONCHUK, Oleg

IPC: H01L21/762

CPC classification number: H01L21/76254 ,  H01L21/02032

Abstract: The invention relates to methods for manufacturing compound material wafers, in particular silicon on insulator type wafers, comprising the steps of providing a donor substrate, forming an insulating layer, providing a handle substrate, creating a predetermined splitting area in the donor substrate, attaching the donor substrate to the handle substrate and detaching at the predetermined splitting area to achieve the compound material wafer. In order to be able to more often reuse the remainder of the donor substrate in subsequent manufacturing runs, the invention is characterized by the fact that the insulating layer provided on the donor substrate has a maximum thickness of 500 A, or that the insulating layer is provided by deposition or only on the handle substrate. In addition, a silicon on silicon type wafer fabrication method is also disclosed.

Abstract translation: 本发明涉及用于制造复合材料晶片，特别是绝缘体上硅晶片的方法，包括以下步骤：提供施主衬底，形成绝缘层，提供手柄衬底，在施主衬底中产生预定的分裂区域， 供体衬底到处理衬底并在预定的分割区域分离以实现复合材料晶片。 为了能够在随后的制造运行中能够更经常地重新使用供体衬底的剩余部分，本发明的特征在于：提供在供体衬底上的绝缘层的最大厚度为500A，或绝缘层为 通过沉积或仅在手柄基底上提供。 此外，还公开了硅上硅型晶片制造方法。

公开(公告)号：WO2008114108A1

公开(公告)日：2008-09-25

申请号：PCT/IB2008/000573

申请日：2008-02-26

Applicant: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES ,  FIGUET, Christophe ,  KONONCHUK, Oleg

Inventor： FIGUET, Christophe ,  KONONCHUK, Oleg

IPC: H01L21/20 ,  H01L21/205

CPC classification number: H01L21/02433 ,  C30B25/02 ,  C30B29/06 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/02516 ,  H01L21/02532 ,  H01L21/02609 ,  H01L21/0262

Abstract: The present invention relates to method of fabricating a (110) oriented silicon substrate and to a method of fabricating a bonded pair of substrates comprising such a (110) oriented silicon substrate. The invention further relates to a silicon substrate with (110) orientation and to a bonded pair of silicon substrates comprising a first silicon substrate with (100) orientation and a second silicon substrate with (110) orientation. It is the object of the present invention to provide methods and substrates of the above mentioned type with a high efficiency wherein the formed (110) substrate has at least near and at its surface virtually no defects. The object is solved by a method of fabricating a silicon substrate with (110) orientation and by a method of fabricating a bonded pair of silicon substrates, comprising the steps of providing a basic silicon substrate with (110) orientation, said basic silicon substrate having a roughness being equal or less than 0.15 nm RMS in a 2x2 μm2 or a 10x10 μm2 scan, and depositing epitaxially a silicon layer with (110) orientation on the basic silicon substrate at a pressure between 40 Torr to 120 Torr, preferably 80 Torr.and at a temperature between about 10000C and about 12000C and using trichlorosilane or dichlorosilane as silicon precursor gas.

Abstract translation: 本发明涉及一种制造（110）定向硅衬底的方法以及一种制造包括这种（110）定向硅衬底的粘结对衬底对的方法。 本发明还涉及具有（110）取向的硅衬底和包括具有（100）取向的第一硅衬底和具有（110）取向的第二硅衬底的键合的一对硅衬底。 本发明的目的是提供高效率的上述类型的方法和基底，其中所形成的（110）基底至少具有接近和在其表面上几乎没有缺陷。 本发明的目的是通过制造具有（110）取向的硅衬底的方法和通过制造粘合的一对硅衬底的方法来解决的，包括以下步骤：提供具有（110）取向的碱性硅衬底，所述碱性硅衬底具有 在2x2μm2或10×10m2扫描中的粗糙度等于或小于0.15nm RMS，并且在40Torr至120Torr，优选为80Torr的压力下，在基底硅衬底上外延地沉积（110）取向的硅层。 在约100℃至约1200℃之间的温度下，使用三氯硅烷或二氯硅烷作为硅前体气体。

公开(公告)号：WO2008096194A1

公开(公告)日：2008-08-14

申请号：PCT/IB2007/000950

申请日：2007-02-08

Applicant: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES ,  KONONCHUK, Oleg ,  LETERTRE, Fabrice ,  LANGER, Robert

Inventor： KONONCHUK, Oleg ,  LETERTRE, Fabrice ,  LANGER, Robert

IPC: H01L21/762

CPC classification number: H01L21/76254

Abstract: The invention relates to a method for fabricating a composite structure having heat dissipation properties greater than a bulk single crystal silicon structure having the same dimensions, the structure comprising a support substrate, a top layer and an oxide layer between the support substrate and the top layer, the method comprising the steps of: a) providing a top layer made of a crystalline material, b) bonding the top layer with a support substrate made of a polycrystalline material having high heat dissipation properties, such that an oxide layer is formed at the bonding interface, in order to obtain said structure, characterized in that it further comprises a heat treatment of the structure in an inert or reducing atmosphere at a predetermined temperature and a predetermined duration to increase the heat dissipation properties by dissolving at least a part of the oxide layer.

Abstract translation: 本发明涉及一种制造具有大于具有相同尺寸的本体单晶硅结构的散热特性的复合结构的方法，该结构包括支撑基板和顶层之间的支撑基板，顶层和氧化物层 所述方法包括以下步骤：a）提供由结晶材料制成的顶层，b）将顶层与由具有高散热性质的多晶材料制成的支撑衬底结合，使得氧化物层形成在 接合界面，以获得所述结构，其特征在于，其还包括在预定温度和预定持续时间内在惰性或还原性气氛中对结构进行热处理，以通过将至少一部分 氧化层。

公开(公告)号：WO2008050176A1

公开(公告)日：2008-05-02

申请号：PCT/IB2006/003972

申请日：2006-10-27

Applicant: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES ,  NEYRET, Eric ,  KONONCHUK, Oleg

Inventor： NEYRET, Eric ,  KONONCHUK, Oleg

IPC: H01L21/762 ,  H01L21/322

CPC classification number: H01L21/76254

Abstract: Methods for forming semiconductor structures comprising a layer transferred from a donor substrate are provided in which the resulting structure has improved quality with respect of defects, and resulting structures therefrom. For example, a semiconductor on insulator (SeOI) structure can be formed by a method comprising: - providing a donor substrate (1) having a first density of vacancy clusters; - providing an insulating layer (3); - transferring a thin layer (10) from the donor substrate (1) to a support substrate (2) with the insulating layer (3) thereon; - curing the transferred thin layer (10) to reduce the first density of vacancy clusters to a second density; and being characterized in that the step of providing an insulating layer (30) comprises providing an oxygen barrier layer (4) to be in contact with the transferred thin layer (10), said oxygen barrier layer limiting diffusion of oxygen towards the thin layer during the curing.

Abstract translation: 提供了形成包括从供体基底转移的层的半导体结构的方法，其中所得到的结构相对于缺陷而提高了质量，并且由此产生了结构。 例如，可以通过以下方法形成绝缘体上半导体（SeOI）结构： - 提供具有第一密度的空位簇的施主衬底（1） - 提供绝缘层（3）; - 将薄层（10）从施主衬底（1）转移到其上具有绝缘层（3）的支撑衬底（2）上; - 固化转移的薄层（10）以将空位簇的第一密度降低至第二密度; 并且其特征在于，提供绝缘层（30）的步骤包括提供与转移的薄层（10）接触的氧阻挡层（4），所述氧阻隔层限制氧向薄层扩散 固化。